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Searched refs:uqincd (Results 26 – 50 of 100) sorted by relevance

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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/MC/AArch64/SVE/
H A Duqincd-diagnostics.s6 uqincd wsp label
11 uqincd sp label
16 uqincd z0.s label
25 uqincd x0, w0 label
30 uqincd w0, w0 label
35 uqincd x0, x0 label
63 uqincd x0, vl512 label
68 uqincd x0, vl9 label
73 uqincd x0, #-1 label
78 uqincd x0, #32 label
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/test/MC/AArch64/SVE/
H A Duqincd-diagnostics.s6 uqincd wsp label
11 uqincd sp label
16 uqincd z0.s label
25 uqincd x0, w0 label
30 uqincd w0, w0 label
35 uqincd x0, x0 label
63 uqincd x0, vl512 label
68 uqincd x0, vl9 label
73 uqincd x0, #-1 label
78 uqincd x0, #32 label
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/MC/AArch64/SVE/
H A Duqincd-diagnostics.s6 uqincd wsp label
11 uqincd sp label
16 uqincd z0.s label
25 uqincd x0, w0 label
30 uqincd w0, w0 label
35 uqincd x0, x0 label
63 uqincd x0, vl512 label
68 uqincd x0, vl9 label
73 uqincd x0, #-1 label
78 uqincd x0, #32 label
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/test/MC/AArch64/SVE/
H A Duqincd-diagnostics.s6 uqincd wsp label
11 uqincd sp label
16 uqincd z0.s label
25 uqincd x0, w0 label
30 uqincd w0, w0 label
35 uqincd x0, x0 label
63 uqincd x0, vl512 label
68 uqincd x0, vl9 label
73 uqincd x0, #-1 label
78 uqincd x0, #32 label
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/MC/AArch64/SVE/
H A Duqincd-diagnostics.s6 uqincd wsp label
11 uqincd sp label
16 uqincd z0.s label
25 uqincd x0, w0 label
30 uqincd w0, w0 label
35 uqincd x0, x0 label
63 uqincd x0, vl512 label
68 uqincd x0, vl9 label
73 uqincd x0, #-1 label
78 uqincd x0, #32 label
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll44 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
45 ; CHECK-LABEL: uqincd:
46 ; CHECK: uqincd z0.d, vl2, mul #3
48 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
150 ; CHECK: uqincd w0, vl16, mul #10
152 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
158 ; CHECK: uqincd x0, vl32, mul #11
160 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
235 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
244 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll44 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
45 ; CHECK-LABEL: uqincd:
46 ; CHECK: uqincd z0.d, vl2, mul #3
48 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
150 ; CHECK: uqincd w0, vl16, mul #10
152 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
158 ; CHECK: uqincd x0, vl32, mul #11
160 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
235 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
244 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll40 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
41 ; CHECK-LABEL: uqincd:
42 ; CHECK: uqincd z0.d, vl2, mul #3
44 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
146 ; CHECK: uqincd w0, vl16, mul #10
148 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
154 ; CHECK: uqincd x0, vl32, mul #11
156 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
231 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
240 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll40 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
41 ; CHECK-LABEL: uqincd:
42 ; CHECK: uqincd z0.d, vl2, mul #3
44 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
146 ; CHECK: uqincd w0, vl16, mul #10
148 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
154 ; CHECK: uqincd x0, vl32, mul #11
156 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
231 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
240 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll40 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
41 ; CHECK-LABEL: uqincd:
42 ; CHECK: uqincd z0.d, vl2, mul #3
44 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
146 ; CHECK: uqincd w0, vl16, mul #10
148 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
154 ; CHECK: uqincd x0, vl32, mul #11
156 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
231 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
240 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll44 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
45 ; CHECK-LABEL: uqincd:
46 ; CHECK: uqincd z0.d, vl2, mul #3
48 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
150 ; CHECK: uqincd w0, vl16, mul #10
152 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
158 ; CHECK: uqincd x0, vl32, mul #11
160 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
235 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
244 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll44 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
45 ; CHECK-LABEL: uqincd:
46 ; CHECK: uqincd z0.d, vl2, mul #3
48 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
150 ; CHECK: uqincd w0, vl16, mul #10
152 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
158 ; CHECK: uqincd x0, vl32, mul #11
160 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
235 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
244 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll40 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
41 ; CHECK-LABEL: uqincd:
42 ; CHECK: uqincd z0.d, vl2, mul #3
44 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
146 ; CHECK: uqincd w0, vl16, mul #10
148 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
154 ; CHECK: uqincd x0, vl32, mul #11
156 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
231 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
240 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll40 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
41 ; CHECK-LABEL: uqincd:
42 ; CHECK: uqincd z0.d, vl2, mul #3
44 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
146 ; CHECK: uqincd w0, vl16, mul #10
148 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
154 ; CHECK: uqincd x0, vl32, mul #11
156 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
231 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
240 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll40 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
41 ; CHECK-LABEL: uqincd:
42 ; CHECK: uqincd z0.d, vl2, mul #3
44 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
146 ; CHECK: uqincd w0, vl16, mul #10
148 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
154 ; CHECK: uqincd x0, vl32, mul #11
156 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
231 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
240 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll44 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
45 ; CHECK-LABEL: uqincd:
46 ; CHECK: uqincd z0.d, vl2, mul #3
48 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
150 ; CHECK: uqincd w0, vl16, mul #10
152 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
158 ; CHECK: uqincd x0, vl32, mul #11
160 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
235 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
244 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AArch64/
H A Dsve-intrinsics-uqinc.ll40 define <vscale x 2 x i64> @uqincd(<vscale x 2 x i64> %a) {
41 ; CHECK-LABEL: uqincd:
42 ; CHECK: uqincd z0.d, vl2, mul #3
44 %out = call <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64> %a,
146 ; CHECK: uqincd w0, vl16, mul #10
148 %out = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %a, i32 9, i32 10)
154 ; CHECK: uqincd x0, vl32, mul #11
156 %out = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %a, i32 10, i32 11)
231 declare <vscale x 2 x i64> @llvm.aarch64.sve.uqincd.nxv2i64(<vscale x 2 x i64>, i32, i32)
240 declare i32 @llvm.aarch64.sve.uqincd.n32(i32, i32, i32)
[all …]
/dports/devel/gnulibiberty/binutils-2.37/gas/testsuite/gas/aarch64/
H A Dsve.d37413 [^:]+: 04e0c7e0 uqincd z0.d
37414 [^:]+: 04e0c7e0 uqincd z0.d
37415 [^:]+: 04e0c7e0 uqincd z0.d
37524 [^:]+: 04e0f7e0 uqincd w0
37525 [^:]+: 04e0f7e0 uqincd w0
37526 [^:]+: 04e0f7e0 uqincd w0
37527 [^:]+: 04e0f7e0 uqincd w0
37635 [^:]+: 04f0f7e0 uqincd x0
37636 [^:]+: 04f0f7e0 uqincd x0
37637 [^:]+: 04f0f7e0 uqincd x0
[all …]
H A Dsve.s37422 uqincd z0.d
37443 uqincd w0, vl1
37446 uqincd w0, vl2
37449 uqincd w0, vl3
37452 uqincd w0, vl4
37455 uqincd w0, vl5
37458 uqincd w0, vl6
37461 uqincd w0, vl7
37464 uqincd w0, vl8
37533 uqincd w0
[all …]
/dports/devel/arm-elf-binutils/binutils-2.37/gas/testsuite/gas/aarch64/
H A Dsve.d37413 [^:]+: 04e0c7e0 uqincd z0.d
37414 [^:]+: 04e0c7e0 uqincd z0.d
37415 [^:]+: 04e0c7e0 uqincd z0.d
37524 [^:]+: 04e0f7e0 uqincd w0
37525 [^:]+: 04e0f7e0 uqincd w0
37526 [^:]+: 04e0f7e0 uqincd w0
37527 [^:]+: 04e0f7e0 uqincd w0
37635 [^:]+: 04f0f7e0 uqincd x0
37636 [^:]+: 04f0f7e0 uqincd x0
37637 [^:]+: 04f0f7e0 uqincd x0
[all …]
H A Dsve.s37422 uqincd z0.d
37443 uqincd w0, vl1
37446 uqincd w0, vl2
37449 uqincd w0, vl3
37452 uqincd w0, vl4
37455 uqincd w0, vl5
37458 uqincd w0, vl6
37461 uqincd w0, vl7
37464 uqincd w0, vl8
37533 uqincd w0
[all …]
/dports/devel/binutils/binutils-2.37/gas/testsuite/gas/aarch64/
H A Dsve.d37413 [^:]+: 04e0c7e0 uqincd z0.d
37414 [^:]+: 04e0c7e0 uqincd z0.d
37415 [^:]+: 04e0c7e0 uqincd z0.d
37524 [^:]+: 04e0f7e0 uqincd w0
37525 [^:]+: 04e0f7e0 uqincd w0
37526 [^:]+: 04e0f7e0 uqincd w0
37527 [^:]+: 04e0f7e0 uqincd w0
37635 [^:]+: 04f0f7e0 uqincd x0
37636 [^:]+: 04f0f7e0 uqincd x0
37637 [^:]+: 04f0f7e0 uqincd x0
[all …]
H A Dsve.s37422 uqincd z0.d
37443 uqincd w0, vl1
37446 uqincd w0, vl2
37449 uqincd w0, vl3
37452 uqincd w0, vl4
37455 uqincd w0, vl5
37458 uqincd w0, vl6
37461 uqincd w0, vl7
37464 uqincd w0, vl8
37533 uqincd w0
[all …]
/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/AArch64/
H A DAArch64SVEInstrInfo.td819 defm UQINCD_WPiI : sve_int_pred_pattern_b_u32<0b11001, "uqincd">;
823 defm UQINCD_XPiI : sve_int_pred_pattern_b_x64<0b11101, "uqincd">;
840 defm UQINCD_ZPiI : sve_int_countvlv<0b11001, "uqincd", ZPR64>;
/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/AArch64/
H A DAArch64SVEInstrInfo.td819 defm UQINCD_WPiI : sve_int_pred_pattern_b_u32<0b11001, "uqincd">;
823 defm UQINCD_XPiI : sve_int_pred_pattern_b_x64<0b11101, "uqincd">;
840 defm UQINCD_ZPiI : sve_int_countvlv<0b11001, "uqincd", ZPR64>;

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