Home
last modified time | relevance | path

Searched refs:wr0 (Results 176 – 200 of 247) sorted by relevance

12345678910

/dports/devel/avr-gdb/gdb-7.3.1/sim/testsuite/sim/arm/iwmmxt/
H A Dwaligni.cgs26 tmcrr wr0, r0, r1
30 waligni wr2, wr0, wr1, #2
32 tmrrc r0, r1, wr0
/dports/devel/gdb761/gdb-7.6.1/sim/testsuite/sim/arm/iwmmxt/
H A Dwaligni.cgs26 tmcrr wr0, r0, r1
30 waligni wr2, wr0, wr1, #2
32 tmrrc r0, r1, wr0
/dports/math/fftw3/fftw-3.3.9/kernel/
H A Dtrig.c99 trigreal wr0 = p->W0[2 * m0]; in cexpl_sqrtn_table() local
104 res[0] = wr1 * wr0 - wi1 * wi0; in cexpl_sqrtn_table()
105 res[1] = wi1 * wr0 + wr1 * wi0; in cexpl_sqrtn_table()
117 trigreal wr0 = p->W0[2 * m0]; in rotate_sqrtn_table() local
121 trigreal wr = wr1 * wr0 - wi1 * wi0; in rotate_sqrtn_table()
122 trigreal wi = wi1 * wr0 + wr1 * wi0; in rotate_sqrtn_table()
/dports/math/fftw3-float/fftw-3.3.9/kernel/
H A Dtrig.c99 trigreal wr0 = p->W0[2 * m0]; in cexpl_sqrtn_table() local
104 res[0] = wr1 * wr0 - wi1 * wi0; in cexpl_sqrtn_table()
105 res[1] = wi1 * wr0 + wr1 * wi0; in cexpl_sqrtn_table()
117 trigreal wr0 = p->W0[2 * m0]; in rotate_sqrtn_table() local
121 trigreal wr = wr1 * wr0 - wi1 * wi0; in rotate_sqrtn_table()
122 trigreal wi = wi1 * wr0 + wr1 * wi0; in rotate_sqrtn_table()
/dports/math/fftw3-long/fftw-3.3.9/kernel/
H A Dtrig.c99 trigreal wr0 = p->W0[2 * m0]; in cexpl_sqrtn_table() local
104 res[0] = wr1 * wr0 - wi1 * wi0; in cexpl_sqrtn_table()
105 res[1] = wi1 * wr0 + wr1 * wi0; in cexpl_sqrtn_table()
117 trigreal wr0 = p->W0[2 * m0]; in rotate_sqrtn_table() local
121 trigreal wr = wr1 * wr0 - wi1 * wi0; in rotate_sqrtn_table()
122 trigreal wi = wi1 * wr0 + wr1 * wi0; in rotate_sqrtn_table()
/dports/math/fftw3-quad/fftw-3.3.9/kernel/
H A Dtrig.c99 trigreal wr0 = p->W0[2 * m0]; in cexpl_sqrtn_table() local
104 res[0] = wr1 * wr0 - wi1 * wi0; in cexpl_sqrtn_table()
105 res[1] = wi1 * wr0 + wr1 * wi0; in cexpl_sqrtn_table()
117 trigreal wr0 = p->W0[2 * m0]; in rotate_sqrtn_table() local
121 trigreal wr = wr1 * wr0 - wi1 * wi0; in rotate_sqrtn_table()
122 trigreal wi = wi1 * wr0 + wr1 * wi0; in rotate_sqrtn_table()
/dports/emulators/lisaem/lisaem-1.2.6.2/lisa/
H A Dzilog8530.c820 …regnum=scc_w[port].s.wr0.r.reg; if (scc_w[port].s.wr0.r.cmd==1) {regnum|=8; scc_w[port].s.wr0.r.cm… in lisa_wb_Oxd200_sccz8530()
824 scc_w[port].s.wr0.r.reg=0; // reset register pointer back to zero for next round. in lisa_wb_Oxd200_sccz8530()
836 switch(scc_w[port].s.wr0.r.cmd) in lisa_wb_Oxd200_sccz8530()
852 … scc_w[port].s.wr0.r.cmd=0; // clear command for next cycle (except for previous highpoint) in lisa_wb_Oxd200_sccz8530()
860 … scc_w[port].s.wr0.r.cmd=0; // clear command for next cycle (except for previous highpoint) in lisa_wb_Oxd200_sccz8530()
866 … scc_w[port].s.wr0.r.cmd=0; // clear command for next cycle (except for previous highpoint) in lisa_wb_Oxd200_sccz8530()
878 … scc_w[port].s.wr0.r.cmd=0; // clear command for next cycle (except for previous highpoint) in lisa_wb_Oxd200_sccz8530()
890 … scc_w[port].s.wr0.r.cmd=0; // clear command for next cycle (except for previous highpoint) in lisa_wb_Oxd200_sccz8530()
1150 …regnum=scc_w[port].s.wr0.r.reg; if (scc_w[port].s.wr0.r.cmd==1) {regnum|=8; scc_w[port].s.wr0.r.cm… in lisa_rb_Oxd200_sccz8530()
1152 …scc_w[port].s.wr0.r.reg=0; // reset register pointer back to zero … in lisa_rb_Oxd200_sccz8530()
[all …]
/dports/devel/asl/asl-current/tests/t_9900/
H A Dt_9900.asm20 movb *wr0+,*wr6
88 sra wr5,wr0
261 tmb *wr2,wr0
324 xorm *WR15,@1234h(wr2),wr0
351 crc @1234h(wr12),@5678h(wr13),wr0
/dports/deskutils/plan/plan-1.10.1/src/
H A Dnetplan.c56 static fd_set rd0, wr0, ex0; /* preset fd masks for main select */ variable
274 FD_ZERO(&wr0); in main()
285 wr = wr0; in main()
365 FD_CLR(fd, &wr0); in main()
772 FD_SET(fd, &wr0); in eval_message()
781 FD_SET(fd, &wr0); in eval_message()
786 FD_SET(fd, &wr0); in eval_message()
1383 FD_SET(fd, &wr0); in send_row()
1443 FD_SET(fd, &wr0); in reply()
1467 FD_SET(fd, &wr0); in error()
/dports/japanese/plan/plan-1.10.1/src/
H A Dnetplan.c56 static fd_set rd0, wr0, ex0; /* preset fd masks for main select */ variable
274 FD_ZERO(&wr0); in main()
285 wr = wr0; in main()
365 FD_CLR(fd, &wr0); in main()
772 FD_SET(fd, &wr0); in eval_message()
781 FD_SET(fd, &wr0); in eval_message()
786 FD_SET(fd, &wr0); in eval_message()
1383 FD_SET(fd, &wr0); in send_row()
1443 FD_SET(fd, &wr0); in reply()
1467 FD_SET(fd, &wr0); in error()
/dports/devel/tigcc/tigcc-0.96.b8_10/gnu/binutils-2.16.1/gas/testsuite/gas/arm/
H A Dunwind.s33 .save {wr0}
/dports/devel/djgpp-binutils/binutils-2.17/gas/testsuite/gas/arm/
H A Dunwind.s33 .save {wr0}
/dports/emulators/dolphin-emu/dolphin-3152428/Source/DSPSpy/tests/
H A Ddsp_base.inc80 lrri $wr0, @$ar0
186 srri @$ar0, $wr0
249 lrri $wr0, @$ar0
/dports/lang/gnatdroid-binutils-x86/binutils-2.27/gas/testsuite/gas/arm/
H A Dunwind.s35 .save {wr0}
/dports/devel/arm-elf-binutils/binutils-2.37/gas/testsuite/gas/arm/
H A Dunwind.s35 .save {wr0}
/dports/devel/gnulibiberty/binutils-2.37/gas/testsuite/gas/arm/
H A Dunwind.s35 .save {wr0}
/dports/lang/gnatdroid-binutils/binutils-2.27/gas/testsuite/gas/arm/
H A Dunwind.s35 .save {wr0}
/dports/devel/radare2/radare2-5.1.1/test/db/asm/
H A Di400424 ad "wr0" e4
/dports/devel/binutils/binutils-2.37/gas/testsuite/gas/arm/
H A Dunwind.s35 .save {wr0}
/dports/emulators/teo/teo/src/debug/
H A Ddreg.c128 disk[0].dkc->wr0, in dreg_GetText()
/dports/games/torcs/torcs-1.3.7/src/modules/simu/simuv2/
H A Dcar.cpp35 tdble wf0, wr0; in SimCarConfig() local
74 wr0 = w * (1 - gcfr); in SimCarConfig()
78 car->wheel[REAR_RGT].weight0 = wr0 * gcrrl; in SimCarConfig()
79 car->wheel[REAR_LFT].weight0 = wr0 * (1 - gcrrl); in SimCarConfig()
/dports/emulators/teo/teo/include/media/
H A Ddisk.h160 int wr0; /* $E7D0/$A7D0 */ member
/dports/science/py-pyscf/pyscf-2.0.1/pyscf/x2c/
H A Dsfx2c1e_grad.py169 wr0, vr0 = scipy.linalg.eigh(R0_mid)
170 wr0_sqrt = numpy.sqrt(wr0)
/dports/math/symphony/SYMPHONY-releases-5.6.17/SYMPHONY/src/LP/
H A Dlp_rowfunc.c415 int waiting_row_comp(const void *wr0, const void *wr1) in waiting_row_comp() argument
417 double v0 = (*((waiting_row **)wr0))->violation; in waiting_row_comp()
/dports/emulators/teo/teo/src/media/disk/controlr/
H A Dthmfc1.c830 switch (dsd->dkc->wr0 & CMD0_OP_MASK) in get_reg0()
846 if ((dsd->dkc->wr0 & CMD0_DETECT_SYNCHRO) != 0) in get_reg0()
1066 disk[dkcurr].dkc->wr0 = val; in set_reg0()

12345678910