| /dports/cad/electric/electric-7.00/src/usr/ |
| H A D | usrgraph.c | 633 io = xcreate(x_("pulldowns.txt"), el_filetypetext, M_("Menu dump file"), &truename); in us_dumppulldownmenus()
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| H A D | usrctech.c | 1032 f = xcreate(name, el_filetypetext, _("Technology Documentation File"), &truename); in us_printtechnology()
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| H A D | usreditemacs.c | 481 f = xcreate(file, el_filetypetext, _("Text File"), &truename); in us_editemacswritetextfile()
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| H A D | usreditpac.c | 540 f = xcreate(file, el_filetypetext, _("Text File"), &truename); in us_editpacwritetextfile()
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| H A D | usrcomek.c | 2414 xclose(xcreate(truepath(returninfstr(infstr)), us_filetypenews, 0, 0)); in us_help()
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| H A D | usrcomtv.c | 491 us_termaudit = xcreate(x_("emessages.txt"), el_filetypetext, 0, &truename); in us_terminal()
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| H A D | usredtecp.c | 248 f = xcreate(returninfstr(infstr), el_filetypetext, _("Technology Code File"), &truename); in us_tecfromlibinit()
272 f = xcreate(returninfstr(infstr), el_filetypetext, _("Technology Code File"), &truename); in us_tecfromlibinit()
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| /dports/cad/electric/electric-7.00/src/sim/ |
| H A D | simalsuser.c | 1185 fp = xcreate(x_("als.out"), el_filetypetext, M_("Simulation Trace File"), &truename);
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| H A D | simspice.cpp | 526 sim_spice_file = xcreate(deckfile, sim_filetypecdl, prompt, &pt); in sim_writespice()
541 sim_spice_file = xcreate(deckfile, sim_filetypespice, prompt, &pt); in sim_writespice()
666 sim_spice_file = xcreate(templatefile, sim_filetypectemp, _("CDL Template File"), &pt); in sim_writespice()
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| H A D | simtexsim.c | 84 sim_texfile = xcreate(filename, sim_filetypetegas, _("TEGAS File"), &truename); in sim_writetexnetlist()
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| H A D | simfasthenry.cpp | 106 io = xcreate(name, sim_filetypefasthenry, _("FastHenry File"), &truename); in sim_writefasthenrynetlist()
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| H A D | simirsim.c | 144 f = xcreate(netfile, sim_filetypeirsim, _("Netlist File"), &truename); in sim_writeirsim()
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| H A D | simsim.cpp | 106 f = xcreate(netfile, filetype, _("Netlist File"), &truename); in sim_writesim()
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| H A D | simspicerun.cpp | 362 outputfile = xcreate(outfile, sim_filetypespiceout, _("SPICE Output File"), &truename); in sim_spice_execute()
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| H A D | simalscom.c | 1711 vout = xcreate(par[1], sim_filetypealsvec, 0, &truename); in simals_vector_command()
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| H A D | simverilog.c | 212 sim_verfile = xcreate(name, sim_filetypeverilog, _("VERILOG File"), &truename); in sim_writevernetlist()
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| /dports/cad/electric/electric-7.00/src/io/ |
| H A D | ioedifo.c | 1616 io_fileout = xcreate(iname, io_filetypeedif, x_("EDIF File"), &truename); in io_edifwritefootprint()
2387 if ((stream->file = xcreate(filename, io_filetypeedif, _("EDIF File"), &truename)) == NULL) in EO_open_stream()
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| H A D | iocifout.c | 149 io_fileout = xcreate(name, io_filetypecif, _("CIF File"), &truename); in io_writeciflibrary()
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| H A D | iogdso.c | 203 io_gds_outfd = xcreate(name, io_filetypegds, _("GDS File"), &truename); in io_writegdslibrary()
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| H A D | iodxf.c | 194 io_fileout = xcreate(name, io_filetypedxf, _("DXF File"), &truename); in io_writedxflibrary()
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| /dports/cad/electric/electric-7.00/src/vhdl/ |
| H A D | vhdl.c | 881 vhdl_fp = xcreate(&(*intended)[5], filetype, prompt, &truefile); in vhdl_startoutput()
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| /dports/cad/electric/electric-7.00/src/misc/ |
| H A D | projecttool.c | 1184 io = xcreate(projfile, proj_filetypeproj, 0, 0); in proj_buildproject()
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| /dports/cad/electric/electric-7.00/src/include/ |
| H A D | global.h | 2350 FILE *xcreate(CHAR *name, INTBIG filetype, CHAR *prompt, CHAR **truename);
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| /dports/cad/electric/electric-7.00/src/rout/ |
| H A D | routmaze.c | 537 ro_mazedebuggingout = xcreate(x_("routing"), el_filetypetext, 0, &dummy); in ro_mazeroutenet()
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| /dports/cad/electric/electric-7.00/src/drc/ |
| H A D | drc.c | 332 f = xcreate(x_("ecaddrc.RUL"), filetypedrac, _("ECAD DRC Control File"), &truename); in dr_set()
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