/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | ux500.yaml | 18 - description: ST-Ericsson HREF (pre-v60) 23 - description: ST-Ericsson HREF520 28 - description: ST-Ericsson HREF (v60+)
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsPreLegalizerCombiner.cpp | 123 const MipsSubtarget &ST = MF.getSubtarget<MipsSubtarget>(); in runOnMachineFunction() local 125 static_cast<const MipsLegalizerInfo *>(ST.getLegalizerInfo()); in runOnMachineFunction() 130 ST, /*MDT*/ nullptr, LI); in runOnMachineFunction()
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H A D | MipsPostLegalizerCombiner.cpp | 136 const MipsSubtarget &ST = MF.getSubtarget<MipsSubtarget>(); in runOnMachineFunction() local 138 static_cast<const MipsLegalizerInfo *>(ST.getLegalizerInfo()); in runOnMachineFunction() 146 RuleConfig, ST, MDT, LI); in runOnMachineFunction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUMarkLastScratchLoad.cpp | 63 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local 64 if (ST.getGeneration() < AMDGPUSubtarget::GFX12) in runOnMachineFunction() 70 SII = ST.getInstrInfo(); in runOnMachineFunction()
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H A D | SIPeepholeSDWA.cpp | 70 const GCNSubtarget &ST) const; 932 if (!ST.hasSDWASdst()) { in isConvertibleToSDWA() 939 if (!ST.hasSDWAOutModsVOPC() && in isConvertibleToSDWA() 949 if (!ST.hasSDWAMac() && (Opc == AMDGPU::V_FMAC_F16_e32 || in isConvertibleToSDWA() 1170 if (ST.hasSDWAScalar() && ConstantBusCount == 0 && Op.isReg() && in legalizeScalarOperands() 1189 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local 1191 if (!ST.hasSDWA() || skipFunction(MF.getFunction())) in runOnMachineFunction() 1195 TRI = ST.getRegisterInfo(); in runOnMachineFunction() 1196 TII = ST.getInstrInfo(); in runOnMachineFunction() 1214 pseudoOpConvertToVOP2(*PotentialMI, ST); in runOnMachineFunction() [all …]
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H A D | SILowerWWMCopies.cpp | 101 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local 102 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction() 108 TRI = ST.getRegisterInfo(); in runOnMachineFunction()
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H A D | AMDGPUPromoteAlloca.cpp | 167 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in getMaxVGPRs() local 168 unsigned MaxVGPRs = ST.getMaxNumVGPRs(ST.getWavesPerEU(F).first); in getMaxVGPRs() 232 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F); in run() local 233 if (!ST.isPromoteAllocaEnabled()) in run() 891 const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(TM, F); in getLocalSizeYZ() local 902 ST.makeLIDRangeMetadata(LocalSizeY); in getLocalSizeYZ() 903 ST.makeLIDRangeMetadata(LocalSizeZ); in getLocalSizeYZ() 969 ST.makeLIDRangeMetadata(LoadZU); in getLocalSizeYZ() 1007 ST.makeLIDRangeMetadata(CI); in getWorkitemID() 1189 LocalMemLimit = ST.getAddressableLocalMemorySize(); in hasSufficientLocalMem() [all …]
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H A D | R600Packetizer.cpp | 142 R600PacketizerList(MachineFunction &MF, const R600Subtarget &ST, in R600PacketizerList() argument 145 TII(ST.getInstrInfo()), in R600PacketizerList() 147 VLIW5 = !ST.hasCaymanISA(); in R600PacketizerList() 321 const R600Subtarget &ST = Fn.getSubtarget<R600Subtarget>(); in runOnMachineFunction() local 322 const R600InstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction() 327 R600PacketizerList Packetizer(Fn, ST, MLI); in runOnMachineFunction()
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/freebsd/contrib/llvm-project/llvm/tools/llvm-xray/ |
H A D | xray-stacks.cpp | 684 StackTrie ST; in __anon8f09f5870802() local 735 auto error = ST.accountRecord(Record, &AccountRecordState); in __anon8f09f5870802() 745 if (ST.isEmpty()) { in __anon8f09f5870802() 756 ST.printAllAggregatingThreads<AggregationType::TOTAL_TIME>( in __anon8f09f5870802() 760 ST.printAllAggregatingThreads<AggregationType::INVOCATION_COUNT>( in __anon8f09f5870802() 767 ST.printAllPerThread<AggregationType::TOTAL_TIME>(outs(), FuncIdHelper, in __anon8f09f5870802() 771 ST.printAllPerThread<AggregationType::INVOCATION_COUNT>( in __anon8f09f5870802() 781 ST.printAggregatingThreads(outs(), FuncIdHelper); in __anon8f09f5870802() 783 ST.printPerThread(outs(), FuncIdHelper); in __anon8f09f5870802() 785 ST.printIgnoringThreads(outs(), FuncIdHelper); in __anon8f09f5870802()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86FastPreTileConfig.cpp | 46 const X86Subtarget *ST = nullptr; member in __anon7fe496620111::X86FastPreTileConfig 167 if (ST->hasAVX512()) { in InitializeTileConfigStackSpace() 172 } else if (ST->hasAVX2()) { in InitializeTileConfigStackSpace() 181 assert(ST->hasSSE2() && "AMX should assume SSE2 enabled"); in InitializeTileConfigStackSpace() 182 unsigned StoreOpc = ST->hasAVX() ? X86::VMOVUPSmr : X86::MOVUPSmr; in InitializeTileConfigStackSpace() 515 CfgSS = MFI->CreateStackObject(ST->getTileConfigSize(), in configBasicBlock() 516 ST->getTileConfigAlignment(), false); in configBasicBlock() 658 ST = &MFunc.getSubtarget<X86Subtarget>(); in runOnMachineFunction() 659 TII = ST->getInstrInfo(); in runOnMachineFunction() 662 TRI = ST->getRegisterInfo(); in runOnMachineFunction()
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H A D | X86LowerAMXType.cpp | 229 void combineBitcastStore(BitCastInst *Bitcast, StoreInst *ST); 270 IRBuilder<> Builder(ST); in combineBitcastStore() 274 Value *I8Ptr = ST->getOperand(1); in combineBitcastStore() 400 StoreInst *ST = nullptr; in visit() local 402 ST = dyn_cast<StoreInst>(U.getUser()); in visit() 403 if (ST) in visit() 406 if (!ST) { in visit() 431 combineBitcastStore(Bitcast, ST); in visit() 433 DeadInsts.push_back(ST); in visit() 710 bool combineCastStore(IntrinsicInst *Cast, StoreInst *ST); [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCTargetMachine.cpp | 310 const PPCSubtarget &ST = C->MF->getSubtarget<PPCSubtarget>(); in createPPCMachineScheduler() local 312 new ScheduleDAGMILive(C, ST.usePPCPreRASchedStrategy() ? in createPPCMachineScheduler() 317 if (ST.hasStoreFusion()) in createPPCMachineScheduler() 319 if (ST.hasFusion()) in createPPCMachineScheduler() 327 const PPCSubtarget &ST = C->MF->getSubtarget<PPCSubtarget>(); in createPPCPostMachineScheduler() local 329 new ScheduleDAGMI(C, ST.usePPCPostRASchedStrategy() ? in createPPCPostMachineScheduler() 333 if (ST.hasStoreFusion()) in createPPCPostMachineScheduler() 335 if (ST.hasFusion()) in createPPCPostMachineScheduler()
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H A D | PPCTargetTransformInfo.h | 32 const PPCSubtarget *ST; variable 35 const PPCSubtarget *getST() const { return ST; } in getST() 40 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), in PPCTTIImpl() 41 TLI(ST->getTargetLowering()) {} in PPCTTIImpl()
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H A D | PPCScheduleP10.td | 52 def P10_ST : ProcResource<2>; // Two ST-D pipelines. 311 // A ST pipeline may take 3 cycles to complete. 385 // Save 1 cycles if pipeline F2 reads the data from pipelines ST, SX, FX, F2, PM. 388 // Save 1 cycles if pipeline FX reads the data from pipelines ST, SX, FX, F2, PM. 391 // Save 1 cycles if pipeline LD reads the data from pipelines ST, SX, FX, F2. 397 // Save 1 cycles if pipeline PM reads the data from pipelines ST, SX, FX, F2, PM. 400 // Save 1 cycles if pipeline ST reads the data from pipelines ST, SX, FX, F2, PM. 403 // Save 1 cycles if pipeline SX reads the data from pipelines ST, SX, FX, F2, PM, MM.
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonTargetTransformInfo.h | 39 const HexagonSubtarget &ST; variable 42 const HexagonSubtarget *getST() const { return &ST; } in getST() 56 ST(*TM->getSubtargetImpl(F)), TLI(*ST.getTargetLowering()) {} in HexagonTTIImpl()
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H A D | HexagonHazardRecognizer.h | 50 const HexagonSubtarget &ST) in HexagonHazardRecognizer() argument 51 : Resources(ST.createDFAPacketizer(II)), TII(HII) { } in HexagonHazardRecognizer()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | Thumb1InstrInfo.cpp | 138 const ARMSubtarget &ST = MF.getSubtarget<ARMSubtarget>(); in expandLoadStackGuard() local 147 else if (ST.genExecuteOnly() && ST.hasV8MBaselineOps()) in expandLoadStackGuard() 149 else if (ST.genExecuteOnly()) in expandLoadStackGuard()
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/freebsd/sys/contrib/device-tree/Bindings/arm/ux500/ |
H A D | boards.txt | 1 ST-Ericsson Ux500 boards 39 model = "ST-Ericsson HREF (pre-v60) and ST UIB";
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVCodeGenPrepare.cpp | 38 const RISCVSubtarget *ST; member in __anon8b5cb20f0111::RISCVCodeGenPrepare 65 if (!ST->is64Bit()) in visitAnd() 164 ST = &TM.getSubtarget<RISCVSubtarget>(F); in runOnFunction()
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H A D | RISCVRVVInitUndef.cpp | 58 const RISCVSubtarget *ST; member in __anon7b25e70f0111::RISCVInitUndef 270 if (ST->enableSubRegLiveness()) in processBasicBlock() 279 ST = &MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction() 280 if (!ST->hasVInstructions()) in runOnMachineFunction() 284 TII = ST->getInstrInfo(); in runOnMachineFunction()
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/freebsd/contrib/llvm-project/llvm/include/llvm/MCA/ |
H A D | CodeEmitter.h | 52 CodeEmitter(const MCSubtargetInfo &ST, const MCAsmBackend &AB, in CodeEmitter() argument 54 : STI(ST), MAB(AB), MCE(CE), Sequence(S), Encodings(S.size()) {} in CodeEmitter()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyFrameLowering.cpp | 251 auto &ST = MF.getSubtarget<WebAssemblySubtarget>(); in eliminateCallFramePseudoInstr() local 252 const auto *TII = ST.getInstrInfo(); in eliminateCallFramePseudoInstr() 272 auto &ST = MF.getSubtarget<WebAssemblySubtarget>(); in emitPrologue() local 273 const auto *TII = ST.getInstrInfo(); in emitPrologue() 336 auto &ST = MF.getSubtarget<WebAssemblySubtarget>(); in emitEpilogue() local 337 const auto *TII = ST.getInstrInfo(); in emitEpilogue()
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/freebsd/sys/contrib/device-tree/Bindings/cpufreq/ |
H A D | cpufreq-st.txt | 1 Binding for ST's CPUFreq driver 4 ST's CPUFreq driver attempts to read 'process' and 'version' attributes 34 This requires the ST CPUFreq driver to supply 'process' and 'version' info.
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
H A D | RISCVPostLegalizerCombiner.cpp | 142 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction() local 143 const auto *LI = ST.getLegalizerInfo(); in runOnMachineFunction() 155 RuleConfig, ST, MDT, LI); in runOnMachineFunction()
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H A D | RISCVPreLegalizerCombiner.cpp | 138 const RISCVSubtarget &ST = MF.getSubtarget<RISCVSubtarget>(); in runOnMachineFunction() local 139 const auto *LI = ST.getLegalizerInfo(); in runOnMachineFunction() 150 ST, MDT, LI); in runOnMachineFunction()
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