/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonTargetTransformInfo.cpp | 51 return ST.useHVXOps() && HexagonAutoHVX; in useHVX() 58 if (!ST.isTypeForHVX(VecTy)) in isHVXVectorType() 60 if (ST.useHVXV69Ops() || !VecTy->getElementType()->isFloatingPointTy()) in isHVXVectorType() 62 return ST.useHVXV68Ops() && EnableV68FloatAutoHVX; in isHVXVectorType() 132 return useHVX() ? ST.getVectorLength()*8 : 32; in getMinVectorRegisterBitWidth() 138 return ElementCount::getFixed((8 * ST.getVectorLength()) / ElemWidth); in getMinimumVF() 359 return HexagonMaskedVMem && ST.isTypeForHVX(DataType); in isLegalMaskedStore() 365 return HexagonMaskedVMem && ST.isTypeForHVX(DataType); in isLegalMaskedLoad() 371 return ST.getL1PrefetchDistance(); in getPrefetchDistance() 375 return ST.getL1CacheLineSize(); in getCacheLineSize()
|
/freebsd/contrib/file/magic/Magdir/ |
H A D | motorola | 35 # ATARI ST relocatable PRG 40 # not larger than 1 MB (which is a lot on ST). 42 0 belong&0xFFFFFFF0 0x601A0000 Atari ST M68K contiguous executable 47 0 belong&0xFFFFFFF0 0x601B0000 Atari ST M68K non-contig executable 53 # Atari ST/TT... program format (sent by Wolfram Kleff <kleff@cs.uni-bonn.de>)
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPULegalizerInfo.cpp | 574 : ST(ST_) { in AMDGPULegalizerInfo() 684 if (ST.hasVOP3PInsts() && ST.hasAddNoCarry() && ST.hasIntClamp()) { in AMDGPULegalizerInfo() 774 if (ST.hasMad64_32()) in AMDGPULegalizerInfo() 925 if (ST.hasVOP3PInsts()) in AMDGPULegalizerInfo() 1034 if (ST.hasMadF16() && ST.hasMadMacF32Insts()) in AMDGPULegalizerInfo() 1075 if (ST.has16BitInsts()) in AMDGPULegalizerInfo() 1086 if (ST.has16BitInsts()) in AMDGPULegalizerInfo() 1178 if (ST.has16BitInsts()) in AMDGPULegalizerInfo() 1191 if (ST.has16BitInsts()) in AMDGPULegalizerInfo() 1214 if (ST.has16BitInsts()) in AMDGPULegalizerInfo() [all …]
|
H A D | AMDGPUCallLowering.cpp | 213 if (ST.enableFlatScratch()) { in getStackAddress() 245 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in assignValueToAddress() local 1010 auto TRI = ST.getRegisterInfo(); in doCallerAndCalleePassArgsTheSameWay() 1073 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in areCalleeOutgoingArgsTailCallable() 1160 if (!ST.enableFlatScratch()) { in handleImplicitCallArguments() 1214 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in lowerTailCall() 1228 MF, *TRI, MRI, *ST.getInstrInfo(), *ST.getRegBankInfo(), *MIB, in lowerTailCall() 1275 assert(isAligned(ST.getStackAlignment(), FPDiff) && in lowerTailCall() 1330 MF, *TRI, MRI, *ST.getInstrInfo(), *ST.getRegBankInfo(), *MIB, in lowerTailCall() 1402 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in lowerCall() [all …]
|
H A D | SIFixVGPRCopies.cpp | 53 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local 54 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in runOnMachineFunction() 55 const SIInstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction()
|
H A D | AMDGPUResourceUsageAnalysis.h | 45 int32_t getTotalNumSGPRs(const GCNSubtarget &ST) const; 48 int32_t getTotalNumVGPRs(const GCNSubtarget &ST, int32_t NumAGPR, 50 int32_t getTotalNumVGPRs(const GCNSubtarget &ST) const;
|
H A D | SIInstrInfo.cpp | 68 RI(ST), ST(ST) { in SIInstrInfo() 69 SchedModel.init(&ST); in SIInstrInfo() 1030 if (ST.hasMovB64()) { in copyPhysReg() 1079 if (ST.hasMovB64()) { in copyPhysReg() 2135 if (ST.hasMovB64()) { in expandPostRAPseudo() 2599 if (ST.hasMovB64() && in expandMovDPP64() 4657 if (!ST.hasSDWA()) { in verifyInstruction() 6922 if (ST.hasDLInsts()) in moveToVALUImpl() 7540 if (ST.hasDLInsts()) { in lowerScalarXnor() 8459 if (ST.isAmdHsaOS()) { in getDefaultRsrcDataFormat() [all …]
|
H A D | AMDGPUAttributor.cpp | 155 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in hasApertureRegs() local 156 return ST.hasApertureRegs(); in hasApertureRegs() 161 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in supportsGetDoorbellID() local 162 return ST.supportsGetDoorbellID(); in supportsGetDoorbellID() 166 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in getFlatWorkGroupSizes() local 167 return ST.getFlatWorkGroupSizes(F); in getFlatWorkGroupSizes() 172 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in getMaximumFlatWorkGroupRange() local 173 return {ST.getMinFlatWorkGroupSize(), ST.getMaxFlatWorkGroupSize()}; in getMaximumFlatWorkGroupRange() 187 const GCNSubtarget &ST = TM.getSubtarget<GCNSubtarget>(F); in getWavesPerEU() local 188 return ST.getWavesPerEU(F, FlatWorkGroupSize); in getWavesPerEU() [all …]
|
H A D | AMDGPUInsertSingleUseVDST.cpp | 58 const auto &ST = MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() local 59 if (!ST.hasVGPRSingleUseHintInsts()) in runOnMachineFunction() 62 SII = ST.getInstrInfo(); in runOnMachineFunction()
|
H A D | SIShrinkInstructions.cpp | 32 const GCNSubtarget *ST; member in __anon90f6a07b0111::SIShrinkInstructions 214 if (!ST->hasSCmpK()) in shrinkScalarCompare() 316 const unsigned NSAMaxSize = ST->getNSAMaxSize(); in shrinkMIMG() 386 if (!ST->hasVOP3Literal()) in shrinkMadFma() 428 NewOpcode = ST->hasTrue16BitInsts() ? AMDGPU::V_FMAAK_F16_t16 in shrinkMadFma() 756 if (!ST->hasGFX10_3Insts()) in tryReplaceDeadSDST() 776 ST = &MF.getSubtarget<GCNSubtarget>(); in runOnMachineFunction() 777 TII = ST->getInstrInfo(); in runOnMachineFunction() 780 unsigned VCCReg = ST->isWave32() ? AMDGPU::VCC_LO : AMDGPU::VCC; in runOnMachineFunction() 888 ST->getGeneration() >= AMDGPUSubtarget::GFX10 && in runOnMachineFunction() [all …]
|
H A D | AMDGPUResourceUsageAnalysis.cpp | 84 const GCNSubtarget &ST) const { in getTotalNumSGPRs() 86 IsaInfo::getNumExtraSGPRs(&ST, UsesVCC, UsesFlatScratch, in getTotalNumSGPRs() 87 ST.getTargetID().isXnackOnOrAny()); in getTotalNumSGPRs() 91 const GCNSubtarget &ST, int32_t ArgNumAGPR, int32_t ArgNumVGPR) const { in getTotalNumVGPRs() argument 92 return AMDGPU::getTotalNumVGPRs(ST.hasGFX90AInsts(), ArgNumAGPR, ArgNumVGPR); in getTotalNumVGPRs() 96 const GCNSubtarget &ST) const { in getTotalNumVGPRs() 97 return getTotalNumVGPRs(ST, NumAGPR, NumVGPR); in getTotalNumVGPRs() 171 const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>(); in analyzeResourceUsage() local 174 const SIInstrInfo *TII = ST.getInstrInfo(); in analyzeResourceUsage() 220 if (ST.hasMAIInsts()) { in analyzeResourceUsage() [all …]
|
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VETargetTransformInfo.h | 56 const VESubtarget *ST; variable 59 const VESubtarget *getST() const { return ST; } in getST() 85 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), in VETTIImpl() 86 TLI(ST->getTargetLowering()) {} in VETTIImpl()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiTargetTransformInfo.h | 33 const LanaiSubtarget *ST; variable 36 const LanaiSubtarget *getST() const { return ST; } in getST() 41 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), in LanaiTTIImpl() 42 TLI(ST->getTargetLowering()) {} in LanaiTTIImpl()
|
/freebsd/contrib/llvm-project/llvm/lib/IR/ |
H A D | SymbolTableListTraitsImpl.h | 74 if (ValueSymbolTable *ST = getSymTab(Owner)) in addNodeToList() local 75 ST->reinsertValue(V); in addNodeToList() 83 if (ValueSymbolTable *ST = getSymTab(getListOwner())) in removeNodeFromList() local 84 ST->removeValueName(V->getValueName()); in removeNodeFromList()
|
H A D | Value.cpp | 260 ST = nullptr; in getSymTab() 342 ValueSymbolTable *ST; in setNameImpl() local 343 if (getSymTab(this, ST)) in setNameImpl() 385 ValueSymbolTable *ST = nullptr; in takeName() local 389 if (getSymTab(this, ST)) { in takeName() 397 if (ST) in takeName() 408 if (!ST) { in takeName() 409 if (getSymTab(this, ST)) { in takeName() 423 if (ST == VST) { in takeName() 440 if (ST) in takeName() [all …]
|
/freebsd/crypto/openssl/crypto/sha/asm/ |
H A D | sha512-mips.pl | 101 $ST="sd"; # store to memory 116 $ST="sw"; # store to memory 248 $ST @X[0],`($i%16)*$SZ`($sp) # offload to ring buffer 414 $ST $A,0*$SZ($ctx) 416 $ST $B,1*$SZ($ctx) 418 $ST $C,2*$SZ($ctx) 420 $ST $D,3*$SZ($ctx) 421 $ST $E,4*$SZ($ctx) 422 $ST $F,5*$SZ($ctx) 423 $ST $G,6*$SZ($ctx) [all …]
|
/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | arm,pl18x.yaml | 90 be discovered. On ST Micro variants, a second register window may be 107 description: ST Micro-specific property, bus signal direction pins used for 112 description: ST Micro-specific property, bus signal direction pins used for 117 description: ST Micro-specific property, bus signal direction pins used for 122 description: ST Micro-specific property, bus signal direction pins used for 127 description: ST Micro-specific property, CMD signal direction used for 132 description: ST Micro-specific property, feedback clock FBCLK signal pin 137 description: ST Micro-specific property, signal direction polarity used for 142 description: ST Micro-specific property, data and command phase relation, 147 description: ST Micro-specific property, use CKIN pin from an external
|
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZTargetTransformInfo.h | 23 const SystemZSubtarget *ST; variable 26 const SystemZSubtarget *getST() const { return ST; } in getST() 31 bool isInt128InVR(Type *Ty) { return Ty->isIntegerTy(128) && ST->hasVector(); } in isInt128InVR() 35 : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)), in SystemZTTIImpl() 36 TLI(ST->getTargetLowering()) {} in SystemZTTIImpl()
|
H A D | SystemZTargetTransformInfo.cpp | 79 if ((!ST->hasVector() && BitSize > 64) || BitSize > 128) in getIntImmCost() 189 const SystemZInstrInfo *TII = ST->getInstrInfo(); in getIntImmCostInst() 277 if (ST->hasPopulationCount() && TyWidth <= 64) in getPopcntSupport() 361 if (ST->hasVector()) in getNumberOfRegisters() 514 if (ST->hasLoadStoreOnCond2()) in getArithmeticInstrCost() 526 else if (ST->hasVector()) { in getArithmeticInstrCost() 561 if (ST->hasVectorEnhancements1()) in getArithmeticInstrCost() 609 if (ST->hasVector()) { in getShuffleCost() 801 if (ST->hasLoadStoreOnCond2()) in getCastInstrCost() 843 else if (ST->hasVector()) { in getCastInstrCost() [all …]
|
/freebsd/sys/i386/i386/ |
H A D | db_disasm.c | 83 #define ST 31 /* FP stack top */ macro 429 /*0*/ { "fadd", SNGL, op2(STI,ST), 0 }, 430 /*1*/ { "fmul", SNGL, op2(STI,ST), 0 }, 431 /*2*/ { "fcom", SNGL, op2(STI,ST), 0 }, 432 /*3*/ { "fcomp", SNGL, op2(STI,ST), 0 }, 433 /*4*/ { "fsub", SNGL, op2(STI,ST), 0 }, 434 /*5*/ { "fsubr", SNGL, op2(STI,ST), 0 }, 435 /*6*/ { "fdiv", SNGL, op2(STI,ST), 0 }, 436 /*7*/ { "fdivr", SNGL, op2(STI,ST), 0 }, 1106 case op2(ST,STI): in db_disasm_esc() [all …]
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64SLSHardening.cpp | 45 const AArch64Subtarget *ST; member in __anonfeddaf110111::AArch64SLSHardening 71 static void insertSpeculationBarrier(const AArch64Subtarget *ST, in insertSpeculationBarrier() argument 83 const TargetInstrInfo *TII = ST->getInstrInfo(); in insertSpeculationBarrier() 84 unsigned BarrierOpc = ST->hasSB() && !AlwaysUseISBDSB in insertSpeculationBarrier() 94 ST = &MF.getSubtarget<AArch64Subtarget>(); in runOnMachineFunction() 124 if (!ST->hardenSlsRetBr()) in hardenReturnsAndBRs() 134 insertSpeculationBarrier(ST, MBB, std::next(MBBI), MI.getDebugLoc()); in hardenReturnsAndBRs() 379 if (!ST->hardenSlsBlr()) in hardenBLRs()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86LowerTileCopy.cpp | 73 const X86Subtarget &ST = MF.getSubtarget<X86Subtarget>(); in runOnMachineFunction() local 74 const X86InstrInfo *TII = ST.getInstrInfo(); in runOnMachineFunction() 88 const TargetRegisterInfo *TRI = ST.getRegisterInfo(); in runOnMachineFunction() 110 #define GET_EGPR_IF_ENABLED(OPC) (ST.hasEGPR() ? OPC##_EVEX : OPC) in runOnMachineFunction()
|
/freebsd/contrib/llvm-project/openmp/runtime/src/ |
H A D | kmp_dispatch.h | 70 typedef typename traits_t<T>::signed_t ST; typedef 75 ST st; // signed 112 typedef typename traits_t<T>::signed_t ST; typedef 115 ST st; // signed 160 typedef typename traits_t<T>::signed_t ST; typedef 164 volatile ST num_done; 402 typedef typename traits_t<UT>::signed_t ST; in __kmp_dispatch_dxo() typedef 453 test_then_inc<ST>((volatile ST *)&sh->u.s.ordered_iteration); in __kmp_dispatch_dxo()
|
H A D | kmp_dispatch_hier.h | 139 typedef typename traits_t<T>::signed_t ST; typedef 144 ST st[2]; 334 typedef typename traits_t<T>::signed_t ST; typedef 389 ST get_next_st(kmp_uint64 index) const { in get_next_st() 405 ST get_curr_st(kmp_uint64 index) const { in get_curr_st() 475 typedef typename traits_t<T>::signed_t ST; typedef 503 ST my_st; in next_recurse() 529 ST chunk = (ST)get_chunk(hier_level); in next_recurse() 636 const ST *new_chunks) const { in need_to_reallocate() 713 kmp_int32 *p_last, T *p_lb, T *p_ub, ST *p_st) { in next() [all …]
|
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | MachinePipeliner.h | 450 const TargetSubtargetInfo *ST; variable 496 ResourceManager(const TargetSubtargetInfo *ST, SwingSchedulerDAG *DAG) in ResourceManager() argument 497 : STI(ST), SM(ST->getSchedModel()), ST(ST), TII(ST->getInstrInfo()), in ResourceManager() 498 DAG(DAG), UseDFA(ST->useDFAforSMS()), in ResourceManager() 553 const TargetSubtargetInfo &ST; variable 562 : ST(mf->getSubtarget()), MRI(mf->getRegInfo()), in SMSchedule() 563 ProcItinResources(&ST, DAG) {} in SMSchedule()
|