| /freebsd/contrib/netbsd-tests/bin/cp/ |
| H A D | t_cp.sh | 39 reset() { function
54 reset
108 reset
118 reset
131 reset
142 reset
154 reset
167 reset
179 reset
195 reset
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | mt8183-afe-pcm.txt | 7 - resets: Must contain an entry for each entry in reset-names
8 See ../reset/reset.txt for details.
9 - reset-names: should have these reset names:
28 reset-names = "audiosys";
|
| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | intel,lgm-usb-phy.yaml | 24 - description: USB PHY and Host controller reset
25 - description: APB BUS reset
26 - description: General Hardware reset
28 reset-names:
42 - reset-names
56 reset-names = "phy", "apb", "phy31";
|
| H A D | allwinner,sun9i-a80-usb-phy.yaml | 45 - description: Normal USB PHY reset
48 reset-names:
70 - reset-names
93 reset-names:
99 #include <dt-bindings/reset/sun9i-a80-usb.h>
107 reset-names = "phy";
114 #include <dt-bindings/reset/sun9i-a80-usb.h>
127 reset-names = "phy",
|
| /freebsd/sys/contrib/device-tree/src/arm/aspeed/ |
| H A D | aspeed-bmc-facebook-greatlakes.dts | 56 aspeed,reset-type = "soc";
252 /*C0-C7*/ "presence-ocp-nic","","","reset-cause-nic-primary",
253 "reset-cause-nic-secondary","","","",
256 /*F0-F7*/ "slot1-bmc-reset-button","slot2-bmc-reset-button",
257 "slot3-bmc-reset-button","slot4-bmc-reset-button",
267 /*M0-M7*/ "","power-nic-bmc-enable","","usb-bmc-enable","","reset-cause-usb-hub","","",
271 "reset-cause-pcie-slot1","reset-cause-pcie-slot2",
272 "reset-cause-pcie-slot3","reset-cause-pcie-slot4","","",
283 /*Y0-Y7*/ "","","","reset-cause-emmc","","","","",
|
| /freebsd/sys/dev/mlx4/mlx4_core/ |
| H A D | mlx4_reset.c | 44 void __iomem *reset; in mlx4_reset() local
92 reset = ioremap(pci_resource_start(dev->persist->pdev, 0) + in mlx4_reset()
95 if (!reset) { in mlx4_reset()
104 sem = readl(reset + MLX4_SEM_OFFSET); in mlx4_reset()
114 iounmap(reset); in mlx4_reset()
119 writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET); in mlx4_reset()
120 iounmap(reset); in mlx4_reset()
|
| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | delta,tn48m-cpld.yaml | 19 It is also being used as a GPIO expander and reset controller
47 "^reset-controller?$":
48 $ref: ../reset/delta,tn48m-reset.yaml
85 reset-controller {
86 compatible = "delta,tn48m-reset";
87 #reset-cells = <1>;
|
| /freebsd/sys/contrib/device-tree/Bindings/display/tegra/ |
| H A D | nvidia,tegra20-host1x.yaml | 73 - description: module reset
76 reset-names:
137 - reset-names
160 reset-names:
260 reset-names = "mpe";
269 reset-names = "vi";
278 reset-names = "epp";
287 reset-names = "isp";
314 reset-names = "dc";
327 reset-names = "dc";
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/watchdog/ |
| H A D | atmel,at91sam9-wdt.yaml | 45 Hardware watchdog uses the at91 watchdog reset.
49 to trigger a software reset.
53 atmel,reset-type:
59 Assert peripherals and processor reset signals.
62 Assert the processor reset signal.
78 watchdog reset time depends on mean CPU usage and will not reset at all
97 atmel,reset-type:
107 atmel,reset-type: ['atmel,watchdog-type']
122 atmel,reset-type = "all";
|
| H A D | atmel-wdt.txt | 21 use the at91 watchdog reset. Software watchdog use the watchdog
22 interrupt to trigger a software reset.
23 - atmel,reset-type : Should be "proc" or "all".
24 "all" : assert peripherals and processor reset signals
25 "proc" : assert the processor reset signal
32 watchdog reset time depends on mean CPU usage and will not reset at all
46 atmel,reset-type = "all";
|
| H A D | realtek,otto-wdt.yaml | 16 interrupt, although the phase 2 interrupt will occur with the system reset.
17 - Phase 1: During this phase, the WDT can be pinged to reset the timeout.
19 system some time to clean up, or notify others that it's going to reset.
20 During this phase, pinging the WDT has no effect, and a reset is
50 realtek,reset-mode:
53 Specify how the system is reset after a timeout. Defaults to "cpu" if
62 Reset the execution pointer, but don't actually reset any hardware
80 realtek,reset-mode = "soc";
|
| /freebsd/sys/contrib/device-tree/src/arm/amlogic/ |
| H A D | meson8b.dtsi | 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h>
12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h>
395 reset: reset-controller@4404 { label
398 #reset-cells = <1>;
594 #reset-cells = <1>;
605 <&reset RESET_VENCI>,
606 <&reset RESET_VENCP>,
608 <&reset RESET_VENCL>,
609 <&reset RESET_VIU>,
610 <&reset RESET_VENC>,
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | ohci-st.txt | 16 - resets : phandle to the powerdown and reset controller for the USB IP
17 - reset-names : should be "power" and "softreset".
18 See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml
19 See: Documentation/devicetree/bindings/reset/reset.txt
35 reset-names = "power", "softreset";
|
| H A D | nvidia,tegra20-ehci.txt | 16 - resets : Must contain an entry for each entry in reset-names.
17 See ../reset/reset.txt for details.
18 - reset-names : Must include the following entries:
22 - nvidia,needs-double-reset : boolean is to be set for some of the Tegra20
23 USB ports, which need reset twice due to hardware issues.
|
| /freebsd/sys/contrib/device-tree/Bindings/reset/ |
| H A D | qcom,pdc-global.yaml | 4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
35 '#reset-cells':
41 - '#reset-cells'
47 pdc_reset: reset-controller@b2e0000 {
50 #reset-cells = <1>;
|
| H A D | brcm,bcm63138-pmb.txt | 4 Please also refer to reset.txt in this directory for common reset
11 - #reset-cells: must be 2 first cell is the address within the bus instance designated
15 pmb0: reset-controller@4800c0 {
18 #reset-cells = <2>;
|
| H A D | st,stih407-picophyreset.yaml | 4 $id: http://devicetree.org/schemas/reset/st,stih407-picophyreset.yaml#
13 This binding describes a reset controller device that is used to enable and
26 '#reset-cells':
31 - '#reset-cells'
37 #include <dt-bindings/reset/stih407-resets.h>
41 #reset-cells = <1>;
|
| /freebsd/sys/contrib/device-tree/Bindings/i2c/ |
| H A D | i2c-mt7621.txt | 10 - resets: phandle to the reset controller asserting this device in
11 reset
12 See ../reset/reset.txt for details.
24 reset-names = "i2c";
|
| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | snps,dw-pcie-common.yaml | 142 reset-names:
147 - description: Data Bus Interface (DBI) domain reset
149 - description: AXI-bus Master interface reset
151 - description: AXI-bus Slave interface reset
153 - description: Application-dependent interface reset
157 - description: Controller sticky CSR flags reset
164 - description: PCS/PHY block reset
166 - description: PMC hot reset signal
168 - description: Cold reset signal
205 reset-gpio:
[all …]
|
| H A D | hisilicon-histb-pcie.txt | 28 - resets: List of phandle and reset specifier pairs as listed in reset-names
30 - reset-names: Must include the following entries:
31 "soft": soft reset;
32 "sys": sys reset;
33 "bus": bus reset.
36 - reset-gpios: The gpio to generate PCIe PERST# assert and deassert signal.
66 reset-names = "soft", "sys", "bus";
|
| /freebsd/tests/sys/compat32/aarch64/ |
| H A D | swp_cond_test_impl.S | 36 bl reset
47 bl reset
63 bl reset
77 bl reset
93 bl reset
106 bl reset
122 bl reset
136 bl reset
152 bl reset
165 bl reset
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm/st/ |
| H A D | stm32mp151a-prtt1c.dts | 67 reset-gpios = <&gpiod 8 GPIO_ACTIVE_LOW>;
112 reset-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>;
113 reset-assert-us = <10>;
114 reset-deassert-us = <35>;
123 reset-assert-us = <10>;
124 reset-deassert-us = <35>;
134 reset-assert-us = <10>;
135 reset-deassert-us = <35>;
143 reset-gpios = <&gpiog 9 GPIO_ACTIVE_LOW>;
144 reset-assert-us = <10000>;
[all …]
|
| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | stericsson,u8500-clks.yaml | 17 clocks - RTC (32 kHz), CPU clock (SMP TWD), PRCMU (power reset and
18 control management unit) clocks and PRCC (peripheral reset and
38 description: A subnode with one clock cell for PRCMU (power, reset, control
51 reset and clock controller) peripheral clocks. The first cell indicates
64 description: A subnode with two clock cells for PRCC (peripheral reset
77 prcc-reset-controller:
78 description: A subnode with two reset cells for the reset portions of the
79 PRCC (peripheral reset and clock controller). The first cell indicates
86 '#reset-cells':
163 prcc_reset: prcc-reset-controller {
[all …]
|
| /freebsd/sys/contrib/device-tree/src/arm64/rockchip/ |
| H A D | rk3568-nanopi-r5c.dts | 21 button-reset {
24 label = "reset";
64 reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
70 reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
77 reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
102 pcie20_reset_pin: pcie20-reset-pin {
108 reset_button_pin: reset-button-pin {
|
| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm2711-rpi.dtsi | 5 #include <dt-bindings/reset/raspberrypi,firmware-reset.h>
35 reset: reset { label
36 compatible = "raspberrypi,firmware-reset";
37 #reset-cells = <1>;
|