Home
last modified time | relevance | path

Searched refs:l2 (Results 201 – 225 of 517) sorted by relevance

12345678910>>...21

/linux/arch/arm64/boot/dts/qcom/
H A Dsm8150-hdk.dts88 vdd-l2-l10-supply = <&vreg_bob>;
245 vdd-l2-l3-supply = <&vreg_s8c_1p3>;
351 vdd-l2-supply = <&vreg_s8c_1p3>;
H A Dsm8350-microsoft-surface-duo2.dts65 vdd-l2-l7-supply = <&vreg_bob>;
154 vdd-l2-l8-supply = <&vreg_s1c_1p86>;
H A Dsm8350-mtp.dts65 vdd-l2-l7-supply = <&vreg_bob>;
154 vdd-l2-l8-supply = <&vreg_s1c_1p86>;
H A Dsm6375-sony-xperia-murray-pdx225.dts229 pm6125_l2: l2 {
357 pmr735a_l2: l2 {
/linux/arch/arm/boot/dts/unisoc/
H A Drda8810pl.dtsi141 l2: cache-controller@21100000 { label
/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8568si-post.dtsi148 L2: l2-cache-controller@20000 {
149 compatible = "fsl,mpc8568-l2-cache-controller";
H A Dp1021si-post.dtsi136 L2: l2-cache-controller@20000 {
137 compatible = "fsl,p1021-l2-cache-controller";
H A Dmpc8569si-post.dtsi142 L2: l2-cache-controller@20000 {
143 compatible = "fsl,mpc8569-l2-cache-controller";
H A Dmpc8536si-post.dtsi192 L2: l2-cache-controller@20000 {
193 compatible = "fsl,mpc8536-l2-cache-controller";
/linux/Documentation/devicetree/bindings/cpu/
H A Dcpu-capacity.txt186 A57_L2: l2-cache0 {
190 A53_L2: l2-cache1 {
/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-kryo-cpu.yaml128 L2_0: l2-cache {
163 L2_1: l2-cache {
/linux/drivers/gpu/drm/panthor/
H A Dpanthor_gpu.c381 u32 l2, u32 lsc, u32 other) in panthor_gpu_flush_caches() argument
390 gpu_write(ptdev, GPU_CMD, GPU_FLUSH_CACHES(l2, lsc, other)); in panthor_gpu_flush_caches()
/linux/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt_tc.h59 struct bnxt_tc_l2_key l2; member
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm63148.dtsi36 L2_0: l2-cache0 {
H A Dbcm6846.dtsi36 L2_0: l2-cache0 {
H A Dbcm6878.dtsi36 L2_0: l2-cache0 {
/linux/security/selinux/ss/
H A Dservices.c273 struct mls_level *l1, *l2; in constraint_expr_eval() local
332 l2 = &(tcontext->range.level[0]); in constraint_expr_eval()
336 l2 = &(tcontext->range.level[1]); in constraint_expr_eval()
340 l2 = &(tcontext->range.level[0]); in constraint_expr_eval()
344 l2 = &(tcontext->range.level[1]); in constraint_expr_eval()
348 l2 = &(scontext->range.level[1]); in constraint_expr_eval()
352 l2 = &(tcontext->range.level[1]); in constraint_expr_eval()
357 s[++sp] = mls_level_eq(l1, l2); in constraint_expr_eval()
360 s[++sp] = !mls_level_eq(l1, l2); in constraint_expr_eval()
363 s[++sp] = mls_level_dom(l1, l2); in constraint_expr_eval()
[all...]
/linux/Documentation/devicetree/bindings/cache/
H A Dsocionext,uniphier-system-cache.yaml80 l2: cache-controller@500c0000 {
/linux/tools/perf/util/
H A Dbpf-filter.l114 l2 { return constant(PERF_MEM_LVLNUM_L2); }
/linux/arch/arm64/boot/dts/broadcom/bcmbca/
H A Dbcm6856.dtsi36 L2_0: l2-cache0 {
H A Dbcm63146.dtsi36 L2_0: l2-cache0 {
/linux/arch/powerpc/boot/dts/
H A Dtqm8560.dts79 L2: l2-cache-controller@20000 {
80 compatible = "fsl,mpc8540-l2-cache-controller";
H A Dksi8560.dts81 L2: l2-cache-controller@20000 {
82 compatible = "fsl,mpc8540-l2-cache-controller";
/linux/arch/arm64/boot/dts/arm/
H A Dfvp-base-revc.dts149 C0_L2: l2-cache0 {
158 C1_L2: l2-cache1 {
/linux/drivers/irqchip/
H A DMakefile67 obj-$(CONFIG_BCM7120_L2_IRQ) += irq-bcm7120-l2.o
68 obj-$(CONFIG_BRCMSTB_L2_IRQ) += irq-brcmstb-l2.o

12345678910>>...21