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/minix/external/bsd/llvm/dist/llvm/test/CodeGen/X86/
H A Dasm-indirect-mem.ll3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
H A Dempty-struct-return-type.ll6 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
H A D2008-04-26-Asm-Optimize-Imm.ll3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
H A Dx86-64-dead-stack-adjust.ll4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
H A D2009-02-04-sext-i64-gep.ll5 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
H A D2009-08-08-CastError.ll5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
/minix/external/bsd/llvm/dist/llvm/test/Analysis/CostModel/X86/
H A Dtiny.ll3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
/minix/external/bsd/llvm/dist/llvm/test/CodeGen/NVPTX/
H A Dsext-params.ll3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
/minix/external/bsd/llvm/dist/llvm/test/CodeGen/PowerPC/
H A Dmulli64.ll2 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f…
H A Dsrl-mask.ll2 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f…
H A D2008-10-17-AsmMatchingOperands.ll8 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
H A Dno-dead-strip.ll3 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
/minix/external/bsd/llvm/dist/llvm/test/CodeGen/SPARC/
H A D2008-10-10-InlineAsmRegOperand.ll4 target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v…
/minix/external/bsd/llvm/dist/llvm/test/CodeGen/ARM/
H A D2010-12-17-LocalStackSlotCrash.ll3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
H A Dload-address-masked.ll3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
H A D2010-05-14-IllegalType.ll3 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32…
/minix/external/bsd/llvm/dist/llvm/test/Linker/
H A D2008-07-06-AliasWeakDest2.ll4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
H A D2008-03-07-DroppedSection_b.ll8 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v…
/minix/external/bsd/llvm/dist/llvm/lib/Target/Mips/
H A DMipsInstrFPU.td35 def SDT_MipsBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>,
598 def : MipsPat<(f64 (sint_to_fp GPR32Opnd:$src)),
604 def : MipsPat<(f64 (fextend FGR32Opnd:$src)),
607 def : MipsPat<(f64 fpimm0), (DMTC1 ZERO_64)>, FGR_64;
610 def : MipsPat<(f64 (sint_to_fp GPR32Opnd:$src)),
614 def : MipsPat<(f64 (sint_to_fp GPR64Opnd:$src)),
626 def : MipsPat<(f64 (fextend FGR32Opnd:$src)),
634 def : LoadRegImmPat<LDC164, f64, load>, FGR_64;
635 def : StoreRegImmPat<SDC164, f64>, FGR_64;
637 def : LoadRegImmPat<LDC1, f64, load>, FGR_32;
[all …]
/minix/external/bsd/llvm/dist/llvm/test/Transforms/BBVectorize/X86/
H A Dvs-cast.ll1 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
/minix/external/bsd/llvm/dist/llvm/test/Instrumentation/ThreadSanitizer/
H A Dvptr_read.ll3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
/minix/external/bsd/llvm/dist/llvm/test/Transforms/GVN/
H A Dcrash-no-aa.ll3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
/minix/external/bsd/llvm/dist/llvm/test/Transforms/InstCombine/
H A Dvector_gep2.ll3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v…
H A Dmaxnum.ll7 declare double @llvm.maxnum.f64(double, double) #0
83 %x = call double @llvm.maxnum.f64(double 1.0, double 2.0) #0
90 %x = call double @llvm.maxnum.f64(double 0x7FF8000000000000, double 2.0) #0
97 %x = call double @llvm.maxnum.f64(double 2.0, double 0x7FF8000000000000) #0
104 %x = call double @llvm.maxnum.f64(double 0x7FF8000000000000, double 0x7FF8000000000000) #0
/minix/external/bsd/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXRegisterInfo.td61 def Float64Regs : NVPTXRegClass<[f64], 64, (add (sequence "FL%u", 0, 4))>;
65 def Float64ArgRegs : NVPTXRegClass<[f64], 64, (add (sequence "da%u", 0, 4))>;

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