Searched refs:BaseOp (Results 26 – 28 of 28) sorted by relevance
12
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 5738 const MCOperand &BaseOp = Inst.getOperand(2); in expandSaaAddr() local
5740 if (BaseOp.isImm()) { in expandSaaAddr()
5741 int64_t ImmValue = BaseOp.getImm(); in expandSaaAddr()
5752 if (expandLoadAddress(ATReg, BaseReg, BaseOp, !isGP64bit(), IDLoc, Out, STI)) in expandSaaAddr()
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | R600Instructions.td | 1798 let RowFields = ["BaseOp"];
|
| /netbsd/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 23536 unsigned BaseOp = 0; in getX86XALUOOp() local
23541 BaseOp = X86ISD::ADD; in getX86XALUOOp()
23545 BaseOp = X86ISD::ADD; in getX86XALUOOp()
23549 BaseOp = X86ISD::SUB; in getX86XALUOOp()
23553 BaseOp = X86ISD::SUB; in getX86XALUOOp()
23557 BaseOp = X86ISD::SMUL; in getX86XALUOOp()
23561 BaseOp = X86ISD::UMUL; in getX86XALUOOp()
23566 if (BaseOp) { in getX86XALUOOp()
23569 Value = DAG.getNode(BaseOp, DL, VTs, LHS, RHS); in getX86XALUOOp()
|
12