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Searched refs:config (Results 51 – 75 of 507) sorted by relevance

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/qemu/target/xtensa/
H A Dexc_helper.c54 if (env->config->ndepc) { in HELPER()
80 if (xtensa_get_cintlevel(env) < env->config->debug_level) { in debug_exception_env()
87 unsigned level = env->config->debug_level; in HELPER()
131 v & env->config->inttype_mask[INTTYPE_SOFTWARE]); in HELPER()
142 env->config->inttype_mask[INTTYPE_EDGE])); in HELPER()
147 if (xtensa_option_enabled(env->config, in relocated_vector()
166 level <= env->config->nlevel && in handle_interrupt()
167 (env->config->level_mask[level] & in handle_interrupt()
169 level == env->config->nmi_level) { in handle_interrupt()
182 if (level == env->config->nmi_level) { in handle_interrupt()
[all …]
H A Dop_helper.c55 for (i = 0; i < env->config->nccompare; ++i) { in HELPER()
66 ~(1u << env->config->timerint[i])); in HELPER()
105 if (!xtensa_option_enabled(env->config, XTENSA_OPTION_DCACHE)) { in HELPER()
177 if (xtensa_option_enabled(env->config, XTENSA_OPTION_ICACHE)) { in HELPER()
179 env->config->icache_ways) { in HELPER()
181 env->config->icache_ways); in HELPER()
186 env->config->dcache_ways) { in HELPER()
188 env->config->dcache_ways); in HELPER()
191 env->config->dcache_ways) { in HELPER()
193 env->config->dcache_ways); in HELPER()
[all …]
H A Dcpu.c101 bool dfpu = xtensa_option_enabled(env->config, in xtensa_cpu_reset_hold()
111 env->sregs[PS] = xtensa_option_enabled(env->config, in xtensa_cpu_reset_hold()
116 if (xtensa_option_enabled(env->config, in xtensa_cpu_reset_hold()
123 env->sregs[VECBASE] = env->config->vecbase; in xtensa_cpu_reset_hold()
125 env->sregs[MEMCTL] = MEMCTL_IL0EN & env->config->memctl_mask; in xtensa_cpu_reset_hold()
126 env->sregs[ATOMCTL] = xtensa_option_enabled(env->config, in xtensa_cpu_reset_hold()
128 env->sregs[CONFIGID0] = env->config->configid[0]; in xtensa_cpu_reset_hold()
129 env->sregs[CONFIGID1] = env->config->configid[1]; in xtensa_cpu_reset_hold()
156 info->private_data = cpu->env.config->isa; in xtensa_cpu_disas_set_info()
176 cs->gdb_num_regs = xcc->config->gdb_regmap.num_regs; in xtensa_cpu_realizefn()
[all …]
/qemu/hw/ssi/
H A DKconfig1 config PL022
5 config SIFIVE_SPI
9 config SSI
12 config XILINX_SPI
16 config XILINX_SPIPS
20 config STM32F2XX_SPI
24 config BCM2835_SPI
/qemu/hw/vfio/
H A DKconfig1 config VFIO
5 config VFIO_PCI
12 config VFIO_CCW
18 config VFIO_PLATFORM
24 config VFIO_XGMAC
29 config VFIO_AMD_XGBE
34 config VFIO_AP
40 config VFIO_IGD
/qemu/hw/watchdog/
H A DKconfig1 config CMSDK_APB_WATCHDOG
5 config WDT_IB6300ESB
10 config WDT_IB700
15 config WDT_DIAG288
18 config WDT_IMX2
21 config WDT_SBSA
24 config ALLWINNER_WDT
/qemu/hw/timer/
H A Dgrlib_gptimer.c75 uint32_t config; member
92 uint32_t config; member
113 if (!(timer->config & GPTIMER_ENABLE)) { in grlib_gptimer_enable()
170 if (timer->config & GPTIMER_INT_ENABLE) { in grlib_gptimer_hit()
172 timer->config |= GPTIMER_INT_PENDING; in grlib_gptimer_hit()
176 if (timer->config & GPTIMER_RESTART) { in grlib_gptimer_hit()
203 return unit->config; in grlib_gptimer_read()
228 return unit->timers[id].config; in grlib_gptimer_read()
352 unit->config = unit->nr_timers; in grlib_gptimer_reset()
353 unit->config |= unit->irq_line << 3; in grlib_gptimer_reset()
[all …]
H A Dhpet.c89 return s->config & HPET_CFG_LEGACY; in hpet_in_legacy_mode()
104 return s->config & HPET_CFG_ENABLE; in hpet_enabled()
109 return t->config & HPET_TN_PERIODIC; in timer_is_periodic()
114 return t->config & HPET_TN_ENABLE; in timer_enabled()
165 if (t->config & HPET_TN_32BIT) { in hpet_calculate_diff()
441 return timer->config; in hpet_ram_read()
443 return timer->config >> 32; in hpet_ram_read()
463 return s->config; in hpet_ram_read()
522 timer->config = (timer->config & 0xffffffff00000000ULL) | val; in hpet_ram_write()
596 s->config = (s->config & 0xffffffff00000000ULL) | val; in hpet_ram_write()
[all …]
H A Dstellaris-gptm.c39 if (s->config == 0) { in gptm_reload()
44 } else if (s->config == 1) { in gptm_reload()
67 if (s->config == 0) { in gptm_tick()
80 } else if (s->config == 1) { in gptm_tick()
108 return s->config; in gptm_read()
140 if (s->config == 1) { in gptm_read()
171 s->config = value; in gptm_write()
190 if (((oldval ^ value) & 0x100) && s->config >= 4) { in gptm_write()
207 if (s->config < 4) { in gptm_write()
216 if (s->config < 4) { in gptm_write()
[all …]
/qemu/hw/pci/
H A Dpcie.c73 uint8_t *exp_cap = dev->config + dev->exp.exp_cap; in pcie_cap_v1_fill()
111 uint8_t *exp_cap = dev->config + dev->exp.exp_cap; in pcie_cap_fill_slot_lnk()
201 exp_cap = dev->config + pos; in pcie_cap_init()
315 uint8_t *exp_cap = dev->config + dev->exp.exp_cap; in pcie_cap_flags_set_vector()
366 uint8_t *exp_cap = dev->config + pos; in hotplug_event_update_event_status()
410 uint8_t *exp_cap = dev->config + dev->exp.exp_cap; in pcie_cap_slot_enable_power()
559 uint8_t *exp_cap = dev->config + dev->exp.exp_cap; in pcie_cap_slot_do_unplug()
759 uint8_t *exp_cap = dev->config + pos; in pcie_cap_slot_get()
791 uint8_t *exp_cap = dev->config + pos; in pcie_cap_slot_write_config()
993 header = pci_get_long(dev->config + next); in pcie_find_capability_list()
[all …]
H A Dpci.c635 uint8_t *config; in get_pci_config_device() local
643 if ((config[i] ^ s->config[i]) & in get_pci_config_device()
647 i, config[i], s->config[i], in get_pci_config_device()
649 g_free(config); in get_pci_config_device()
653 memcpy(s->config, config, size); in get_pci_config_device()
664 g_free(config); in get_pci_config_device()
1603 d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask); in pci_default_write_config()
2430 uint8_t *config; in pci_add_capability() local
2456 config = pdev->config + offset; in pci_add_capability()
2458 config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST]; in pci_add_capability()
[all …]
H A Dpci_bridge.c60 pci_set_word(dev->config + pos + PCI_SSVID_SVID, svid); in pci_bridge_ssvid_init()
61 pci_set_word(dev->config + pos + PCI_SSVID_SSID, ssid); in pci_bridge_ssvid_init()
83 if (d->config[base] & PCI_IO_RANGE_TYPE_32) { in pci_config_get_io_base()
101 tmp = (pcibus_t)pci_get_word(d->config + base); in pci_config_get_pref_base()
193 uint16_t cmd = pci_get_word(pd->config + PCI_COMMAND); in pci_bridge_region_init()
284 uint8_t *conf = dev->config; in pci_bridge_disable_base_limit()
306 uint8_t *conf = dev->config; in pci_bridge_reset()
348 pci_word_test_and_set_mask(dev->config + PCI_STATUS, in pci_bridge_initfn()
361 dev->config[PCI_HEADER_TYPE] = in pci_bridge_initfn()
364 pci_set_word(dev->config + PCI_SEC_STATUS, in pci_bridge_initfn()
[all …]
H A Dpcie_aer.c138 pci_set_long(dev->config + offset + PCI_ERR_CAP, in pcie_aer_init()
145 pci_set_long(dev->config + offset + PCI_ERR_CAP, in pcie_aer_init()
176 uint8_t *aer_cap = dev->config + dev->exp.aer_cap; in pcie_aer_update_uncor_status()
261 uint8_t *aer_cap = dev->config + dev->exp.aer_cap; in pcie_aer_root_set_vector()
271 uint8_t *aer_cap = dev->config + dev->exp.aer_cap; in pcie_aer_root_get_vector()
315 cmd = pci_get_word(dev->config + PCI_COMMAND); in pcie_aer_msg_root_port()
316 aer_cap = dev->config + dev->exp.aer_cap; in pcie_aer_msg_root_port()
423 uint8_t *aer_cap = dev->config + dev->exp.aer_cap; in pcie_aer_update_log()
465 uint8_t *aer_cap = dev->config + dev->exp.aer_cap; in pcie_aer_clear_log()
607 cmd = pci_get_word(dev->config + PCI_COMMAND); in pcie_aer_inject_uncor_error()
[all …]
/qemu/accel/
H A DKconfig1 config WHPX
4 config NVMM
7 config HVF
10 config TCG
13 config KVM
16 config XEN
/qemu/migration/
H A Ddirtyrate.c304 DirtyStat.calc_time_ms = config.calc_time_ms; in init_dirtyrate_stat()
307 switch (config.mode) { in init_dirtyrate_stat()
718 calculate_dirtyrate_dirty_bitmap(config); in calculate_dirtyrate()
720 calculate_dirtyrate_dirty_ring(config); in calculate_dirtyrate()
722 calculate_dirtyrate_sample_vm(config); in calculate_dirtyrate()
741 calculate_dirtyrate(config); in get_dirtyrate_thread()
762 static struct DirtyRateConfig config; in qmp_calc_dirty_rate() local
829 config.calc_time_ms = calc_time_ms; in qmp_calc_dirty_rate()
831 config.mode = mode; in qmp_calc_dirty_rate()
833 cleanup_dirtyrate_stat(config); in qmp_calc_dirty_rate()
[all …]
/qemu/hw/sensor/
H A Dtmp105.c37 if ((s->config >> 0) & 1) { /* SD */ in tmp105_alarm_update()
38 if ((s->config >> 7) & 1) /* OS */ in tmp105_alarm_update()
39 s->config &= ~(1 << 7); /* OS */ in tmp105_alarm_update()
44 if (s->config >> 1 & 1) { in tmp105_alarm_update()
121 if ((s->config >> 1) & 1) { /* TM */ in tmp105_read()
134 s->buf[s->len ++] = s->config; in tmp105_read()
156 if (s->buf[0] & ~s->config & (1 << 0)) /* SD */ in tmp105_write()
158 s->config = s->buf[0]; in tmp105_write()
256 VMSTATE_UINT8(config, TMP105State),
275 s->config = 0; in tmp105_reset()
[all …]
/qemu/hw/sd/
H A DKconfig1 config PL181
5 config SSI_SD
10 config SD
13 config SDHCI
17 config SDHCI_PCI
23 config CADENCE_SDHCI
/qemu/docs/sphinx/
H A Ddepfile.py30 for static_path in env.config.html_static_path + env.config.templates_path:
40 if not env.config.depfile:
46 if env.config.depfile_stamp:
47 with open(env.config.depfile_stamp, 'w') as f:
50 with open(env.config.depfile, 'w') as f:
51 print((env.config.depfile_stamp or app.outdir) + ": \\", file=f)
/qemu/hw/hyperv/
H A DKconfig1 config HYPERV
5 config HYPERV_TESTDEV
10 config VMBUS
15 config SYNDBG
20 config HV_BALLOON_SUPPORTED
23 config HV_BALLOON
/qemu/hw/riscv/
H A DKconfig1 config RISCV_NUMA
4 config IBEX
9 config MICROCHIP_PFSOC
25 config OPENTITAN
33 config RISCV_VIRT
60 config SHAKTI_C
69 config SIFIVE_E
81 config SIFIVE_U
101 config SPIKE
/qemu/hw/tpm/
H A DKconfig1 config TPM_TIS_I2C
8 config TPM_TIS_ISA
13 config TPM_TIS_SYSBUS
18 config TPM_TIS
23 config TPM_CRB
28 config TPM_SPAPR
/qemu/tools/ebpf/
H A Drss.bpf.c384 struct rss_config_t *config, in calculate_rss_hash() argument
400 config->hash_types & VIRTIO_NET_RSS_HASH_TYPE_TCPv4) { in calculate_rss_hash()
439 config->hash_types & VIRTIO_NET_RSS_HASH_TYPE_TCPv6) { in calculate_rss_hash()
473 config->hash_types & VIRTIO_NET_RSS_HASH_TYPE_UDP_EX) { in calculate_rss_hash()
504 config->hash_types & VIRTIO_NET_RSS_HASH_TYPE_IP_EX) { in calculate_rss_hash()
541 struct rss_config_t *config; in tun_rss_steering_prog() local
547 config = bpf_map_lookup_elem(&tap_rss_map_configurations, &key); in tun_rss_steering_prog()
550 if (!config || !toe) { in tun_rss_steering_prog()
554 if (config->redirect && calculate_rss_hash(skb, config, toe, &hash)) { in tun_rss_steering_prog()
555 __u32 table_idx = hash % config->indirections_len; in tun_rss_steering_prog()
[all …]
/qemu/hw/mips/
H A DKconfig1 config MALTA
16 config MIPSSIM
23 config JAZZ
45 config FULOONG
57 config LOONGSON3V
76 config MIPS_CPS
80 config MIPS_BOSTON
93 config FW_CFG_MIPS
/qemu/tests/qtest/
H A Dpflash-cfi02-test.c261 const FlashConfig *config = opaque; in test_geometry() local
283 config->nb_blocs[0], in test_geometry()
284 config->sector_len[0], in test_geometry()
285 config->nb_blocs[1], in test_geometry()
286 config->sector_len[1], in test_geometry()
287 config->nb_blocs[2], in test_geometry()
288 config->sector_len[2], in test_geometry()
289 config->nb_blocs[3], in test_geometry()
290 config->sector_len[3]); in test_geometry()
450 byte_addr += config->sector_len[region]; in test_geometry()
[all …]
/qemu/block/export/
H A Dvduse-blk.c208 struct virtio_blk_config config; in vduse_blk_resize() local
210 config.capacity = in vduse_blk_resize()
277 struct virtio_blk_config config = { 0 }; in vduse_blk_exp_create() local
314 config.capacity = in vduse_blk_exp_create()
316 config.seg_max = cpu_to_le32(queue_size - 2); in vduse_blk_exp_create()
317 config.min_io_size = cpu_to_le16(1); in vduse_blk_exp_create()
318 config.opt_io_size = cpu_to_le32(1); in vduse_blk_exp_create()
319 config.num_queues = cpu_to_le16(num_queues); in vduse_blk_exp_create()
322 config.max_discard_seg = cpu_to_le32(1); in vduse_blk_exp_create()
323 config.discard_sector_alignment = in vduse_blk_exp_create()
[all …]

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