/qemu/tests/tcg/openrisc/ |
H A D | test_add.c | 5 int a, b, d; in main() local 8 a = 0x100; in main() 13 : "+r"(a) in main() 16 if (a != result) { in main() 21 a = 0xffff; in main() 26 : "+r"(a) in main() 29 if (a != result) { in main() 34 a = 0x7fffffff; in main() 39 : "r"(b), "r"(a) in main()
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H A D | test_fx.c | 5 int a, b; in main() local 12 : "=r"(a) in main() 15 if (a != result) { in main() 24 : "=r"(a) in main() 27 if (a != result) { in main() 36 : "=r"(a) in main() 39 if (a != result) { in main() 48 : "=r"(a) in main() 51 if (a != result) { in main()
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H A D | test_mul.c | 5 int a, b, c; in main() local 13 : "=r"(a) in main() 16 if (a != result) { in main() 26 : "=r"(a) in main() 29 if (a != result) { in main() 39 : "=r"(a) in main() 42 if (a != result) { in main() 52 : "=r"(a) in main() 55 if (a != result) { in main()
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H A D | test_div.c | 5 int a, b, c; in main() local 13 : "=r"(a) in main() 16 if (a != result) { in main() 24 : "+r"(a) in main() 27 if (a != result) { in main() 37 : "=r"(a) in main() 40 if (a != result) { in main() 49 : "=r"(a) in main()
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/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_vec.c.inc | 1351 gen_shr_vec(vece, a, a, 1); 1558 tcg_gen_smin_vec(vece, a, a, b); 1601 tcg_gen_umin_vec(vece, a, a, b); 4718 tcg_gen_bitsel_vec(vece, a, a, tcg_constant_vec_matching(a, vece, imm), b); 4836 func(src, tcg_env, vec_reg_offset(a->vd, a->imm, mop)); 4869 func(dst, tcg_env, vec_reg_offset(a->vj, a->imm, mop)); 4944 fpr[a->vj].vreg.B((a->imm))), 4961 fpr[a->vj].vreg.H((a->imm))), 4977 fpr[a->vj].vreg.W((a->imm))), 4993 fpr[a->vj].vreg.D((a->imm))), [all …]
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H A D | trans_atomic.c.inc | 9 TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); 10 TCGv t0 = make_address_i(ctx, src1, a->imm); 15 gen_set_gpr(a->rd, t1, EXT_NONE); 22 TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE); 23 TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE); 24 TCGv src2 = gpr_src(ctx, a->rd, EXT_NONE); 31 tcg_gen_addi_tl(t0, src1, a->imm); 43 gen_set_gpr(a->rd, dest, EXT_NONE); 54 TCGv val = gpr_src(ctx, a->rk, EXT_NONE); 56 if (a->rd != 0 && (a->rj == a->rd || a->rk == a->rd)) { [all …]
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H A D | trans_fcmp.c.inc | 26 static bool trans_fcmp_cond_s(DisasContext *ctx, arg_fcmp_cond_s *a) 39 src1 = get_fpr(ctx, a->fj); 40 src2 = get_fpr(ctx, a->fk); 41 fn = (a->fcond & 1 ? gen_helper_fcmp_s_s : gen_helper_fcmp_c_s); 42 flags = get_fcmp_flags(a->fcond >> 1); 46 tcg_gen_st8_tl(var, tcg_env, offsetof(CPULoongArchState, cf[a->cd])); 50 static bool trans_fcmp_cond_d(DisasContext *ctx, arg_fcmp_cond_d *a) 63 src1 = get_fpr(ctx, a->fj); 64 src2 = get_fpr(ctx, a->fk); 65 fn = (a->fcond & 1 ? gen_helper_fcmp_s_d : gen_helper_fcmp_c_d); [all …]
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/qemu/docs/tools/ |
H A D | qemu-nbd.rst | 21 - Bind a /dev/nbdX block device to a QEMU server (on Linux). 22 - As a client to query exports of a remote NBD server. 29 *filename* is a disk image filename, or a set of block 45 TCP port to listen on as a server, or connect to as a client 54 The interface to bind to as a server, or connect to as a client 59 Use a unix socket with path *PATH*. 63 Treat *filename* as a set of image options, instead of a plain 231 a 1 megabyte subset of a raw file, using the export name 'subset': 243 Serve a read-only copy of a guest image over a Unix socket with as 244 many as 5 simultaneous readers, with a persistent process forked as a [all …]
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/qemu/hw/audio/ |
H A D | hda-codec.c | 705 a->desc = desc; in hda_audio_init() 706 a->name = object_get_typename(OBJECT(a)); in hda_audio_init() 707 dprint(a, 1, "%s: cad %d\n", __func__, a->hda.cad); in hda_audio_init() 721 st->state = a; in hda_audio_init() 749 st = a->st + i; in hda_audio_exit() 775 a->running_real[16 + i] = a->running_compat[i]; in hda_audio_post_load() 779 st = a->st + i; in hda_audio_post_load() 798 st = a->st + i; in hda_audio_reset() 873 if (!a->mixer) { in hda_audio_init_output() 885 if (!a->mixer) { in hda_audio_init_duplex() [all …]
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/qemu/tests/tcg/mips/user/isa/r5900/ |
H A D | test_r5900_maddu.c | 9 uint64_t maddu(uint64_t a, uint32_t rs, uint32_t rt) in maddu() argument 11 uint32_t lo = a; in maddu() 12 uint32_t hi = a >> 32; in maddu() 26 assert(a + (uint64_t)rs * rt == r); in maddu() 32 uint64_t maddu1(uint64_t a, uint32_t rs, uint32_t rt) in maddu1() argument 34 uint32_t lo = a; in maddu1() 35 uint32_t hi = a >> 32; in maddu1() 49 assert(a + (uint64_t)rs * rt == r); in maddu1() 55 static int64_t maddu_variants(int64_t a, int32_t rs, int32_t rt) in maddu_variants() argument 57 int64_t rd = maddu(a, rs, rt); in maddu_variants() [all …]
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/qemu/tests/fp/ |
H A D | fp-bench.c | 247 float a = ops[0].f; in bench() local 253 res.f = a + b; in bench() 256 res.f = a - b; in bench() 259 res.f = a * b; in bench() 262 res.f = a / b; in bench() 282 double a = ops[0].d; in bench() local 288 res.d = a + b; in bench() 291 res.d = a - b; in bench() 294 res.d = a * b; in bench() 297 res.d = a / b; in bench() [all …]
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/qemu/docs/devel/ |
H A D | memory.rst | 33 - RAM: a RAM region is simply a range of host memory that can be made available 60 into one unit. For example, a PCI BAR may be composed of a RAM region 65 can overlay a subregion of RAM with MMIO or ROM, or a PCI controller 70 - alias: a subsection of another region. Aliases allow a region to be 88 It is valid to add subregions to a region which is not a pure container 152 After creation, a region can be added to an address space or a 169 You must not destroy a memory region as long as it may be in use by a 217 that must sit 'above' any others (with a positive priority) and also a 258 a bus or a memory controller) can use them to manage the interaction of 281 - if a recursive search within a container or alias subregion does not [all …]
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H A D | submitting-a-patch.rst | 1 .. _submitting-a-patch: 3 Submitting a Patch 69 There's no point submitting a patch which is based on a released version 158 subject lines. Then there is a blank line and a more detailed 182 a bug in another public bug tracker, you can also use a line with 203 is such a large project the default configuration won't create a 207 work with a full build before submitting a series, especially if your 212 Also, it is a wise idea to include a testsuite addition as part of 236 attachments can be used as a last resort on a first-time submission. 323 Your patches **must** include a Signed-off-by: line. This is a hard [all …]
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H A D | clocks.rst | 1 Modelling a clock tree in QEMU 21 In these cases a Clock object is a child of a Device object, but this 63 the current period of a clock to be fetched at any time. When a clock 76 Adding a new clock 151 Note that if you are creating a clock with a fixed period which will never 160 You can give a clock a callback function in several ways: 198 Retrieving clocks from a device 376 For a clock with a very long period and a large number of ticks, 398 overflows a 64-bit value (a very long duration for a clock with a 402 Changing a clock period [all …]
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H A D | multi-thread-tcg.rst | 11 This document outlines the design for multi-threaded TCG (a.k.a MTTCG) 119 to a change of the state of a physical page: 156 where tb is the destination block of a jump. Each origin block keeps a 158 iterating over a jump list. 191 time in a synchronised manner. 273 a change to a signal flag will only be visible once the changes to 280 ordered backends this could become a NOP. 290 a weakly ordered host the scope for a heavy performance impact is 332 The second type offer a pair of load/store instructions which offer a 335 pair where the strex instruction will return a flag indicating a [all …]
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H A D | atomics.rst | 194 stronger than both a read and a write memory barrier; it implies both 221 mostly used when a data structure has one thread that is always a writer 249 | n += qatomic_load_acquire(&a[i]); | n += qatomic_read(&a[i]); | 256 | qatomic_store_release(&a[i], false); | qatomic_set(&a[i], false); | 342 | pthread_exit(a); | pthread_join(thread1, &a); | 374 same variable: that is, a store-release on a variable ``x`` *synchronizes 375 with* a load-acquire on a variable ``x``, while a release barrier 401 cannot be a data race: 412 | qatomic_set(&a, x);| x = qatomic_read(&a); | 464 operation consist of just a load-acquire followed by a store-release. [all …]
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/qemu/docs/ |
H A D | image-fuzzer.txt | 70 The runner accepts a list of commands under test as a JSON array via 71 the '--command' argument. Each command is a list containing a SUT and all its 82 Values for last two aliases will be generated based on a size of a virtual 115 'layout.py' creates a random valid image, fuzzes a random subset of the image 119 1. If a list contains a parent image element only, then some random portion 124 2. If a list contains a parent element and a field name, then a field 137 path to a backing file and its format and a fuzzer configuration. 146 fuzz_config has a form of a list of lists. Every sublist can have one 147 or two elements: first element is a name of a parent image element, second one 148 if exists is a name of a field in this element. [all …]
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/qemu/target/ppc/ |
H A D | dfp_helper.c | 65 decNumber t, a, b; member 154 if (a) { in dfp_prepare_decimal64() 155 get_dfp64(&dfp->va, a); in dfp_prepare_decimal64() 159 decNumberZero(&dfp->a); in dfp_prepare_decimal64() 178 if (a) { in dfp_prepare_decimal128() 183 decNumberZero(&dfp->a); in dfp_prepare_decimal128() 727 dfp->t = dfp->a; in dfp_quantize() 733 dfp->t = dfp->a; in dfp_quantize() 1426 decNumber a; in helper_CDTBCD() local 1452 decNumber a; in helper_CBCDTD() local [all …]
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/qemu/tests/tcg/cris/libc/ |
H A D | check_addcm.c | 8 static always_inline int cris_addc_m(int a, const int *b) in cris_addc_m() argument 10 asm volatile ("addc [%1], %0\n" : "+r" (a) : "r" (b)); in cris_addc_m() 11 return a; in cris_addc_m() 15 static always_inline int cris_addc_pi_m(int a, int **b) in cris_addc_pi_m() argument 17 asm volatile ("addc [%1+], %0\n" : "+r" (a), "+b" (*b)); in cris_addc_pi_m() 18 return a; in cris_addc_pi_m() 21 #define verify_addc_m(a, b, res, n, z, v, c) \ argument 24 r = cris_addc_m((a), (b)); \ 30 #define verify_addc_pi_m(a, b, res, n, z, v, c) \ argument 33 r = cris_addc_pi_m((a), (b)); \
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/qemu/tests/multiboot/ |
H A D | modules.out | 13 Content: 'This is a test file that is used as a multiboot module.' 20 Content: 'This is a test file that is used as a multiboot module.' 27 Content: 'This is a test file that is used as a multiboot module.' 34 Content: 'This is a test file that is used as a multiboot module.' 36 Content: 'This is a test file that is used as a multiboot module.' 38 Content: 'This is a test file that is used as a multiboot module.'
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/qemu/hw/ide/ |
H A D | ahci-allwinner.c | 50 AllwinnerAHCIState *a = opaque; in allwinner_ahci_mem_read() local 51 AHCIState *s = &(SYSBUS_AHCI(a)->ahci); in allwinner_ahci_mem_read() 52 uint64_t val = a->regs[addr / 4]; in allwinner_ahci_mem_read() 62 trace_allwinner_ahci_mem_read(s, a, addr, val, size); in allwinner_ahci_mem_read() 69 AllwinnerAHCIState *a = opaque; in allwinner_ahci_mem_write() local 70 AHCIState *s = &(SYSBUS_AHCI(a)->ahci); in allwinner_ahci_mem_write() 72 trace_allwinner_ahci_mem_write(s, a, addr, val, size); in allwinner_ahci_mem_write() 73 a->regs[addr / 4] = val; in allwinner_ahci_mem_write() 87 AllwinnerAHCIState *a = ALLWINNER_AHCI(obj); in allwinner_ahci_init() local 89 memory_region_init_io(&a->mmio, obj, &allwinner_ahci_mem_ops, a, in allwinner_ahci_init() [all …]
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/qemu/target/mips/tcg/ |
H A D | lcsr_translate.c | 19 static bool trans_CPUCFG(DisasContext *ctx, arg_CPUCFG *a) in trans_CPUCFG() argument 24 gen_load_gpr(src1, a->rs); in trans_CPUCFG() 26 gen_store_gpr(dest, a->rd); in trans_CPUCFG() 32 static bool gen_rdcsr(DisasContext *ctx, arg_r *a, in gen_rdcsr() argument 39 gen_load_gpr(src1, a->rs); in gen_rdcsr() 41 gen_store_gpr(dest, a->rd); in gen_rdcsr() 46 static bool gen_wrcsr(DisasContext *ctx, arg_r *a, in gen_wrcsr() argument 53 gen_load_gpr(addr, a->rs); in gen_wrcsr() 54 gen_load_gpr(val, a->rd); in gen_wrcsr() 66 static bool trans_##name(DisasContext *ctx, arg_##name * a) \
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H A D | dsp_helper.c | 51 #define MIPSDSP_OVERFLOW_ADD(a, b, c, d) (~((a) ^ (b)) & ((a) ^ (c)) & (d)) argument 52 #define MIPSDSP_OVERFLOW_SUB(a, b, c, d) (((a) ^ (b)) & ((a) ^ (c)) & (d)) argument 140 tempI = a + b; in mipsdsp_add_i16() 154 tempS = a + b; in mipsdsp_sat_add_i16() 173 tempI = a + b; in mipsdsp_sat_add_i32() 353 return a * b; in mipsdsp_mul_u16_u16() 359 return a * b; in mipsdsp_mul_i32_i32() 733 return a; in mipsdsp_lshift32() 752 return a; in mipsdsp_sat16_lshift() 778 return a; in mipsdsp_sat32_lshift() [all …]
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/qemu/include/tcg/ |
H A D | tcg-op-common.h | 483 glue(tcg_gen_ld_,PTR)((NAT)r, a, o); in tcg_gen_ld_ptr() 488 glue(tcg_gen_st_, PTR)((NAT)r, a, o); in tcg_gen_st_ptr() 493 glue(tcg_gen_discard_,PTR)((NAT)a); in tcg_gen_discard_ptr() 525 tcg_gen_mov_i32((NAT)r, a); in tcg_gen_ext_i32_ptr() 527 tcg_gen_ext_i32_i64((NAT)r, a); in tcg_gen_ext_i32_ptr() 534 tcg_gen_extrl_i64_i32((NAT)r, a); in tcg_gen_trunc_i64_ptr() 536 tcg_gen_mov_i64((NAT)r, a); in tcg_gen_trunc_i64_ptr() 543 tcg_gen_extu_i32_i64(r, (NAT)a); in tcg_gen_extu_ptr_i64() 545 tcg_gen_mov_i64(r, (NAT)a); in tcg_gen_extu_ptr_i64() 552 tcg_gen_mov_i32(r, (NAT)a); in tcg_gen_trunc_ptr_i32() [all …]
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/qemu/docs/system/ |
H A D | mux-chardev.rst.inc | 1 During emulation, if you are using a character backend multiplexer 4 start with an escape character, which is Ctrl-a by default, but can be 7 Ctrl-a h 10 Ctrl-a x 13 Ctrl-a s 16 Ctrl-a t 19 Ctrl-a b 22 Ctrl-a c 26 Ctrl-a Ctrl-a
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