Searched refs:access (Results 226 – 244 of 244) sorted by relevance
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/qemu/docs/devel/ |
H A D | qapi-code-gen.rst | 569 - It does not access guest RAM that may block when userfaultfd is 575 The restrictions on locking limit access to shared state. Such access
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H A D | testing.rst | 754 access, so they SHOULD NOT be exposed to external interfaces if you are 879 * Have access to a library of guest OS images (by means of the
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/qemu/tcg/riscv/ |
H A D | tcg-target.c.inc | 1274 * alignment bits within the address. For unaligned access, we 1276 * byte of the access.
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/qemu/tcg/ppc/ |
H A D | tcg-target.c.inc | 2453 * Before 3.0, "An access that is not atomic is performed as a set of 2457 * As of 3.0, "the non-atomic access is performed as described in 2544 * If the access is unaligned, we need to make sure we fail if we 2545 * cross a page boundary. The trick is to add the access size-1
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/qemu/target/arm/tcg/ |
H A D | a64.decode | 326 # so we ignore hints about data access patterns, and handle these like
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/qemu/tests/qtest/ |
H A D | libqtest.c | 964 if (!access("/dev/kvm", R_OK | W_OK)) { in qtest_has_accel()
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/qemu/tcg/s390x/ |
H A D | tcg-target.c.inc | 1882 * alignment bits within the address. For unaligned access, we 1884 * byte of the access. 3460 * interlocked-access-1, and load/store-on-condition-1
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/qemu/target/hexagon/idef-parser/ |
H A D | README.rst | 38 not access any global variable, because all the accessed data structures will be
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/qemu/tcg/i386/ |
H A D | tcg-target.c.inc | 2151 * If the required alignment is at least as large as the access, 2153 * check that we don't cross pages for the complete access. 2980 access to the high-byte registers. */
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/qemu/tcg/aarch64/ |
H A D | tcg-target.c.inc | 1796 * the alignment bits within the address. For unaligned access, 1798 * last byte of the access.
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/qemu/linux-user/ |
H A D | strace.list | 13 { TARGET_NR_access, "access" , NULL, print_access, NULL },
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/qemu/hw/net/ |
H A D | trace-events | 258 e1000e_wrn_io_addr_flash(uint64_t addr) "IO flash access (0x%"PRIx64") not implemented"
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/qemu/qga/ |
H A D | qapi-schema.json | 273 # file access, the number of bytes to read is limited to 48 MB.
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/qemu/ |
H A D | hmp-commands.hx | 571 .help = "print expression value (use $reg for CPU register access)",
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H A D | MAINTAINERS | 2912 F: block/snapshot-access.c
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/qemu/tcg/mips/ |
H A D | tcg-target.c.inc | 1272 * For unaligned accesses, compare against the end of the access to
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/qemu/tests/data/qobject/ |
H A D | qdict.txt | 247 access.c: 10521
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/qemu/target/i386/tcg/ |
H A D | decode-new.c.inc | 1851 case X86_SIZE_y_d64: /* Full (not 16-bit) register access */ 2776 * Write back flags after last memory access. Some older ALU instructions, as
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/qemu/tests/tcg/i386/ |
H A D | x86.csv | 128 # address size prefix byte to access the instruction. 135 # operand size prefix byte to access the instruction.
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