/qemu/hw/m68k/ |
H A D | q800.c | 578 uint64_t high; in q800_machine_init() local 588 &elf_entry, NULL, &high, NULL, 1, in q800_machine_init() 595 parameters_base = (high + 1) & ~1; in q800_machine_init()
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/qemu/docs/ |
H A D | xbzrle.txt | 19 A small cache size will result in high cache miss rate. 115 xbzrle cache miss: the number of cache misses to date - high cache-miss rate
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H A D | multi-thread-compression.txt | 49 high overhead of CPU, avoid using this feature. When the network
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/qemu/accel/tcg/ |
H A D | tcg-accel-ops.c | 104 qatomic_set(&cpu->neg.icount_decr.u16.high, -1); in tcg_handle_interrupt()
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/qemu/include/qemu/ |
H A D | range.h | 234 uint64_t low, uint64_t high);
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H A D | win_dump_defs.h | 175 int64_t high; member
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/qemu/tests/fp/ |
H A D | wrap.c.inc | 72 ret.signExp = a.high; 81 ret.high = a.signExp; 91 to->v64 = a.high; 101 ret.high = from->v64;
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/qemu/include/hw/ |
H A D | elf_ops.h.inc | 331 uint64_t addr, low = (uint64_t)-1, high = 0; 578 if ((addr + mem_size) > high) 579 high = addr + mem_size; 618 *highaddr = high;
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/qemu/include/hw/core/ |
H A D | cpu.h | 339 uint16_t high; member 343 uint16_t high;
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/qemu/tcg/ |
H A D | tcg-ldst.c.inc | 43 one operation beginning below the high water mark cannot overrun
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/qemu/target/hexagon/imported/ |
H A D | float.idef | 242 "Multiply low*high and accumulate", 248 "Multiply high*high and accumulate with L*H value",
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H A D | shift.idef | 801 "Vector truncate half to byte: take high", 819 "Vector truncate word to half: take high", 848 "Vector truncate half to byte: take high", 897 "Pack high halfwords and low halfwords together", 960 "Shuffle high bytes together", 980 "Shuffle high halves together",
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H A D | encode_pp.def | 838 DEF_FIELD32(ICLASS_M" 0100 -------- PP------ --!-----",Ma_tH,"Rt is High") /*Rt high */ 839 DEF_FIELD32(ICLASS_M" 0100 -------- PP------ -!------",Ma_sH,"Rs is High") /* Rs high */ 867 DEF_FIELD32(ICLASS_M" 0110 -------- PP------ --!-----",Mb_tH,"Rt is High") /*Rt high */ 868 DEF_FIELD32(ICLASS_M" 0110 -------- PP------ -!------",Mb_sH,"Rs is High") /* Rs high */ 1057 DEF_FIELD32(ICLASS_M" 1100 -------- PP------ --!-----",Mc_tH,"Rt is High") /*Rt high */ 1058 DEF_FIELD32(ICLASS_M" 1100 -------- PP------ -!------",Mc_sH,"Rs is High") /* Rs high */ 1088 DEF_FIELD32(ICLASS_M" 1110 -------- PP------ --!-----",Md_tH,"Rt is High") /*Rt high */ 1089 DEF_FIELD32(ICLASS_M" 1110 -------- PP------ -!------",Md_sH,"Rs is High") /* Rs high */
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/qemu/linux-user/arm/nwfpe/ |
H A D | fpa11_cprt.c | 264 rFm.high ^= 0x8000; in PerformComparison()
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/qemu/docs/devel/migration/ |
H A D | virtio.rst | 60 any high feature bit
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/qemu/target/m68k/ |
H A D | fpu_helper.c | 511 uint32_t high; in cpu_ld_floatx80_ra() local 514 high = cpu_ldl_data_ra(env, addr, ra); in cpu_ld_floatx80_ra() 517 fp->l.upper = high >> 16; in cpu_ld_floatx80_ra()
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/qemu/subprojects/libvhost-user/ |
H A D | libvhost-user.c | 205 int high = dev->nregions - 1; in vu_gpa_to_mem_region() local 215 while (low <= high) { in vu_gpa_to_mem_region() 216 unsigned int mid = low + (high - low) / 2; in vu_gpa_to_mem_region() 226 high = mid - 1; in vu_gpa_to_mem_region() 386 int high = dev->nregions - 1; in _vu_add_mem_reg() local 412 while (low <= high) { in _vu_add_mem_reg() 413 unsigned int mid = low + (high - low) / 2; in _vu_add_mem_reg() 425 high = mid - 1; in _vu_add_mem_reg()
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/qemu/hw/usb/ |
H A D | desc.h | 196 const USBDescDevice *high; member
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/qemu/hw/gpio/ |
H A D | trace-events | 43 stm32l4x5_gpio_pins(char *gpio, uint16_t disconnected, uint16_t high) "GPIO%s disconnected pins: 0x…
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/qemu/hw/core/ |
H A D | cpu-common.c | 88 qatomic_set(&cpu->neg.icount_decr.u16.high, -1); in cpu_exit()
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/qemu/target/ppc/translate/ |
H A D | fp-impl.c.inc | 768 * We only need to swap high and low halves. gen_qemu_ld64_i64 800 * We only need to swap high and low halves. gen_qemu_ld64_i64 911 * We only need to swap high and low halves. gen_qemu_st64_i64 943 * We only need to swap high and low halves. gen_qemu_st64_i64
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/qemu/docs/specs/ |
H A D | sev-guest-firmware.rst | 98 base value represents the high order 16-bits of the CS segment base, so
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/qemu/target/loongarch/tcg/ |
H A D | tlb_helper.c | 209 static uint32_t get_random_tlb(uint32_t low, uint32_t high) in get_random_tlb() argument 214 return val % (high - low + 1) + low; in get_random_tlb()
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/qemu/docs/devel/ |
H A D | tcg-ops.rst | 487 - | For 64-bit hosts only, extract the high 32-bits of input *t1* and place it 535 - | Construct *t0* (64-bit) taking the low half from *t1* (32 bit) and the high half 540 - | Construct *t0* (64-bit) taking the low half from *t1* (64 bit) and the high half 610 - | Provide the high part of a signed or unsigned multiply, respectively. 908 - all 32-bit TCG ops ignore the high part of 64-bit registers
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/qemu/hw/pci-host/ |
H A D | mv64361.c | 592 uint64_t val, bool high) in mv64361_set_pci_mem_remap() argument 594 if (high) { in mv64361_set_pci_mem_remap()
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