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Searched refs:val (Results 76 – 100 of 1028) sorted by relevance

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/qemu/include/qapi/qmp/
H A Dqlit.h40 #define QLIT_QBOOL(val) \ argument
41 { .type = QTYPE_QBOOL, .value.qbool = (val) }
42 #define QLIT_QNUM(val) \ argument
43 { .type = QTYPE_QNUM, .value.qnum = (val) }
44 #define QLIT_QSTR(val) \ argument
45 { .type = QTYPE_QSTRING, .value.qstr = (val) }
46 #define QLIT_QDICT(val) \ argument
47 { .type = QTYPE_QDICT, .value.qdict = (val) }
48 #define QLIT_QLIST(val) \ argument
49 { .type = QTYPE_QLIST, .value.qlist = (val) }
/qemu/hw/display/
H A Dvga.c415 return val; in vga_ioport_read()
713 val = 0; in vbe_ioport_read_data()
716 return val; in vbe_ioport_read_data()
963 val = ((val >> b) | (val << (8 - b))) & 0xff; in vga_mem_writeb()
964 val |= val << 8; in vga_mem_writeb()
965 val |= val << 16; in vga_mem_writeb()
969 val = (val & ~set_mask) | in vga_mem_writeb()
977 val = mask16[val & 0x0f]; in vga_mem_writeb()
983 val = (val >> b) | (val << (8 - b)); in vga_mem_writeb()
1014 val = (val & bit_mask) | (s->latch & ~bit_mask); in vga_mem_writeb()
[all …]
H A Dtcx.c142 uint8_t val; in tcx_draw_line32() local
146 val = *s++; in tcx_draw_line32()
187 uint8_t val, *p8; in tcx24_draw_line32() local
201 val = *s; in tcx24_draw_line32()
385 uint32_t val = 0; in tcx_dac_readl() local
405 return val; in tcx_dac_readl()
584 val = cpu_to_be32(val); in tcx_blit_writel()
616 val = cpu_to_be32(val); in tcx_rblit_writel()
681 uint64_t val; in tcx_thc_readl() local
686 val = 0; in tcx_thc_readl()
[all …]
H A Dartist.c707 if (val & mask) { in font_write16()
874 uint64_t val; in artist_vram_read() local
900 val = -1ULL; in artist_vram_read()
904 return val; in artist_vram_read()
1156 uint32_t val = 0; in artist_reg_read() local
1182 val = 0x10; in artist_reg_read()
1201 val &= ~0xff00UL; in artist_reg_read()
1210 val = 0xac4ffdac; in artist_reg_read()
1215 val = 0x6dc20006; in artist_reg_read()
1223 val = combine_read_reg(addr, size, &val); in artist_reg_read()
[all …]
H A Dtrace-events124 vga_std_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
125 vga_std_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
126 vga_vbe_read(uint32_t index, uint32_t val) "index 0x%x, val 0x%x"
127 vga_vbe_write(uint32_t index, uint32_t val) "index 0x%x, val 0x%x"
130 vga_cirrus_read_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
131 vga_cirrus_write_io(uint32_t addr, uint32_t val) "addr 0x%x, val 0x%x"
137 sii9022_read_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x"
138 sii9022_write_reg(uint8_t addr, uint8_t val) "addr 0x%02x, val 0x%02x"
165 sm501_i2c_read(uint32_t addr, uint8_t val) "addr=0x%x, val=0x%x"
166 sm501_i2c_write(uint32_t addr, uint32_t val) "addr=0x%x, val=0x%x"
[all …]
/qemu/include/gdbstub/
H A Dhelpers.h28 static inline int gdb_get_reg8(GByteArray *buf, uint8_t val) in gdb_get_reg8() argument
30 g_byte_array_append(buf, &val, 1); in gdb_get_reg8()
34 static inline int gdb_get_reg16(GByteArray *buf, uint16_t val) in gdb_get_reg16() argument
36 uint16_t to_word = tswap16(val); in gdb_get_reg16()
41 static inline int gdb_get_reg32(GByteArray *buf, uint32_t val) in gdb_get_reg32() argument
43 uint32_t to_long = tswap32(val); in gdb_get_reg32()
48 static inline int gdb_get_reg64(GByteArray *buf, uint64_t val) in gdb_get_reg64() argument
50 uint64_t to_quad = tswap64(val); in gdb_get_reg64()
96 #define gdb_get_regl(buf, val) gdb_get_reg64(buf, val) argument
99 #define gdb_get_regl(buf, val) gdb_get_reg32(buf, val) argument
/qemu/hw/net/
H A Dsunhme.c259 uint64_t val; in sunhme_seb_read() local
286 return val; in sunhme_seb_read()
310 if (val) { in sunhme_etx_write()
323 uint64_t val; in sunhme_etx_read() local
329 return val; in sunhme_etx_read()
356 uint64_t val; in sunhme_erx_read() local
362 return val; in sunhme_erx_read()
399 uint64_t val; in sunhme_mac_read() local
405 return val; in sunhme_mac_read()
513 uint64_t val; in sunhme_mif_read() local
[all …]
/qemu/hw/ppc/
H A Dpnv_lpc.c306 uint64_t val = 0; in pnv_lpc_xscom_read() local
311 val = 0; in pnv_lpc_xscom_read()
321 return val; in pnv_lpc_xscom_read()
358 uint64_t val = 0; in pnv_lpc_mmio_read() local
382 return val; in pnv_lpc_mmio_read()
479 return val; in lpc_hc_read()
546 val = lpc->opb_irq_stat; in opb_master_read()
549 val = lpc->opb_irq_mask; in opb_master_read()
552 val = lpc->opb_irq_pol; in opb_master_read()
562 return val; in opb_master_read()
[all …]
H A Dpnv_homer.c136 uint64_t val = 0; in pnv_homer_power8_pba_read() local
140 val = PNV_HOMER_BASE(chip); in pnv_homer_power8_pba_read()
146 val = PNV_OCC_COMMON_AREA_BASE; in pnv_homer_power8_pba_read()
155 return val; in pnv_homer_power8_pba_read()
279 uint64_t val = 0; in pnv_homer_power9_pba_read() local
283 val = PNV9_HOMER_BASE(chip); in pnv_homer_power9_pba_read()
289 val = PNV9_OCC_COMMON_AREA_BASE; in pnv_homer_power9_pba_read()
298 return val; in pnv_homer_power9_pba_read()
342 uint64_t val = 0; in pnv_homer_power10_pba_read() local
346 val = PNV10_HOMER_BASE(chip); in pnv_homer_power10_pba_read()
[all …]
H A Dpnv_occ.c56 val &= 0xffff000000000000ull; in pnv_occ_set_misc()
58 occ->occmisc = val; in pnv_occ_set_misc()
59 irq_state = !!(val >> 63); in pnv_occ_set_misc()
68 uint64_t val = 0; in pnv_occ_power8_xscom_read() local
72 val = occ->occmisc; in pnv_occ_power8_xscom_read()
78 return val; in pnv_occ_power8_xscom_read()
95 pnv_occ_set_misc(occ, val); in pnv_occ_power8_xscom_write()
190 uint64_t val = 0; in pnv_occ_power9_xscom_read() local
194 val = occ->occmisc; in pnv_occ_power9_xscom_read()
200 return val; in pnv_occ_power9_xscom_read()
[all …]
/qemu/hw/intc/
H A Dloongarch_pch_pic.c22 uint64_t val; in pch_pic_update_irq() local
27 if (val) { in pch_pic_update_irq()
28 irq = ctz64(val); in pch_pic_update_irq()
38 if (val) { in pch_pic_update_irq()
39 irq = ctz64(val); in pch_pic_update_irq()
82 uint64_t val = 0; in loongarch_pch_pic_low_readw() local
125 return val; in loongarch_pch_pic_low_readw()
212 uint64_t val = 0; in loongarch_pch_pic_high_readw() local
233 return val; in loongarch_pch_pic_high_readw()
267 uint64_t val = 0; in loongarch_pch_pic_readb() local
[all …]
H A Dexynos4210_combiner.c88 uint32_t val; in exynos4210_combiner_read() local
99 val = 0; in exynos4210_combiner_read()
104 val |= s->group[grp_quad_base_n].src_pending; in exynos4210_combiner_read()
111 val |= s->group[grp_quad_base_n].src_mask & in exynos4210_combiner_read()
113 val |= (s->group[grp_quad_base_n + 1].src_mask & in exynos4210_combiner_read()
115 val |= (s->group[grp_quad_base_n + 2].src_mask & in exynos4210_combiner_read()
117 val |= (s->group[grp_quad_base_n + 3].src_mask & in exynos4210_combiner_read()
125 val = s->reg_set[offset >> 2]; in exynos4210_combiner_read()
127 return val; in exynos4210_combiner_read()
172 uint64_t val, unsigned size) in exynos4210_combiner_write() argument
[all …]
H A Dloongarch_ipi.c68 if ((val >> 27) & 0xf) { in send_ipi_data()
80 data |= (val >> 32) & ~mask; in send_ipi_data()
124 cpuid = extract32(val, 16, 10); in mail_send()
143 cpuid = extract32(val, 16, 10); in any_send()
150 addr = val & 0xffff; in any_send()
174 s->en = val; in loongarch_ipi_writel()
177 s->status |= val; in loongarch_ipi_writel()
183 s->status &= ~val; in loongarch_ipi_writel()
190 s->buf[index] = val; in loongarch_ipi_writel()
232 ret = mail_send(val, attrs); in loongarch_ipi_writeq()
[all …]
H A Dloongson_ipi.c91 if ((val >> 27) & 0xf) { in send_ipi_data()
102 data |= (val >> 32) & ~mask; in send_ipi_data()
147 cpuid = extract32(val, 16, 10); in mail_send()
165 cpuid = extract32(val, 16, 10); in any_send()
172 addr = val & 0xffff; in any_send()
195 s->en = val; in loongson_ipi_writel()
198 s->status |= val; in loongson_ipi_writel()
204 s->status &= ~val; in loongson_ipi_writel()
211 s->buf[index] = val; in loongson_ipi_writel()
253 ret = mail_send(val, attrs); in loongson_ipi_writeq()
[all …]
H A Daspeed_vic.c111 uint64_t val; in aspeed_vic_read() local
133 val = s->raw; in aspeed_vic_read()
137 val = s->select; in aspeed_vic_read()
141 val = s->enable; in aspeed_vic_read()
149 val = s->sense; in aspeed_vic_read()
157 val = s->event; in aspeed_vic_read()
169 val = 0; in aspeed_vic_read()
175 val = 0; in aspeed_vic_read()
179 val = extract64(val, 32, 19); in aspeed_vic_read()
181 val = extract64(val, 0, 32); in aspeed_vic_read()
[all …]
/qemu/hw/remote/
H A Dproxy.c153 msg.data.pci_conf_data.val = (op == MPQEMU_CMD_PCI_CFGWRITE) ? *val : 0; in config_op_send()
168 *val = (uint32_t)ret; in config_op_send()
174 uint32_t val; in pci_proxy_read_config() local
178 return val; in pci_proxy_read_config()
247 msg.data.bar_access.val = *val; in type_init()
258 *val = ret; in type_init()
274 uint64_t val; in proxy_bar_read() local
279 return val; in proxy_bar_read()
302 pc->vendor_id = (uint16_t)val; in probe_pci_info()
305 pc->device_id = (uint16_t)val; in probe_pci_info()
[all …]
/qemu/hw/sparc64/
H A Dsun4u_iommu.c197 trace_sun4u_iommu_mem_write(addr, val, size); in iommu_mem_write()
205 is->regs[IOMMU_CTRL >> 3] = val; in iommu_mem_write()
217 is->regs[IOMMU_BASE >> 3] = val; in iommu_mem_write()
231 addr, size, val); in iommu_mem_write()
239 uint64_t val; in iommu_mem_read() local
246 val = is->regs[IOMMU_CTRL >> 3]; in iommu_mem_read()
256 val = is->regs[IOMMU_BASE >> 3]; in iommu_mem_read()
264 val = 0; in iommu_mem_read()
271 val = 0; in iommu_mem_read()
275 trace_sun4u_iommu_mem_read(addr, val, size); in iommu_mem_read()
[all …]
/qemu/target/arm/tcg/
H A Dvec_internal.h95 int32_t val = src << shift; in do_sqrshl_bhs() local
98 return val; in do_sqrshl_bhs()
102 if (!sat || val == extval) { in do_sqrshl_bhs()
126 uint32_t val = src << shift; in do_uqrshl_bhs() local
129 return val; in do_uqrshl_bhs()
133 if (!sat || val == extval) { in do_uqrshl_bhs()
171 int64_t val = src << shift; in do_sqrshl_d() local
172 if (!sat || val >> shift == src) { in do_sqrshl_d()
173 return val; in do_sqrshl_d()
195 uint64_t val = src << shift; in do_uqrshl_d() local
[all …]
/qemu/hw/audio/
H A Dcs4231a.c279 if (val == 0 || val == 32) in cs_reset_voices()
283 xtal = val & 1; in cs_reset_voices()
404 uint32_t saddr, iaddr, val; in cs_write() local
407 val = val64; in cs_write()
429 val, iaddr); in cs_write()
438 val = (val & ~0x0f) | (s->dregs[iaddr] & 0x0f); in cs_write()
445 val); in cs_write()
455 if (val & PPIO) { in cs_write()
459 if (val & PEN) { in cs_write()
480 if (val & MODE2) in cs_write()
[all …]
/qemu/hw/i386/xen/
H A Dxen_platform.c88 s->log_buffer[s->log_buffer_off++] = val; in OBJECT_DECLARE_SIMPLE_TYPE()
278 if (val & UNPLUG_ALL_NICS) { in platform_fixed_ioport_writew()
285 switch (val) { in platform_fixed_ioport_writew()
296 s->driver_product_version = val; in platform_fixed_ioport_writew()
319 s->flags = val & PFFLAG_ROM_LOCK; in platform_fixed_ioport_writeb()
328 s->flags = val & PFFLAG_ROM_LOCK; in platform_fixed_ioport_writeb()
337 log_writeb(s, val); in platform_fixed_ioport_writeb()
453 if (val == 1) { in xen_platform_ioport_writeb()
467 switch (val) { in xen_platform_ioport_writeb()
475 log_writeb(s, (uint32_t)val); in xen_platform_ioport_writeb()
[all …]
/qemu/target/sparc/
H A Dldst_helper.c528 val &= ~CACHE_CTRL_FD; in leon3_cache_control_st()
529 val &= ~CACHE_CTRL_FI; in leon3_cache_control_st()
530 val &= ~CACHE_CTRL_IB; in leon3_cache_control_st()
531 val &= ~CACHE_CTRL_IP; in leon3_cache_control_st()
532 val &= ~CACHE_CTRL_DP; in leon3_cache_control_st()
534 env->cache_control = val; in leon3_cache_control_st()
922 | val; in helper_st_asi()
1118 env->mmubpctrc = val & 0x3; in helper_st_asi()
1121 env->mmubpctrs = val & 0x3; in helper_st_asi()
1751 env->immu.tsb = val; in helper_st_asi()
[all …]
/qemu/hw/rtc/
H A Dm48t59.c214 tmp = from_bcd(val & 0x7F); in m48t59_write()
223 tmp = from_bcd(val & 0x7F); in m48t59_write()
232 tmp = from_bcd(val & 0x3F); in m48t59_write()
241 tmp = from_bcd(val & 0x3F); in m48t59_write()
265 tmp = from_bcd(val & 0x7F); in m48t59_write()
272 if (val & 0x80) { in m48t59_write()
284 tmp = from_bcd(val & 0x7F); in m48t59_write()
294 tmp = from_bcd(val & 0x3F); in m48t59_write()
333 tmp = from_bcd(val); in m48t59_write()
467 NVRAM->addr |= val; in NVRAM_writeb()
[all …]
/qemu/hw/isa/
H A Dapm.c33 static void apm_ioport_writeb(void *opaque, hwaddr addr, uint64_t val, in apm_ioport_writeb() argument
39 trace_apm_io_write(addr, val); in apm_ioport_writeb()
41 apm->apmc = val; in apm_ioport_writeb()
44 (apm->callback)(val, apm->arg); in apm_ioport_writeb()
47 apm->apms = val; in apm_ioport_writeb()
54 uint32_t val; in apm_ioport_readb() local
58 val = apm->apmc; in apm_ioport_readb()
60 val = apm->apms; in apm_ioport_readb()
62 trace_apm_io_read(addr, val); in apm_ioport_readb()
64 return val; in apm_ioport_readb()
/qemu/hw/virtio/
H A Dvirtio-pci.c540 val = bswap16(val); in virtio_pci_config_read()
546 val = bswap32(val); in virtio_pci_config_read()
550 return val; in virtio_pci_config_read()
579 val = bswap16(val); in virtio_pci_config_write()
585 val = bswap32(val); in virtio_pci_config_write()
636 uint64_t val; in virtio_address_space_write() local
674 uint64_t val; in virtio_address_space_read() local
1563 val = 0; in virtio_pci_common_read()
1566 return val; in virtio_pci_common_read()
1752 return val; in virtio_pci_isr_read()
[all …]
/qemu/hw/pci-host/
H A Dpnv_phb4.c81 val = bswap16(val); in pnv_phb4_config_write()
84 val = bswap32(val); in pnv_phb4_config_write()
97 uint64_t val; in pnv_phb4_config_read() local
116 return val; in pnv_phb4_config_read()
155 uint64_t val; in pnv_phb4_rc_config_read() local
392 *tptr = val; in pnv_phb4_ioda_write()
565 val = 0; in pnv_phb4_reg_write()
644 uint64_t val; in pnv_phb4_reg_read() local
724 return val; in pnv_phb4_reg_read()
741 uint64_t val; in pnv_phb4_xscom_read() local
[all …]

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