1 #include "cpudefs.h"
2 #include "cpuextra.h"
3 #include "inlines.h"
4 #include "cputbl.h"
5 #define CPUFUNC(x) x##_ff
6 #ifdef NOFLAGS
7 #include "noflags.h"
8 #endif
9
10 const int areg_byteinc[] = { 1, 1, 1, 1, 1, 1, 1, 2 };
11 const int imm8_table[] = { 8, 1, 2, 3, 4, 5, 6, 7 };
12
13 const int movem_index1[256] = {
14 0x08, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
15 0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
16 0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
17 0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
18 0x06, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
19 0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
20 0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
21 0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
22 0x07, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
23 0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
24 0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
25 0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
26 0x06, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
27 0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
28 0x05, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
29 0x04, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00, 0x03, 0x00, 0x01, 0x00, 0x02, 0x00, 0x01, 0x00,
30 };
31
32 const int movem_index2[256] = {
33 0xFFFFFFFF, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
34 0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
35 0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
36 0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
37 0x01, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
38 0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
39 0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
40 0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
41 0x00, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
42 0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
43 0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
44 0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
45 0x01, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
46 0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
47 0x02, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
48 0x03, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07, 0x04, 0x07, 0x06, 0x07, 0x05, 0x07, 0x06, 0x07,
49 };
50
51 const int movem_next[256] = {
52 0x00, 0x00, 0x00, 0x02, 0x00, 0x04, 0x04, 0x06, 0x00, 0x08, 0x08, 0x0A, 0x08, 0x0C, 0x0C, 0x0E,
53 0x00, 0x10, 0x10, 0x12, 0x10, 0x14, 0x14, 0x16, 0x10, 0x18, 0x18, 0x1A, 0x18, 0x1C, 0x1C, 0x1E,
54 0x00, 0x20, 0x20, 0x22, 0x20, 0x24, 0x24, 0x26, 0x20, 0x28, 0x28, 0x2A, 0x28, 0x2C, 0x2C, 0x2E,
55 0x20, 0x30, 0x30, 0x32, 0x30, 0x34, 0x34, 0x36, 0x30, 0x38, 0x38, 0x3A, 0x38, 0x3C, 0x3C, 0x3E,
56 0x00, 0x40, 0x40, 0x42, 0x40, 0x44, 0x44, 0x46, 0x40, 0x48, 0x48, 0x4A, 0x48, 0x4C, 0x4C, 0x4E,
57 0x40, 0x50, 0x50, 0x52, 0x50, 0x54, 0x54, 0x56, 0x50, 0x58, 0x58, 0x5A, 0x58, 0x5C, 0x5C, 0x5E,
58 0x40, 0x60, 0x60, 0x62, 0x60, 0x64, 0x64, 0x66, 0x60, 0x68, 0x68, 0x6A, 0x68, 0x6C, 0x6C, 0x6E,
59 0x60, 0x70, 0x70, 0x72, 0x70, 0x74, 0x74, 0x76, 0x70, 0x78, 0x78, 0x7A, 0x78, 0x7C, 0x7C, 0x7E,
60 0x00, 0x80, 0x80, 0x82, 0x80, 0x84, 0x84, 0x86, 0x80, 0x88, 0x88, 0x8A, 0x88, 0x8C, 0x8C, 0x8E,
61 0x80, 0x90, 0x90, 0x92, 0x90, 0x94, 0x94, 0x96, 0x90, 0x98, 0x98, 0x9A, 0x98, 0x9C, 0x9C, 0x9E,
62 0x80, 0xA0, 0xA0, 0xA2, 0xA0, 0xA4, 0xA4, 0xA6, 0xA0, 0xA8, 0xA8, 0xAA, 0xA8, 0xAC, 0xAC, 0xAE,
63 0xA0, 0xB0, 0xB0, 0xB2, 0xB0, 0xB4, 0xB4, 0xB6, 0xB0, 0xB8, 0xB8, 0xBA, 0xB8, 0xBC, 0xBC, 0xBE,
64 0x80, 0xC0, 0xC0, 0xC2, 0xC0, 0xC4, 0xC4, 0xC6, 0xC0, 0xC8, 0xC8, 0xCA, 0xC8, 0xCC, 0xCC, 0xCE,
65 0xC0, 0xD0, 0xD0, 0xD2, 0xD0, 0xD4, 0xD4, 0xD6, 0xD0, 0xD8, 0xD8, 0xDA, 0xD8, 0xDC, 0xDC, 0xDE,
66 0xC0, 0xE0, 0xE0, 0xE2, 0xE0, 0xE4, 0xE4, 0xE6, 0xE0, 0xE8, 0xE8, 0xEA, 0xE8, 0xEC, 0xEC, 0xEE,
67 0xE0, 0xF0, 0xF0, 0xF2, 0xF0, 0xF4, 0xF4, 0xF6, 0xF0, 0xF8, 0xF8, 0xFA, 0xF8, 0xFC, 0xFC, 0xFE,
68 };
69
70
71 #if !defined(PART_1) && !defined(PART_2) && !defined(PART_3) && !defined(PART_4) && !defined(PART_5) && !defined(PART_6) && !defined(PART_7) && !defined(PART_8)
72 #define PART_1 1
73 #define PART_2 1
74 #define PART_3 1
75 #define PART_4 1
76 #define PART_5 1
77 #define PART_6 1
78 #define PART_7 1
79 #define PART_8 1
80 #endif
81
82 #ifdef PART_1
CPUFUNC(op_0_4)83 unsigned long CPUFUNC(op_0_4)(uint32_t opcode) /* OR */
84 {
85 uint32_t dstreg = opcode & 7;
86 OpcodeFamily = 1; CurrentInstrCycles = 8;
87 {{ int8_t src = get_ibyte(2);
88 { int8_t dst = m68k_dreg(regs, dstreg);
89 src |= dst;
90 CLEAR_CZNV;
91 SET_ZFLG (((int8_t)(src)) == 0);
92 SET_NFLG (((int8_t)(src)) < 0);
93 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
94 }}}m68k_incpc(4);
95 return 8;
96 }
CPUFUNC(op_10_4)97 unsigned long CPUFUNC(op_10_4)(uint32_t opcode) /* OR */
98 {
99 uint32_t dstreg = opcode & 7;
100 OpcodeFamily = 1; CurrentInstrCycles = 16;
101 {{ int8_t src = get_ibyte(2);
102 { uint32_t dsta = m68k_areg(regs, dstreg);
103 { int8_t dst = m68k_read_memory_8(dsta);
104 src |= dst;
105 CLEAR_CZNV;
106 SET_ZFLG (((int8_t)(src)) == 0);
107 SET_NFLG (((int8_t)(src)) < 0);
108 m68k_write_memory_8(dsta,src);
109 }}}}m68k_incpc(4);
110 return 16;
111 }
CPUFUNC(op_18_4)112 unsigned long CPUFUNC(op_18_4)(uint32_t opcode) /* OR */
113 {
114 uint32_t dstreg = opcode & 7;
115 OpcodeFamily = 1; CurrentInstrCycles = 16;
116 {{ int8_t src = get_ibyte(2);
117 { uint32_t dsta = m68k_areg(regs, dstreg);
118 { int8_t dst = m68k_read_memory_8(dsta);
119 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
120 src |= dst;
121 CLEAR_CZNV;
122 SET_ZFLG (((int8_t)(src)) == 0);
123 SET_NFLG (((int8_t)(src)) < 0);
124 m68k_write_memory_8(dsta,src);
125 }}}}m68k_incpc(4);
126 return 16;
127 }
CPUFUNC(op_20_4)128 unsigned long CPUFUNC(op_20_4)(uint32_t opcode) /* OR */
129 {
130 uint32_t dstreg = opcode & 7;
131 OpcodeFamily = 1; CurrentInstrCycles = 18;
132 {{ int8_t src = get_ibyte(2);
133 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
134 { int8_t dst = m68k_read_memory_8(dsta);
135 m68k_areg (regs, dstreg) = dsta;
136 src |= dst;
137 CLEAR_CZNV;
138 SET_ZFLG (((int8_t)(src)) == 0);
139 SET_NFLG (((int8_t)(src)) < 0);
140 m68k_write_memory_8(dsta,src);
141 }}}}m68k_incpc(4);
142 return 18;
143 }
CPUFUNC(op_28_4)144 unsigned long CPUFUNC(op_28_4)(uint32_t opcode) /* OR */
145 {
146 uint32_t dstreg = opcode & 7;
147 OpcodeFamily = 1; CurrentInstrCycles = 20;
148 {{ int8_t src = get_ibyte(2);
149 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
150 { int8_t dst = m68k_read_memory_8(dsta);
151 src |= dst;
152 CLEAR_CZNV;
153 SET_ZFLG (((int8_t)(src)) == 0);
154 SET_NFLG (((int8_t)(src)) < 0);
155 m68k_write_memory_8(dsta,src);
156 }}}}m68k_incpc(6);
157 return 20;
158 }
CPUFUNC(op_30_4)159 unsigned long CPUFUNC(op_30_4)(uint32_t opcode) /* OR */
160 {
161 uint32_t dstreg = opcode & 7;
162 OpcodeFamily = 1; CurrentInstrCycles = 22;
163 {{ int8_t src = get_ibyte(2);
164 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
165 BusCyclePenalty += 2;
166 { int8_t dst = m68k_read_memory_8(dsta);
167 src |= dst;
168 CLEAR_CZNV;
169 SET_ZFLG (((int8_t)(src)) == 0);
170 SET_NFLG (((int8_t)(src)) < 0);
171 m68k_write_memory_8(dsta,src);
172 }}}}m68k_incpc(6);
173 return 22;
174 }
CPUFUNC(op_38_4)175 unsigned long CPUFUNC(op_38_4)(uint32_t opcode) /* OR */
176 {
177 OpcodeFamily = 1; CurrentInstrCycles = 20;
178 {{ int8_t src = get_ibyte(2);
179 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
180 { int8_t dst = m68k_read_memory_8(dsta);
181 src |= dst;
182 CLEAR_CZNV;
183 SET_ZFLG (((int8_t)(src)) == 0);
184 SET_NFLG (((int8_t)(src)) < 0);
185 m68k_write_memory_8(dsta,src);
186 }}}}m68k_incpc(6);
187 return 20;
188 }
CPUFUNC(op_39_4)189 unsigned long CPUFUNC(op_39_4)(uint32_t opcode) /* OR */
190 {
191 OpcodeFamily = 1; CurrentInstrCycles = 24;
192 {{ int8_t src = get_ibyte(2);
193 { uint32_t dsta = get_ilong(4);
194 { int8_t dst = m68k_read_memory_8(dsta);
195 src |= dst;
196 CLEAR_CZNV;
197 SET_ZFLG (((int8_t)(src)) == 0);
198 SET_NFLG (((int8_t)(src)) < 0);
199 m68k_write_memory_8(dsta,src);
200 }}}}m68k_incpc(8);
201 return 24;
202 }
CPUFUNC(op_3c_4)203 unsigned long CPUFUNC(op_3c_4)(uint32_t opcode) /* ORSR */
204 {
205 OpcodeFamily = 4; CurrentInstrCycles = 20;
206 { MakeSR();
207 { int16_t src = get_iword(2);
208 src &= 0xFF;
209 regs.sr |= src;
210 MakeFromSR();
211 }}m68k_incpc(4);
212 return 20;
213 }
CPUFUNC(op_40_4)214 unsigned long CPUFUNC(op_40_4)(uint32_t opcode) /* OR */
215 {
216 uint32_t dstreg = opcode & 7;
217 OpcodeFamily = 1; CurrentInstrCycles = 8;
218 {{ int16_t src = get_iword(2);
219 { int16_t dst = m68k_dreg(regs, dstreg);
220 src |= dst;
221 CLEAR_CZNV;
222 SET_ZFLG (((int16_t)(src)) == 0);
223 SET_NFLG (((int16_t)(src)) < 0);
224 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
225 }}}m68k_incpc(4);
226 return 8;
227 }
CPUFUNC(op_50_4)228 unsigned long CPUFUNC(op_50_4)(uint32_t opcode) /* OR */
229 {
230 uint32_t dstreg = opcode & 7;
231 OpcodeFamily = 1; CurrentInstrCycles = 16;
232 {{ int16_t src = get_iword(2);
233 { uint32_t dsta = m68k_areg(regs, dstreg);
234 { int16_t dst = m68k_read_memory_16(dsta);
235 src |= dst;
236 CLEAR_CZNV;
237 SET_ZFLG (((int16_t)(src)) == 0);
238 SET_NFLG (((int16_t)(src)) < 0);
239 m68k_write_memory_16(dsta,src);
240 }}}}m68k_incpc(4);
241 return 16;
242 }
CPUFUNC(op_58_4)243 unsigned long CPUFUNC(op_58_4)(uint32_t opcode) /* OR */
244 {
245 uint32_t dstreg = opcode & 7;
246 OpcodeFamily = 1; CurrentInstrCycles = 16;
247 {{ int16_t src = get_iword(2);
248 { uint32_t dsta = m68k_areg(regs, dstreg);
249 { int16_t dst = m68k_read_memory_16(dsta);
250 m68k_areg(regs, dstreg) += 2;
251 src |= dst;
252 CLEAR_CZNV;
253 SET_ZFLG (((int16_t)(src)) == 0);
254 SET_NFLG (((int16_t)(src)) < 0);
255 m68k_write_memory_16(dsta,src);
256 }}}}m68k_incpc(4);
257 return 16;
258 }
CPUFUNC(op_60_4)259 unsigned long CPUFUNC(op_60_4)(uint32_t opcode) /* OR */
260 {
261 uint32_t dstreg = opcode & 7;
262 OpcodeFamily = 1; CurrentInstrCycles = 18;
263 {{ int16_t src = get_iword(2);
264 { uint32_t dsta = m68k_areg(regs, dstreg) - 2;
265 { int16_t dst = m68k_read_memory_16(dsta);
266 m68k_areg (regs, dstreg) = dsta;
267 src |= dst;
268 CLEAR_CZNV;
269 SET_ZFLG (((int16_t)(src)) == 0);
270 SET_NFLG (((int16_t)(src)) < 0);
271 m68k_write_memory_16(dsta,src);
272 }}}}m68k_incpc(4);
273 return 18;
274 }
CPUFUNC(op_68_4)275 unsigned long CPUFUNC(op_68_4)(uint32_t opcode) /* OR */
276 {
277 uint32_t dstreg = opcode & 7;
278 OpcodeFamily = 1; CurrentInstrCycles = 20;
279 {{ int16_t src = get_iword(2);
280 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
281 { int16_t dst = m68k_read_memory_16(dsta);
282 src |= dst;
283 CLEAR_CZNV;
284 SET_ZFLG (((int16_t)(src)) == 0);
285 SET_NFLG (((int16_t)(src)) < 0);
286 m68k_write_memory_16(dsta,src);
287 }}}}m68k_incpc(6);
288 return 20;
289 }
CPUFUNC(op_70_4)290 unsigned long CPUFUNC(op_70_4)(uint32_t opcode) /* OR */
291 {
292 uint32_t dstreg = opcode & 7;
293 OpcodeFamily = 1; CurrentInstrCycles = 22;
294 {{ int16_t src = get_iword(2);
295 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
296 BusCyclePenalty += 2;
297 { int16_t dst = m68k_read_memory_16(dsta);
298 src |= dst;
299 CLEAR_CZNV;
300 SET_ZFLG (((int16_t)(src)) == 0);
301 SET_NFLG (((int16_t)(src)) < 0);
302 m68k_write_memory_16(dsta,src);
303 }}}}m68k_incpc(6);
304 return 22;
305 }
CPUFUNC(op_78_4)306 unsigned long CPUFUNC(op_78_4)(uint32_t opcode) /* OR */
307 {
308 OpcodeFamily = 1; CurrentInstrCycles = 20;
309 {{ int16_t src = get_iword(2);
310 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
311 { int16_t dst = m68k_read_memory_16(dsta);
312 src |= dst;
313 CLEAR_CZNV;
314 SET_ZFLG (((int16_t)(src)) == 0);
315 SET_NFLG (((int16_t)(src)) < 0);
316 m68k_write_memory_16(dsta,src);
317 }}}}m68k_incpc(6);
318 return 20;
319 }
CPUFUNC(op_79_4)320 unsigned long CPUFUNC(op_79_4)(uint32_t opcode) /* OR */
321 {
322 OpcodeFamily = 1; CurrentInstrCycles = 24;
323 {{ int16_t src = get_iword(2);
324 { uint32_t dsta = get_ilong(4);
325 { int16_t dst = m68k_read_memory_16(dsta);
326 src |= dst;
327 CLEAR_CZNV;
328 SET_ZFLG (((int16_t)(src)) == 0);
329 SET_NFLG (((int16_t)(src)) < 0);
330 m68k_write_memory_16(dsta,src);
331 }}}}m68k_incpc(8);
332 return 24;
333 }
CPUFUNC(op_7c_4)334 unsigned long CPUFUNC(op_7c_4)(uint32_t opcode) /* ORSR */
335 {
336 OpcodeFamily = 4; CurrentInstrCycles = 20;
337 {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel18; }
338 { MakeSR();
339 { int16_t src = get_iword(2);
340 regs.sr |= src;
341 MakeFromSR();
342 }}}m68k_incpc(4);
343 endlabel18: ;
344 return 20;
345 }
CPUFUNC(op_80_4)346 unsigned long CPUFUNC(op_80_4)(uint32_t opcode) /* OR */
347 {
348 uint32_t dstreg = opcode & 7;
349 OpcodeFamily = 1; CurrentInstrCycles = 16;
350 {{ int32_t src = get_ilong(2);
351 { int32_t dst = m68k_dreg(regs, dstreg);
352 src |= dst;
353 CLEAR_CZNV;
354 SET_ZFLG (((int32_t)(src)) == 0);
355 SET_NFLG (((int32_t)(src)) < 0);
356 m68k_dreg(regs, dstreg) = (src);
357 }}}m68k_incpc(6);
358 return 16;
359 }
CPUFUNC(op_90_4)360 unsigned long CPUFUNC(op_90_4)(uint32_t opcode) /* OR */
361 {
362 uint32_t dstreg = opcode & 7;
363 OpcodeFamily = 1; CurrentInstrCycles = 28;
364 {{ int32_t src = get_ilong(2);
365 { uint32_t dsta = m68k_areg(regs, dstreg);
366 { int32_t dst = m68k_read_memory_32(dsta);
367 src |= dst;
368 CLEAR_CZNV;
369 SET_ZFLG (((int32_t)(src)) == 0);
370 SET_NFLG (((int32_t)(src)) < 0);
371 m68k_write_memory_32(dsta,src);
372 }}}}m68k_incpc(6);
373 return 28;
374 }
CPUFUNC(op_98_4)375 unsigned long CPUFUNC(op_98_4)(uint32_t opcode) /* OR */
376 {
377 uint32_t dstreg = opcode & 7;
378 OpcodeFamily = 1; CurrentInstrCycles = 28;
379 {{ int32_t src = get_ilong(2);
380 { uint32_t dsta = m68k_areg(regs, dstreg);
381 { int32_t dst = m68k_read_memory_32(dsta);
382 m68k_areg(regs, dstreg) += 4;
383 src |= dst;
384 CLEAR_CZNV;
385 SET_ZFLG (((int32_t)(src)) == 0);
386 SET_NFLG (((int32_t)(src)) < 0);
387 m68k_write_memory_32(dsta,src);
388 }}}}m68k_incpc(6);
389 return 28;
390 }
CPUFUNC(op_a0_4)391 unsigned long CPUFUNC(op_a0_4)(uint32_t opcode) /* OR */
392 {
393 uint32_t dstreg = opcode & 7;
394 OpcodeFamily = 1; CurrentInstrCycles = 30;
395 {{ int32_t src = get_ilong(2);
396 { uint32_t dsta = m68k_areg(regs, dstreg) - 4;
397 { int32_t dst = m68k_read_memory_32(dsta);
398 m68k_areg (regs, dstreg) = dsta;
399 src |= dst;
400 CLEAR_CZNV;
401 SET_ZFLG (((int32_t)(src)) == 0);
402 SET_NFLG (((int32_t)(src)) < 0);
403 m68k_write_memory_32(dsta,src);
404 }}}}m68k_incpc(6);
405 return 30;
406 }
CPUFUNC(op_a8_4)407 unsigned long CPUFUNC(op_a8_4)(uint32_t opcode) /* OR */
408 {
409 uint32_t dstreg = opcode & 7;
410 OpcodeFamily = 1; CurrentInstrCycles = 32;
411 {{ int32_t src = get_ilong(2);
412 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
413 { int32_t dst = m68k_read_memory_32(dsta);
414 src |= dst;
415 CLEAR_CZNV;
416 SET_ZFLG (((int32_t)(src)) == 0);
417 SET_NFLG (((int32_t)(src)) < 0);
418 m68k_write_memory_32(dsta,src);
419 }}}}m68k_incpc(8);
420 return 32;
421 }
CPUFUNC(op_b0_4)422 unsigned long CPUFUNC(op_b0_4)(uint32_t opcode) /* OR */
423 {
424 uint32_t dstreg = opcode & 7;
425 OpcodeFamily = 1; CurrentInstrCycles = 34;
426 {{ int32_t src = get_ilong(2);
427 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
428 BusCyclePenalty += 2;
429 { int32_t dst = m68k_read_memory_32(dsta);
430 src |= dst;
431 CLEAR_CZNV;
432 SET_ZFLG (((int32_t)(src)) == 0);
433 SET_NFLG (((int32_t)(src)) < 0);
434 m68k_write_memory_32(dsta,src);
435 }}}}m68k_incpc(8);
436 return 34;
437 }
CPUFUNC(op_b8_4)438 unsigned long CPUFUNC(op_b8_4)(uint32_t opcode) /* OR */
439 {
440 OpcodeFamily = 1; CurrentInstrCycles = 32;
441 {{ int32_t src = get_ilong(2);
442 { uint32_t dsta = (int32_t)(int16_t)get_iword(6);
443 { int32_t dst = m68k_read_memory_32(dsta);
444 src |= dst;
445 CLEAR_CZNV;
446 SET_ZFLG (((int32_t)(src)) == 0);
447 SET_NFLG (((int32_t)(src)) < 0);
448 m68k_write_memory_32(dsta,src);
449 }}}}m68k_incpc(8);
450 return 32;
451 }
CPUFUNC(op_b9_4)452 unsigned long CPUFUNC(op_b9_4)(uint32_t opcode) /* OR */
453 {
454 OpcodeFamily = 1; CurrentInstrCycles = 36;
455 {{ int32_t src = get_ilong(2);
456 { uint32_t dsta = get_ilong(6);
457 { int32_t dst = m68k_read_memory_32(dsta);
458 src |= dst;
459 CLEAR_CZNV;
460 SET_ZFLG (((int32_t)(src)) == 0);
461 SET_NFLG (((int32_t)(src)) < 0);
462 m68k_write_memory_32(dsta,src);
463 }}}}m68k_incpc(10);
464 return 36;
465 }
CPUFUNC(op_100_4)466 unsigned long CPUFUNC(op_100_4)(uint32_t opcode) /* BTST */
467 {
468 uint32_t srcreg = ((opcode >> 9) & 7);
469 uint32_t dstreg = opcode & 7;
470 OpcodeFamily = 21; CurrentInstrCycles = 6;
471 {{ int32_t src = m68k_dreg(regs, srcreg);
472 { int32_t dst = m68k_dreg(regs, dstreg);
473 src &= 31;
474 SET_ZFLG (1 ^ ((dst >> src) & 1));
475 }}}m68k_incpc(2);
476 return 6;
477 }
CPUFUNC(op_108_4)478 unsigned long CPUFUNC(op_108_4)(uint32_t opcode) /* MVPMR */
479 {
480 uint32_t srcreg = (opcode & 7);
481 uint32_t dstreg = (opcode >> 9) & 7;
482 OpcodeFamily = 29; CurrentInstrCycles = 16;
483 { uint32_t memp = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
484 { uint16_t val = (m68k_read_memory_8(memp) << 8) + m68k_read_memory_8(memp + 2);
485 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((val) & 0xffff);
486 }}m68k_incpc(4);
487 return 16;
488 }
CPUFUNC(op_110_4)489 unsigned long CPUFUNC(op_110_4)(uint32_t opcode) /* BTST */
490 {
491 uint32_t srcreg = ((opcode >> 9) & 7);
492 uint32_t dstreg = opcode & 7;
493 OpcodeFamily = 21; CurrentInstrCycles = 8;
494 {{ int8_t src = m68k_dreg(regs, srcreg);
495 { uint32_t dsta = m68k_areg(regs, dstreg);
496 { int8_t dst = m68k_read_memory_8(dsta);
497 src &= 7;
498 SET_ZFLG (1 ^ ((dst >> src) & 1));
499 }}}}m68k_incpc(2);
500 return 8;
501 }
CPUFUNC(op_118_4)502 unsigned long CPUFUNC(op_118_4)(uint32_t opcode) /* BTST */
503 {
504 uint32_t srcreg = ((opcode >> 9) & 7);
505 uint32_t dstreg = opcode & 7;
506 OpcodeFamily = 21; CurrentInstrCycles = 8;
507 {{ int8_t src = m68k_dreg(regs, srcreg);
508 { uint32_t dsta = m68k_areg(regs, dstreg);
509 { int8_t dst = m68k_read_memory_8(dsta);
510 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
511 src &= 7;
512 SET_ZFLG (1 ^ ((dst >> src) & 1));
513 }}}}m68k_incpc(2);
514 return 8;
515 }
CPUFUNC(op_120_4)516 unsigned long CPUFUNC(op_120_4)(uint32_t opcode) /* BTST */
517 {
518 uint32_t srcreg = ((opcode >> 9) & 7);
519 uint32_t dstreg = opcode & 7;
520 OpcodeFamily = 21; CurrentInstrCycles = 10;
521 {{ int8_t src = m68k_dreg(regs, srcreg);
522 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
523 { int8_t dst = m68k_read_memory_8(dsta);
524 m68k_areg (regs, dstreg) = dsta;
525 src &= 7;
526 SET_ZFLG (1 ^ ((dst >> src) & 1));
527 }}}}m68k_incpc(2);
528 return 10;
529 }
CPUFUNC(op_128_4)530 unsigned long CPUFUNC(op_128_4)(uint32_t opcode) /* BTST */
531 {
532 uint32_t srcreg = ((opcode >> 9) & 7);
533 uint32_t dstreg = opcode & 7;
534 OpcodeFamily = 21; CurrentInstrCycles = 12;
535 {{ int8_t src = m68k_dreg(regs, srcreg);
536 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
537 { int8_t dst = m68k_read_memory_8(dsta);
538 src &= 7;
539 SET_ZFLG (1 ^ ((dst >> src) & 1));
540 }}}}m68k_incpc(4);
541 return 12;
542 }
CPUFUNC(op_130_4)543 unsigned long CPUFUNC(op_130_4)(uint32_t opcode) /* BTST */
544 {
545 uint32_t srcreg = ((opcode >> 9) & 7);
546 uint32_t dstreg = opcode & 7;
547 OpcodeFamily = 21; CurrentInstrCycles = 14;
548 {{ int8_t src = m68k_dreg(regs, srcreg);
549 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
550 BusCyclePenalty += 2;
551 { int8_t dst = m68k_read_memory_8(dsta);
552 src &= 7;
553 SET_ZFLG (1 ^ ((dst >> src) & 1));
554 }}}}m68k_incpc(4);
555 return 14;
556 }
CPUFUNC(op_138_4)557 unsigned long CPUFUNC(op_138_4)(uint32_t opcode) /* BTST */
558 {
559 uint32_t srcreg = ((opcode >> 9) & 7);
560 OpcodeFamily = 21; CurrentInstrCycles = 12;
561 {{ int8_t src = m68k_dreg(regs, srcreg);
562 { uint32_t dsta = (int32_t)(int16_t)get_iword(2);
563 { int8_t dst = m68k_read_memory_8(dsta);
564 src &= 7;
565 SET_ZFLG (1 ^ ((dst >> src) & 1));
566 }}}}m68k_incpc(4);
567 return 12;
568 }
CPUFUNC(op_139_4)569 unsigned long CPUFUNC(op_139_4)(uint32_t opcode) /* BTST */
570 {
571 uint32_t srcreg = ((opcode >> 9) & 7);
572 OpcodeFamily = 21; CurrentInstrCycles = 16;
573 {{ int8_t src = m68k_dreg(regs, srcreg);
574 { uint32_t dsta = get_ilong(2);
575 { int8_t dst = m68k_read_memory_8(dsta);
576 src &= 7;
577 SET_ZFLG (1 ^ ((dst >> src) & 1));
578 }}}}m68k_incpc(6);
579 return 16;
580 }
CPUFUNC(op_13a_4)581 unsigned long CPUFUNC(op_13a_4)(uint32_t opcode) /* BTST */
582 {
583 uint32_t srcreg = ((opcode >> 9) & 7);
584 uint32_t dstreg = 2;
585 OpcodeFamily = 21; CurrentInstrCycles = 12;
586 {{ int8_t src = m68k_dreg(regs, srcreg);
587 { uint32_t dsta = m68k_getpc () + 2;
588 dsta += (int32_t)(int16_t)get_iword(2);
589 { int8_t dst = m68k_read_memory_8(dsta);
590 src &= 7;
591 SET_ZFLG (1 ^ ((dst >> src) & 1));
592 }}}}m68k_incpc(4);
593 return 12;
594 }
CPUFUNC(op_13b_4)595 unsigned long CPUFUNC(op_13b_4)(uint32_t opcode) /* BTST */
596 {
597 uint32_t srcreg = ((opcode >> 9) & 7);
598 uint32_t dstreg = 3;
599 OpcodeFamily = 21; CurrentInstrCycles = 14;
600 {{ int8_t src = m68k_dreg(regs, srcreg);
601 { uint32_t tmppc = m68k_getpc() + 2;
602 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
603 BusCyclePenalty += 2;
604 { int8_t dst = m68k_read_memory_8(dsta);
605 src &= 7;
606 SET_ZFLG (1 ^ ((dst >> src) & 1));
607 }}}}m68k_incpc(4);
608 return 14;
609 }
CPUFUNC(op_13c_4)610 unsigned long CPUFUNC(op_13c_4)(uint32_t opcode) /* BTST */
611 {
612 uint32_t srcreg = ((opcode >> 9) & 7);
613 OpcodeFamily = 21; CurrentInstrCycles = 8;
614 {{ int8_t src = m68k_dreg(regs, srcreg);
615 { int8_t dst = get_ibyte(2);
616 src &= 7;
617 SET_ZFLG (1 ^ ((dst >> src) & 1));
618 }}}m68k_incpc(4);
619 return 8;
620 }
CPUFUNC(op_140_4)621 unsigned long CPUFUNC(op_140_4)(uint32_t opcode) /* BCHG */
622 {
623 uint32_t srcreg = ((opcode >> 9) & 7);
624 uint32_t dstreg = opcode & 7;
625 OpcodeFamily = 22; CurrentInstrCycles = 8;
626 {{ int32_t src = m68k_dreg(regs, srcreg);
627 { int32_t dst = m68k_dreg(regs, dstreg);
628 src &= 31;
629 dst ^= (1 << src);
630 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
631 m68k_dreg(regs, dstreg) = (dst);
632 }}}m68k_incpc(2);
633 return 8;
634 }
CPUFUNC(op_148_4)635 unsigned long CPUFUNC(op_148_4)(uint32_t opcode) /* MVPMR */
636 {
637 uint32_t srcreg = (opcode & 7);
638 uint32_t dstreg = (opcode >> 9) & 7;
639 OpcodeFamily = 29; CurrentInstrCycles = 24;
640 { uint32_t memp = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
641 { uint32_t val = (m68k_read_memory_8(memp) << 24) + (m68k_read_memory_8(memp + 2) << 16)
642 + (m68k_read_memory_8(memp + 4) << 8) + m68k_read_memory_8(memp + 6);
643 m68k_dreg(regs, dstreg) = (val);
644 }}m68k_incpc(4);
645 return 24;
646 }
CPUFUNC(op_150_4)647 unsigned long CPUFUNC(op_150_4)(uint32_t opcode) /* BCHG */
648 {
649 uint32_t srcreg = ((opcode >> 9) & 7);
650 uint32_t dstreg = opcode & 7;
651 OpcodeFamily = 22; CurrentInstrCycles = 12;
652 {{ int8_t src = m68k_dreg(regs, srcreg);
653 { uint32_t dsta = m68k_areg(regs, dstreg);
654 { int8_t dst = m68k_read_memory_8(dsta);
655 src &= 7;
656 dst ^= (1 << src);
657 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
658 m68k_write_memory_8(dsta,dst);
659 }}}}m68k_incpc(2);
660 return 12;
661 }
CPUFUNC(op_158_4)662 unsigned long CPUFUNC(op_158_4)(uint32_t opcode) /* BCHG */
663 {
664 uint32_t srcreg = ((opcode >> 9) & 7);
665 uint32_t dstreg = opcode & 7;
666 OpcodeFamily = 22; CurrentInstrCycles = 12;
667 {{ int8_t src = m68k_dreg(regs, srcreg);
668 { uint32_t dsta = m68k_areg(regs, dstreg);
669 { int8_t dst = m68k_read_memory_8(dsta);
670 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
671 src &= 7;
672 dst ^= (1 << src);
673 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
674 m68k_write_memory_8(dsta,dst);
675 }}}}m68k_incpc(2);
676 return 12;
677 }
CPUFUNC(op_160_4)678 unsigned long CPUFUNC(op_160_4)(uint32_t opcode) /* BCHG */
679 {
680 uint32_t srcreg = ((opcode >> 9) & 7);
681 uint32_t dstreg = opcode & 7;
682 OpcodeFamily = 22; CurrentInstrCycles = 14;
683 {{ int8_t src = m68k_dreg(regs, srcreg);
684 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
685 { int8_t dst = m68k_read_memory_8(dsta);
686 m68k_areg (regs, dstreg) = dsta;
687 src &= 7;
688 dst ^= (1 << src);
689 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
690 m68k_write_memory_8(dsta,dst);
691 }}}}m68k_incpc(2);
692 return 14;
693 }
CPUFUNC(op_168_4)694 unsigned long CPUFUNC(op_168_4)(uint32_t opcode) /* BCHG */
695 {
696 uint32_t srcreg = ((opcode >> 9) & 7);
697 uint32_t dstreg = opcode & 7;
698 OpcodeFamily = 22; CurrentInstrCycles = 16;
699 {{ int8_t src = m68k_dreg(regs, srcreg);
700 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
701 { int8_t dst = m68k_read_memory_8(dsta);
702 src &= 7;
703 dst ^= (1 << src);
704 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
705 m68k_write_memory_8(dsta,dst);
706 }}}}m68k_incpc(4);
707 return 16;
708 }
CPUFUNC(op_170_4)709 unsigned long CPUFUNC(op_170_4)(uint32_t opcode) /* BCHG */
710 {
711 uint32_t srcreg = ((opcode >> 9) & 7);
712 uint32_t dstreg = opcode & 7;
713 OpcodeFamily = 22; CurrentInstrCycles = 18;
714 {{ int8_t src = m68k_dreg(regs, srcreg);
715 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
716 BusCyclePenalty += 2;
717 { int8_t dst = m68k_read_memory_8(dsta);
718 src &= 7;
719 dst ^= (1 << src);
720 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
721 m68k_write_memory_8(dsta,dst);
722 }}}}m68k_incpc(4);
723 return 18;
724 }
CPUFUNC(op_178_4)725 unsigned long CPUFUNC(op_178_4)(uint32_t opcode) /* BCHG */
726 {
727 uint32_t srcreg = ((opcode >> 9) & 7);
728 OpcodeFamily = 22; CurrentInstrCycles = 16;
729 {{ int8_t src = m68k_dreg(regs, srcreg);
730 { uint32_t dsta = (int32_t)(int16_t)get_iword(2);
731 { int8_t dst = m68k_read_memory_8(dsta);
732 src &= 7;
733 dst ^= (1 << src);
734 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
735 m68k_write_memory_8(dsta,dst);
736 }}}}m68k_incpc(4);
737 return 16;
738 }
CPUFUNC(op_179_4)739 unsigned long CPUFUNC(op_179_4)(uint32_t opcode) /* BCHG */
740 {
741 uint32_t srcreg = ((opcode >> 9) & 7);
742 OpcodeFamily = 22; CurrentInstrCycles = 20;
743 {{ int8_t src = m68k_dreg(regs, srcreg);
744 { uint32_t dsta = get_ilong(2);
745 { int8_t dst = m68k_read_memory_8(dsta);
746 src &= 7;
747 dst ^= (1 << src);
748 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
749 m68k_write_memory_8(dsta,dst);
750 }}}}m68k_incpc(6);
751 return 20;
752 }
CPUFUNC(op_17a_4)753 unsigned long CPUFUNC(op_17a_4)(uint32_t opcode) /* BCHG */
754 {
755 uint32_t srcreg = ((opcode >> 9) & 7);
756 uint32_t dstreg = 2;
757 OpcodeFamily = 22; CurrentInstrCycles = 16;
758 {{ int8_t src = m68k_dreg(regs, srcreg);
759 { uint32_t dsta = m68k_getpc () + 2;
760 dsta += (int32_t)(int16_t)get_iword(2);
761 { int8_t dst = m68k_read_memory_8(dsta);
762 src &= 7;
763 dst ^= (1 << src);
764 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
765 m68k_write_memory_8(dsta,dst);
766 }}}}m68k_incpc(4);
767 return 16;
768 }
CPUFUNC(op_17b_4)769 unsigned long CPUFUNC(op_17b_4)(uint32_t opcode) /* BCHG */
770 {
771 uint32_t srcreg = ((opcode >> 9) & 7);
772 uint32_t dstreg = 3;
773 OpcodeFamily = 22; CurrentInstrCycles = 18;
774 {{ int8_t src = m68k_dreg(regs, srcreg);
775 { uint32_t tmppc = m68k_getpc() + 2;
776 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
777 BusCyclePenalty += 2;
778 { int8_t dst = m68k_read_memory_8(dsta);
779 src &= 7;
780 dst ^= (1 << src);
781 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
782 m68k_write_memory_8(dsta,dst);
783 }}}}m68k_incpc(4);
784 return 18;
785 }
CPUFUNC(op_180_4)786 unsigned long CPUFUNC(op_180_4)(uint32_t opcode) /* BCLR */
787 {
788 uint32_t srcreg = ((opcode >> 9) & 7);
789 uint32_t dstreg = opcode & 7;
790 OpcodeFamily = 23; CurrentInstrCycles = 10;
791 {{ int32_t src = m68k_dreg(regs, srcreg);
792 { int32_t dst = m68k_dreg(regs, dstreg);
793 src &= 31;
794 SET_ZFLG (1 ^ ((dst >> src) & 1));
795 dst &= ~(1 << src);
796 m68k_dreg(regs, dstreg) = (dst);
797 if ( src < 16 ) { m68k_incpc(2); return 8; }
798 }}}m68k_incpc(2);
799 return 10;
800 }
CPUFUNC(op_188_4)801 unsigned long CPUFUNC(op_188_4)(uint32_t opcode) /* MVPRM */
802 {
803 uint32_t srcreg = ((opcode >> 9) & 7);
804 uint32_t dstreg = opcode & 7;
805 OpcodeFamily = 28; CurrentInstrCycles = 16;
806 {{ int16_t src = m68k_dreg(regs, srcreg);
807 uint32_t memp = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
808 m68k_write_memory_8(memp, src >> 8); m68k_write_memory_8(memp + 2, src);
809 }}m68k_incpc(4);
810 return 16;
811 }
CPUFUNC(op_190_4)812 unsigned long CPUFUNC(op_190_4)(uint32_t opcode) /* BCLR */
813 {
814 uint32_t srcreg = ((opcode >> 9) & 7);
815 uint32_t dstreg = opcode & 7;
816 OpcodeFamily = 23; CurrentInstrCycles = 12;
817 {{ int8_t src = m68k_dreg(regs, srcreg);
818 { uint32_t dsta = m68k_areg(regs, dstreg);
819 { int8_t dst = m68k_read_memory_8(dsta);
820 src &= 7;
821 SET_ZFLG (1 ^ ((dst >> src) & 1));
822 dst &= ~(1 << src);
823 m68k_write_memory_8(dsta,dst);
824 }}}}m68k_incpc(2);
825 return 12;
826 }
CPUFUNC(op_198_4)827 unsigned long CPUFUNC(op_198_4)(uint32_t opcode) /* BCLR */
828 {
829 uint32_t srcreg = ((opcode >> 9) & 7);
830 uint32_t dstreg = opcode & 7;
831 OpcodeFamily = 23; CurrentInstrCycles = 12;
832 {{ int8_t src = m68k_dreg(regs, srcreg);
833 { uint32_t dsta = m68k_areg(regs, dstreg);
834 { int8_t dst = m68k_read_memory_8(dsta);
835 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
836 src &= 7;
837 SET_ZFLG (1 ^ ((dst >> src) & 1));
838 dst &= ~(1 << src);
839 m68k_write_memory_8(dsta,dst);
840 }}}}m68k_incpc(2);
841 return 12;
842 }
CPUFUNC(op_1a0_4)843 unsigned long CPUFUNC(op_1a0_4)(uint32_t opcode) /* BCLR */
844 {
845 uint32_t srcreg = ((opcode >> 9) & 7);
846 uint32_t dstreg = opcode & 7;
847 OpcodeFamily = 23; CurrentInstrCycles = 14;
848 {{ int8_t src = m68k_dreg(regs, srcreg);
849 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
850 { int8_t dst = m68k_read_memory_8(dsta);
851 m68k_areg (regs, dstreg) = dsta;
852 src &= 7;
853 SET_ZFLG (1 ^ ((dst >> src) & 1));
854 dst &= ~(1 << src);
855 m68k_write_memory_8(dsta,dst);
856 }}}}m68k_incpc(2);
857 return 14;
858 }
CPUFUNC(op_1a8_4)859 unsigned long CPUFUNC(op_1a8_4)(uint32_t opcode) /* BCLR */
860 {
861 uint32_t srcreg = ((opcode >> 9) & 7);
862 uint32_t dstreg = opcode & 7;
863 OpcodeFamily = 23; CurrentInstrCycles = 16;
864 {{ int8_t src = m68k_dreg(regs, srcreg);
865 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
866 { int8_t dst = m68k_read_memory_8(dsta);
867 src &= 7;
868 SET_ZFLG (1 ^ ((dst >> src) & 1));
869 dst &= ~(1 << src);
870 m68k_write_memory_8(dsta,dst);
871 }}}}m68k_incpc(4);
872 return 16;
873 }
CPUFUNC(op_1b0_4)874 unsigned long CPUFUNC(op_1b0_4)(uint32_t opcode) /* BCLR */
875 {
876 uint32_t srcreg = ((opcode >> 9) & 7);
877 uint32_t dstreg = opcode & 7;
878 OpcodeFamily = 23; CurrentInstrCycles = 18;
879 {{ int8_t src = m68k_dreg(regs, srcreg);
880 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
881 BusCyclePenalty += 2;
882 { int8_t dst = m68k_read_memory_8(dsta);
883 src &= 7;
884 SET_ZFLG (1 ^ ((dst >> src) & 1));
885 dst &= ~(1 << src);
886 m68k_write_memory_8(dsta,dst);
887 }}}}m68k_incpc(4);
888 return 18;
889 }
CPUFUNC(op_1b8_4)890 unsigned long CPUFUNC(op_1b8_4)(uint32_t opcode) /* BCLR */
891 {
892 uint32_t srcreg = ((opcode >> 9) & 7);
893 OpcodeFamily = 23; CurrentInstrCycles = 16;
894 {{ int8_t src = m68k_dreg(regs, srcreg);
895 { uint32_t dsta = (int32_t)(int16_t)get_iword(2);
896 { int8_t dst = m68k_read_memory_8(dsta);
897 src &= 7;
898 SET_ZFLG (1 ^ ((dst >> src) & 1));
899 dst &= ~(1 << src);
900 m68k_write_memory_8(dsta,dst);
901 }}}}m68k_incpc(4);
902 return 16;
903 }
CPUFUNC(op_1b9_4)904 unsigned long CPUFUNC(op_1b9_4)(uint32_t opcode) /* BCLR */
905 {
906 uint32_t srcreg = ((opcode >> 9) & 7);
907 OpcodeFamily = 23; CurrentInstrCycles = 20;
908 {{ int8_t src = m68k_dreg(regs, srcreg);
909 { uint32_t dsta = get_ilong(2);
910 { int8_t dst = m68k_read_memory_8(dsta);
911 src &= 7;
912 SET_ZFLG (1 ^ ((dst >> src) & 1));
913 dst &= ~(1 << src);
914 m68k_write_memory_8(dsta,dst);
915 }}}}m68k_incpc(6);
916 return 20;
917 }
CPUFUNC(op_1ba_4)918 unsigned long CPUFUNC(op_1ba_4)(uint32_t opcode) /* BCLR */
919 {
920 uint32_t srcreg = ((opcode >> 9) & 7);
921 uint32_t dstreg = 2;
922 OpcodeFamily = 23; CurrentInstrCycles = 16;
923 {{ int8_t src = m68k_dreg(regs, srcreg);
924 { uint32_t dsta = m68k_getpc () + 2;
925 dsta += (int32_t)(int16_t)get_iword(2);
926 { int8_t dst = m68k_read_memory_8(dsta);
927 src &= 7;
928 SET_ZFLG (1 ^ ((dst >> src) & 1));
929 dst &= ~(1 << src);
930 m68k_write_memory_8(dsta,dst);
931 }}}}m68k_incpc(4);
932 return 16;
933 }
CPUFUNC(op_1bb_4)934 unsigned long CPUFUNC(op_1bb_4)(uint32_t opcode) /* BCLR */
935 {
936 uint32_t srcreg = ((opcode >> 9) & 7);
937 uint32_t dstreg = 3;
938 OpcodeFamily = 23; CurrentInstrCycles = 18;
939 {{ int8_t src = m68k_dreg(regs, srcreg);
940 { uint32_t tmppc = m68k_getpc() + 2;
941 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
942 BusCyclePenalty += 2;
943 { int8_t dst = m68k_read_memory_8(dsta);
944 src &= 7;
945 SET_ZFLG (1 ^ ((dst >> src) & 1));
946 dst &= ~(1 << src);
947 m68k_write_memory_8(dsta,dst);
948 }}}}m68k_incpc(4);
949 return 18;
950 }
CPUFUNC(op_1c0_4)951 unsigned long CPUFUNC(op_1c0_4)(uint32_t opcode) /* BSET */
952 {
953 uint32_t srcreg = ((opcode >> 9) & 7);
954 uint32_t dstreg = opcode & 7;
955 OpcodeFamily = 24; CurrentInstrCycles = 8;
956 {{ int32_t src = m68k_dreg(regs, srcreg);
957 { int32_t dst = m68k_dreg(regs, dstreg);
958 src &= 31;
959 SET_ZFLG (1 ^ ((dst >> src) & 1));
960 dst |= (1 << src);
961 m68k_dreg(regs, dstreg) = (dst);
962 }}}m68k_incpc(2);
963 return 8;
964 }
CPUFUNC(op_1c8_4)965 unsigned long CPUFUNC(op_1c8_4)(uint32_t opcode) /* MVPRM */
966 {
967 uint32_t srcreg = ((opcode >> 9) & 7);
968 uint32_t dstreg = opcode & 7;
969 OpcodeFamily = 28; CurrentInstrCycles = 24;
970 {{ int32_t src = m68k_dreg(regs, srcreg);
971 uint32_t memp = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
972 m68k_write_memory_8(memp, src >> 24); m68k_write_memory_8(memp + 2, src >> 16);
973 m68k_write_memory_8(memp + 4, src >> 8); m68k_write_memory_8(memp + 6, src);
974 }}m68k_incpc(4);
975 return 24;
976 }
CPUFUNC(op_1d0_4)977 unsigned long CPUFUNC(op_1d0_4)(uint32_t opcode) /* BSET */
978 {
979 uint32_t srcreg = ((opcode >> 9) & 7);
980 uint32_t dstreg = opcode & 7;
981 OpcodeFamily = 24; CurrentInstrCycles = 12;
982 {{ int8_t src = m68k_dreg(regs, srcreg);
983 { uint32_t dsta = m68k_areg(regs, dstreg);
984 { int8_t dst = m68k_read_memory_8(dsta);
985 src &= 7;
986 SET_ZFLG (1 ^ ((dst >> src) & 1));
987 dst |= (1 << src);
988 m68k_write_memory_8(dsta,dst);
989 }}}}m68k_incpc(2);
990 return 12;
991 }
CPUFUNC(op_1d8_4)992 unsigned long CPUFUNC(op_1d8_4)(uint32_t opcode) /* BSET */
993 {
994 uint32_t srcreg = ((opcode >> 9) & 7);
995 uint32_t dstreg = opcode & 7;
996 OpcodeFamily = 24; CurrentInstrCycles = 12;
997 {{ int8_t src = m68k_dreg(regs, srcreg);
998 { uint32_t dsta = m68k_areg(regs, dstreg);
999 { int8_t dst = m68k_read_memory_8(dsta);
1000 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
1001 src &= 7;
1002 SET_ZFLG (1 ^ ((dst >> src) & 1));
1003 dst |= (1 << src);
1004 m68k_write_memory_8(dsta,dst);
1005 }}}}m68k_incpc(2);
1006 return 12;
1007 }
CPUFUNC(op_1e0_4)1008 unsigned long CPUFUNC(op_1e0_4)(uint32_t opcode) /* BSET */
1009 {
1010 uint32_t srcreg = ((opcode >> 9) & 7);
1011 uint32_t dstreg = opcode & 7;
1012 OpcodeFamily = 24; CurrentInstrCycles = 14;
1013 {{ int8_t src = m68k_dreg(regs, srcreg);
1014 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
1015 { int8_t dst = m68k_read_memory_8(dsta);
1016 m68k_areg (regs, dstreg) = dsta;
1017 src &= 7;
1018 SET_ZFLG (1 ^ ((dst >> src) & 1));
1019 dst |= (1 << src);
1020 m68k_write_memory_8(dsta,dst);
1021 }}}}m68k_incpc(2);
1022 return 14;
1023 }
CPUFUNC(op_1e8_4)1024 unsigned long CPUFUNC(op_1e8_4)(uint32_t opcode) /* BSET */
1025 {
1026 uint32_t srcreg = ((opcode >> 9) & 7);
1027 uint32_t dstreg = opcode & 7;
1028 OpcodeFamily = 24; CurrentInstrCycles = 16;
1029 {{ int8_t src = m68k_dreg(regs, srcreg);
1030 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(2);
1031 { int8_t dst = m68k_read_memory_8(dsta);
1032 src &= 7;
1033 SET_ZFLG (1 ^ ((dst >> src) & 1));
1034 dst |= (1 << src);
1035 m68k_write_memory_8(dsta,dst);
1036 }}}}m68k_incpc(4);
1037 return 16;
1038 }
CPUFUNC(op_1f0_4)1039 unsigned long CPUFUNC(op_1f0_4)(uint32_t opcode) /* BSET */
1040 {
1041 uint32_t srcreg = ((opcode >> 9) & 7);
1042 uint32_t dstreg = opcode & 7;
1043 OpcodeFamily = 24; CurrentInstrCycles = 18;
1044 {{ int8_t src = m68k_dreg(regs, srcreg);
1045 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(2));
1046 BusCyclePenalty += 2;
1047 { int8_t dst = m68k_read_memory_8(dsta);
1048 src &= 7;
1049 SET_ZFLG (1 ^ ((dst >> src) & 1));
1050 dst |= (1 << src);
1051 m68k_write_memory_8(dsta,dst);
1052 }}}}m68k_incpc(4);
1053 return 18;
1054 }
CPUFUNC(op_1f8_4)1055 unsigned long CPUFUNC(op_1f8_4)(uint32_t opcode) /* BSET */
1056 {
1057 uint32_t srcreg = ((opcode >> 9) & 7);
1058 OpcodeFamily = 24; CurrentInstrCycles = 16;
1059 {{ int8_t src = m68k_dreg(regs, srcreg);
1060 { uint32_t dsta = (int32_t)(int16_t)get_iword(2);
1061 { int8_t dst = m68k_read_memory_8(dsta);
1062 src &= 7;
1063 SET_ZFLG (1 ^ ((dst >> src) & 1));
1064 dst |= (1 << src);
1065 m68k_write_memory_8(dsta,dst);
1066 }}}}m68k_incpc(4);
1067 return 16;
1068 }
CPUFUNC(op_1f9_4)1069 unsigned long CPUFUNC(op_1f9_4)(uint32_t opcode) /* BSET */
1070 {
1071 uint32_t srcreg = ((opcode >> 9) & 7);
1072 OpcodeFamily = 24; CurrentInstrCycles = 20;
1073 {{ int8_t src = m68k_dreg(regs, srcreg);
1074 { uint32_t dsta = get_ilong(2);
1075 { int8_t dst = m68k_read_memory_8(dsta);
1076 src &= 7;
1077 SET_ZFLG (1 ^ ((dst >> src) & 1));
1078 dst |= (1 << src);
1079 m68k_write_memory_8(dsta,dst);
1080 }}}}m68k_incpc(6);
1081 return 20;
1082 }
CPUFUNC(op_1fa_4)1083 unsigned long CPUFUNC(op_1fa_4)(uint32_t opcode) /* BSET */
1084 {
1085 uint32_t srcreg = ((opcode >> 9) & 7);
1086 uint32_t dstreg = 2;
1087 OpcodeFamily = 24; CurrentInstrCycles = 16;
1088 {{ int8_t src = m68k_dreg(regs, srcreg);
1089 { uint32_t dsta = m68k_getpc () + 2;
1090 dsta += (int32_t)(int16_t)get_iword(2);
1091 { int8_t dst = m68k_read_memory_8(dsta);
1092 src &= 7;
1093 SET_ZFLG (1 ^ ((dst >> src) & 1));
1094 dst |= (1 << src);
1095 m68k_write_memory_8(dsta,dst);
1096 }}}}m68k_incpc(4);
1097 return 16;
1098 }
CPUFUNC(op_1fb_4)1099 unsigned long CPUFUNC(op_1fb_4)(uint32_t opcode) /* BSET */
1100 {
1101 uint32_t srcreg = ((opcode >> 9) & 7);
1102 uint32_t dstreg = 3;
1103 OpcodeFamily = 24; CurrentInstrCycles = 18;
1104 {{ int8_t src = m68k_dreg(regs, srcreg);
1105 { uint32_t tmppc = m68k_getpc() + 2;
1106 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(2));
1107 BusCyclePenalty += 2;
1108 { int8_t dst = m68k_read_memory_8(dsta);
1109 src &= 7;
1110 SET_ZFLG (1 ^ ((dst >> src) & 1));
1111 dst |= (1 << src);
1112 m68k_write_memory_8(dsta,dst);
1113 }}}}m68k_incpc(4);
1114 return 18;
1115 }
CPUFUNC(op_200_4)1116 unsigned long CPUFUNC(op_200_4)(uint32_t opcode) /* AND */
1117 {
1118 uint32_t dstreg = opcode & 7;
1119 OpcodeFamily = 2; CurrentInstrCycles = 8;
1120 {{ int8_t src = get_ibyte(2);
1121 { int8_t dst = m68k_dreg(regs, dstreg);
1122 src &= dst;
1123 CLEAR_CZNV;
1124 SET_ZFLG (((int8_t)(src)) == 0);
1125 SET_NFLG (((int8_t)(src)) < 0);
1126 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
1127 }}}m68k_incpc(4);
1128 return 8;
1129 }
CPUFUNC(op_210_4)1130 unsigned long CPUFUNC(op_210_4)(uint32_t opcode) /* AND */
1131 {
1132 uint32_t dstreg = opcode & 7;
1133 OpcodeFamily = 2; CurrentInstrCycles = 16;
1134 {{ int8_t src = get_ibyte(2);
1135 { uint32_t dsta = m68k_areg(regs, dstreg);
1136 { int8_t dst = m68k_read_memory_8(dsta);
1137 src &= dst;
1138 CLEAR_CZNV;
1139 SET_ZFLG (((int8_t)(src)) == 0);
1140 SET_NFLG (((int8_t)(src)) < 0);
1141 m68k_write_memory_8(dsta,src);
1142 }}}}m68k_incpc(4);
1143 return 16;
1144 }
CPUFUNC(op_218_4)1145 unsigned long CPUFUNC(op_218_4)(uint32_t opcode) /* AND */
1146 {
1147 uint32_t dstreg = opcode & 7;
1148 OpcodeFamily = 2; CurrentInstrCycles = 16;
1149 {{ int8_t src = get_ibyte(2);
1150 { uint32_t dsta = m68k_areg(regs, dstreg);
1151 { int8_t dst = m68k_read_memory_8(dsta);
1152 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
1153 src &= dst;
1154 CLEAR_CZNV;
1155 SET_ZFLG (((int8_t)(src)) == 0);
1156 SET_NFLG (((int8_t)(src)) < 0);
1157 m68k_write_memory_8(dsta,src);
1158 }}}}m68k_incpc(4);
1159 return 16;
1160 }
CPUFUNC(op_220_4)1161 unsigned long CPUFUNC(op_220_4)(uint32_t opcode) /* AND */
1162 {
1163 uint32_t dstreg = opcode & 7;
1164 OpcodeFamily = 2; CurrentInstrCycles = 18;
1165 {{ int8_t src = get_ibyte(2);
1166 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
1167 { int8_t dst = m68k_read_memory_8(dsta);
1168 m68k_areg (regs, dstreg) = dsta;
1169 src &= dst;
1170 CLEAR_CZNV;
1171 SET_ZFLG (((int8_t)(src)) == 0);
1172 SET_NFLG (((int8_t)(src)) < 0);
1173 m68k_write_memory_8(dsta,src);
1174 }}}}m68k_incpc(4);
1175 return 18;
1176 }
CPUFUNC(op_228_4)1177 unsigned long CPUFUNC(op_228_4)(uint32_t opcode) /* AND */
1178 {
1179 uint32_t dstreg = opcode & 7;
1180 OpcodeFamily = 2; CurrentInstrCycles = 20;
1181 {{ int8_t src = get_ibyte(2);
1182 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
1183 { int8_t dst = m68k_read_memory_8(dsta);
1184 src &= dst;
1185 CLEAR_CZNV;
1186 SET_ZFLG (((int8_t)(src)) == 0);
1187 SET_NFLG (((int8_t)(src)) < 0);
1188 m68k_write_memory_8(dsta,src);
1189 }}}}m68k_incpc(6);
1190 return 20;
1191 }
CPUFUNC(op_230_4)1192 unsigned long CPUFUNC(op_230_4)(uint32_t opcode) /* AND */
1193 {
1194 uint32_t dstreg = opcode & 7;
1195 OpcodeFamily = 2; CurrentInstrCycles = 22;
1196 {{ int8_t src = get_ibyte(2);
1197 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
1198 BusCyclePenalty += 2;
1199 { int8_t dst = m68k_read_memory_8(dsta);
1200 src &= dst;
1201 CLEAR_CZNV;
1202 SET_ZFLG (((int8_t)(src)) == 0);
1203 SET_NFLG (((int8_t)(src)) < 0);
1204 m68k_write_memory_8(dsta,src);
1205 }}}}m68k_incpc(6);
1206 return 22;
1207 }
CPUFUNC(op_238_4)1208 unsigned long CPUFUNC(op_238_4)(uint32_t opcode) /* AND */
1209 {
1210 OpcodeFamily = 2; CurrentInstrCycles = 20;
1211 {{ int8_t src = get_ibyte(2);
1212 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
1213 { int8_t dst = m68k_read_memory_8(dsta);
1214 src &= dst;
1215 CLEAR_CZNV;
1216 SET_ZFLG (((int8_t)(src)) == 0);
1217 SET_NFLG (((int8_t)(src)) < 0);
1218 m68k_write_memory_8(dsta,src);
1219 }}}}m68k_incpc(6);
1220 return 20;
1221 }
CPUFUNC(op_239_4)1222 unsigned long CPUFUNC(op_239_4)(uint32_t opcode) /* AND */
1223 {
1224 OpcodeFamily = 2; CurrentInstrCycles = 24;
1225 {{ int8_t src = get_ibyte(2);
1226 { uint32_t dsta = get_ilong(4);
1227 { int8_t dst = m68k_read_memory_8(dsta);
1228 src &= dst;
1229 CLEAR_CZNV;
1230 SET_ZFLG (((int8_t)(src)) == 0);
1231 SET_NFLG (((int8_t)(src)) < 0);
1232 m68k_write_memory_8(dsta,src);
1233 }}}}m68k_incpc(8);
1234 return 24;
1235 }
CPUFUNC(op_23c_4)1236 unsigned long CPUFUNC(op_23c_4)(uint32_t opcode) /* ANDSR */
1237 {
1238 OpcodeFamily = 5; CurrentInstrCycles = 20;
1239 { MakeSR();
1240 { int16_t src = get_iword(2);
1241 src |= 0xFF00;
1242 regs.sr &= src;
1243 MakeFromSR();
1244 }}m68k_incpc(4);
1245 return 20;
1246 }
CPUFUNC(op_240_4)1247 unsigned long CPUFUNC(op_240_4)(uint32_t opcode) /* AND */
1248 {
1249 uint32_t dstreg = opcode & 7;
1250 OpcodeFamily = 2; CurrentInstrCycles = 8;
1251 {{ int16_t src = get_iword(2);
1252 { int16_t dst = m68k_dreg(regs, dstreg);
1253 src &= dst;
1254 CLEAR_CZNV;
1255 SET_ZFLG (((int16_t)(src)) == 0);
1256 SET_NFLG (((int16_t)(src)) < 0);
1257 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
1258 }}}m68k_incpc(4);
1259 return 8;
1260 }
CPUFUNC(op_250_4)1261 unsigned long CPUFUNC(op_250_4)(uint32_t opcode) /* AND */
1262 {
1263 uint32_t dstreg = opcode & 7;
1264 OpcodeFamily = 2; CurrentInstrCycles = 16;
1265 {{ int16_t src = get_iword(2);
1266 { uint32_t dsta = m68k_areg(regs, dstreg);
1267 { int16_t dst = m68k_read_memory_16(dsta);
1268 src &= dst;
1269 CLEAR_CZNV;
1270 SET_ZFLG (((int16_t)(src)) == 0);
1271 SET_NFLG (((int16_t)(src)) < 0);
1272 m68k_write_memory_16(dsta,src);
1273 }}}}m68k_incpc(4);
1274 return 16;
1275 }
CPUFUNC(op_258_4)1276 unsigned long CPUFUNC(op_258_4)(uint32_t opcode) /* AND */
1277 {
1278 uint32_t dstreg = opcode & 7;
1279 OpcodeFamily = 2; CurrentInstrCycles = 16;
1280 {{ int16_t src = get_iword(2);
1281 { uint32_t dsta = m68k_areg(regs, dstreg);
1282 { int16_t dst = m68k_read_memory_16(dsta);
1283 m68k_areg(regs, dstreg) += 2;
1284 src &= dst;
1285 CLEAR_CZNV;
1286 SET_ZFLG (((int16_t)(src)) == 0);
1287 SET_NFLG (((int16_t)(src)) < 0);
1288 m68k_write_memory_16(dsta,src);
1289 }}}}m68k_incpc(4);
1290 return 16;
1291 }
CPUFUNC(op_260_4)1292 unsigned long CPUFUNC(op_260_4)(uint32_t opcode) /* AND */
1293 {
1294 uint32_t dstreg = opcode & 7;
1295 OpcodeFamily = 2; CurrentInstrCycles = 18;
1296 {{ int16_t src = get_iword(2);
1297 { uint32_t dsta = m68k_areg(regs, dstreg) - 2;
1298 { int16_t dst = m68k_read_memory_16(dsta);
1299 m68k_areg (regs, dstreg) = dsta;
1300 src &= dst;
1301 CLEAR_CZNV;
1302 SET_ZFLG (((int16_t)(src)) == 0);
1303 SET_NFLG (((int16_t)(src)) < 0);
1304 m68k_write_memory_16(dsta,src);
1305 }}}}m68k_incpc(4);
1306 return 18;
1307 }
CPUFUNC(op_268_4)1308 unsigned long CPUFUNC(op_268_4)(uint32_t opcode) /* AND */
1309 {
1310 uint32_t dstreg = opcode & 7;
1311 OpcodeFamily = 2; CurrentInstrCycles = 20;
1312 {{ int16_t src = get_iword(2);
1313 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
1314 { int16_t dst = m68k_read_memory_16(dsta);
1315 src &= dst;
1316 CLEAR_CZNV;
1317 SET_ZFLG (((int16_t)(src)) == 0);
1318 SET_NFLG (((int16_t)(src)) < 0);
1319 m68k_write_memory_16(dsta,src);
1320 }}}}m68k_incpc(6);
1321 return 20;
1322 }
CPUFUNC(op_270_4)1323 unsigned long CPUFUNC(op_270_4)(uint32_t opcode) /* AND */
1324 {
1325 uint32_t dstreg = opcode & 7;
1326 OpcodeFamily = 2; CurrentInstrCycles = 22;
1327 {{ int16_t src = get_iword(2);
1328 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
1329 BusCyclePenalty += 2;
1330 { int16_t dst = m68k_read_memory_16(dsta);
1331 src &= dst;
1332 CLEAR_CZNV;
1333 SET_ZFLG (((int16_t)(src)) == 0);
1334 SET_NFLG (((int16_t)(src)) < 0);
1335 m68k_write_memory_16(dsta,src);
1336 }}}}m68k_incpc(6);
1337 return 22;
1338 }
CPUFUNC(op_278_4)1339 unsigned long CPUFUNC(op_278_4)(uint32_t opcode) /* AND */
1340 {
1341 OpcodeFamily = 2; CurrentInstrCycles = 20;
1342 {{ int16_t src = get_iword(2);
1343 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
1344 { int16_t dst = m68k_read_memory_16(dsta);
1345 src &= dst;
1346 CLEAR_CZNV;
1347 SET_ZFLG (((int16_t)(src)) == 0);
1348 SET_NFLG (((int16_t)(src)) < 0);
1349 m68k_write_memory_16(dsta,src);
1350 }}}}m68k_incpc(6);
1351 return 20;
1352 }
CPUFUNC(op_279_4)1353 unsigned long CPUFUNC(op_279_4)(uint32_t opcode) /* AND */
1354 {
1355 OpcodeFamily = 2; CurrentInstrCycles = 24;
1356 {{ int16_t src = get_iword(2);
1357 { uint32_t dsta = get_ilong(4);
1358 { int16_t dst = m68k_read_memory_16(dsta);
1359 src &= dst;
1360 CLEAR_CZNV;
1361 SET_ZFLG (((int16_t)(src)) == 0);
1362 SET_NFLG (((int16_t)(src)) < 0);
1363 m68k_write_memory_16(dsta,src);
1364 }}}}m68k_incpc(8);
1365 return 24;
1366 }
CPUFUNC(op_27c_4)1367 unsigned long CPUFUNC(op_27c_4)(uint32_t opcode) /* ANDSR */
1368 {
1369 OpcodeFamily = 5; CurrentInstrCycles = 20;
1370 {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel89; }
1371 { MakeSR();
1372 { int16_t src = get_iword(2);
1373 regs.sr &= src;
1374 MakeFromSR();
1375 }}}m68k_incpc(4);
1376 endlabel89: ;
1377 return 20;
1378 }
CPUFUNC(op_280_4)1379 unsigned long CPUFUNC(op_280_4)(uint32_t opcode) /* AND */
1380 {
1381 uint32_t dstreg = opcode & 7;
1382 OpcodeFamily = 2; CurrentInstrCycles = 16;
1383 {{ int32_t src = get_ilong(2);
1384 { int32_t dst = m68k_dreg(regs, dstreg);
1385 src &= dst;
1386 CLEAR_CZNV;
1387 SET_ZFLG (((int32_t)(src)) == 0);
1388 SET_NFLG (((int32_t)(src)) < 0);
1389 m68k_dreg(regs, dstreg) = (src);
1390 }}}m68k_incpc(6);
1391 return 16;
1392 }
CPUFUNC(op_290_4)1393 unsigned long CPUFUNC(op_290_4)(uint32_t opcode) /* AND */
1394 {
1395 uint32_t dstreg = opcode & 7;
1396 OpcodeFamily = 2; CurrentInstrCycles = 28;
1397 {{ int32_t src = get_ilong(2);
1398 { uint32_t dsta = m68k_areg(regs, dstreg);
1399 { int32_t dst = m68k_read_memory_32(dsta);
1400 src &= dst;
1401 CLEAR_CZNV;
1402 SET_ZFLG (((int32_t)(src)) == 0);
1403 SET_NFLG (((int32_t)(src)) < 0);
1404 m68k_write_memory_32(dsta,src);
1405 }}}}m68k_incpc(6);
1406 return 28;
1407 }
CPUFUNC(op_298_4)1408 unsigned long CPUFUNC(op_298_4)(uint32_t opcode) /* AND */
1409 {
1410 uint32_t dstreg = opcode & 7;
1411 OpcodeFamily = 2; CurrentInstrCycles = 28;
1412 {{ int32_t src = get_ilong(2);
1413 { uint32_t dsta = m68k_areg(regs, dstreg);
1414 { int32_t dst = m68k_read_memory_32(dsta);
1415 m68k_areg(regs, dstreg) += 4;
1416 src &= dst;
1417 CLEAR_CZNV;
1418 SET_ZFLG (((int32_t)(src)) == 0);
1419 SET_NFLG (((int32_t)(src)) < 0);
1420 m68k_write_memory_32(dsta,src);
1421 }}}}m68k_incpc(6);
1422 return 28;
1423 }
CPUFUNC(op_2a0_4)1424 unsigned long CPUFUNC(op_2a0_4)(uint32_t opcode) /* AND */
1425 {
1426 uint32_t dstreg = opcode & 7;
1427 OpcodeFamily = 2; CurrentInstrCycles = 30;
1428 {{ int32_t src = get_ilong(2);
1429 { uint32_t dsta = m68k_areg(regs, dstreg) - 4;
1430 { int32_t dst = m68k_read_memory_32(dsta);
1431 m68k_areg (regs, dstreg) = dsta;
1432 src &= dst;
1433 CLEAR_CZNV;
1434 SET_ZFLG (((int32_t)(src)) == 0);
1435 SET_NFLG (((int32_t)(src)) < 0);
1436 m68k_write_memory_32(dsta,src);
1437 }}}}m68k_incpc(6);
1438 return 30;
1439 }
CPUFUNC(op_2a8_4)1440 unsigned long CPUFUNC(op_2a8_4)(uint32_t opcode) /* AND */
1441 {
1442 uint32_t dstreg = opcode & 7;
1443 OpcodeFamily = 2; CurrentInstrCycles = 32;
1444 {{ int32_t src = get_ilong(2);
1445 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
1446 { int32_t dst = m68k_read_memory_32(dsta);
1447 src &= dst;
1448 CLEAR_CZNV;
1449 SET_ZFLG (((int32_t)(src)) == 0);
1450 SET_NFLG (((int32_t)(src)) < 0);
1451 m68k_write_memory_32(dsta,src);
1452 }}}}m68k_incpc(8);
1453 return 32;
1454 }
CPUFUNC(op_2b0_4)1455 unsigned long CPUFUNC(op_2b0_4)(uint32_t opcode) /* AND */
1456 {
1457 uint32_t dstreg = opcode & 7;
1458 OpcodeFamily = 2; CurrentInstrCycles = 34;
1459 {{ int32_t src = get_ilong(2);
1460 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
1461 BusCyclePenalty += 2;
1462 { int32_t dst = m68k_read_memory_32(dsta);
1463 src &= dst;
1464 CLEAR_CZNV;
1465 SET_ZFLG (((int32_t)(src)) == 0);
1466 SET_NFLG (((int32_t)(src)) < 0);
1467 m68k_write_memory_32(dsta,src);
1468 }}}}m68k_incpc(8);
1469 return 34;
1470 }
CPUFUNC(op_2b8_4)1471 unsigned long CPUFUNC(op_2b8_4)(uint32_t opcode) /* AND */
1472 {
1473 OpcodeFamily = 2; CurrentInstrCycles = 32;
1474 {{ int32_t src = get_ilong(2);
1475 { uint32_t dsta = (int32_t)(int16_t)get_iword(6);
1476 { int32_t dst = m68k_read_memory_32(dsta);
1477 src &= dst;
1478 CLEAR_CZNV;
1479 SET_ZFLG (((int32_t)(src)) == 0);
1480 SET_NFLG (((int32_t)(src)) < 0);
1481 m68k_write_memory_32(dsta,src);
1482 }}}}m68k_incpc(8);
1483 return 32;
1484 }
CPUFUNC(op_2b9_4)1485 unsigned long CPUFUNC(op_2b9_4)(uint32_t opcode) /* AND */
1486 {
1487 OpcodeFamily = 2; CurrentInstrCycles = 36;
1488 {{ int32_t src = get_ilong(2);
1489 { uint32_t dsta = get_ilong(6);
1490 { int32_t dst = m68k_read_memory_32(dsta);
1491 src &= dst;
1492 CLEAR_CZNV;
1493 SET_ZFLG (((int32_t)(src)) == 0);
1494 SET_NFLG (((int32_t)(src)) < 0);
1495 m68k_write_memory_32(dsta,src);
1496 }}}}m68k_incpc(10);
1497 return 36;
1498 }
CPUFUNC(op_400_4)1499 unsigned long CPUFUNC(op_400_4)(uint32_t opcode) /* SUB */
1500 {
1501 uint32_t dstreg = opcode & 7;
1502 OpcodeFamily = 7; CurrentInstrCycles = 8;
1503 {{ int8_t src = get_ibyte(2);
1504 { int8_t dst = m68k_dreg(regs, dstreg);
1505 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
1506 { int flgs = ((int8_t)(src)) < 0;
1507 int flgo = ((int8_t)(dst)) < 0;
1508 int flgn = ((int8_t)(newv)) < 0;
1509 SET_ZFLG (((int8_t)(newv)) == 0);
1510 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1511 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
1512 COPY_CARRY;
1513 SET_NFLG (flgn != 0);
1514 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
1515 }}}}}}m68k_incpc(4);
1516 return 8;
1517 }
CPUFUNC(op_410_4)1518 unsigned long CPUFUNC(op_410_4)(uint32_t opcode) /* SUB */
1519 {
1520 uint32_t dstreg = opcode & 7;
1521 OpcodeFamily = 7; CurrentInstrCycles = 16;
1522 {{ int8_t src = get_ibyte(2);
1523 { uint32_t dsta = m68k_areg(regs, dstreg);
1524 { int8_t dst = m68k_read_memory_8(dsta);
1525 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
1526 { int flgs = ((int8_t)(src)) < 0;
1527 int flgo = ((int8_t)(dst)) < 0;
1528 int flgn = ((int8_t)(newv)) < 0;
1529 SET_ZFLG (((int8_t)(newv)) == 0);
1530 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1531 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
1532 COPY_CARRY;
1533 SET_NFLG (flgn != 0);
1534 m68k_write_memory_8(dsta,newv);
1535 }}}}}}}m68k_incpc(4);
1536 return 16;
1537 }
CPUFUNC(op_418_4)1538 unsigned long CPUFUNC(op_418_4)(uint32_t opcode) /* SUB */
1539 {
1540 uint32_t dstreg = opcode & 7;
1541 OpcodeFamily = 7; CurrentInstrCycles = 16;
1542 {{ int8_t src = get_ibyte(2);
1543 { uint32_t dsta = m68k_areg(regs, dstreg);
1544 { int8_t dst = m68k_read_memory_8(dsta);
1545 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
1546 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
1547 { int flgs = ((int8_t)(src)) < 0;
1548 int flgo = ((int8_t)(dst)) < 0;
1549 int flgn = ((int8_t)(newv)) < 0;
1550 SET_ZFLG (((int8_t)(newv)) == 0);
1551 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1552 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
1553 COPY_CARRY;
1554 SET_NFLG (flgn != 0);
1555 m68k_write_memory_8(dsta,newv);
1556 }}}}}}}m68k_incpc(4);
1557 return 16;
1558 }
CPUFUNC(op_420_4)1559 unsigned long CPUFUNC(op_420_4)(uint32_t opcode) /* SUB */
1560 {
1561 uint32_t dstreg = opcode & 7;
1562 OpcodeFamily = 7; CurrentInstrCycles = 18;
1563 {{ int8_t src = get_ibyte(2);
1564 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
1565 { int8_t dst = m68k_read_memory_8(dsta);
1566 m68k_areg (regs, dstreg) = dsta;
1567 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
1568 { int flgs = ((int8_t)(src)) < 0;
1569 int flgo = ((int8_t)(dst)) < 0;
1570 int flgn = ((int8_t)(newv)) < 0;
1571 SET_ZFLG (((int8_t)(newv)) == 0);
1572 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1573 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
1574 COPY_CARRY;
1575 SET_NFLG (flgn != 0);
1576 m68k_write_memory_8(dsta,newv);
1577 }}}}}}}m68k_incpc(4);
1578 return 18;
1579 }
CPUFUNC(op_428_4)1580 unsigned long CPUFUNC(op_428_4)(uint32_t opcode) /* SUB */
1581 {
1582 uint32_t dstreg = opcode & 7;
1583 OpcodeFamily = 7; CurrentInstrCycles = 20;
1584 {{ int8_t src = get_ibyte(2);
1585 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
1586 { int8_t dst = m68k_read_memory_8(dsta);
1587 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
1588 { int flgs = ((int8_t)(src)) < 0;
1589 int flgo = ((int8_t)(dst)) < 0;
1590 int flgn = ((int8_t)(newv)) < 0;
1591 SET_ZFLG (((int8_t)(newv)) == 0);
1592 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1593 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
1594 COPY_CARRY;
1595 SET_NFLG (flgn != 0);
1596 m68k_write_memory_8(dsta,newv);
1597 }}}}}}}m68k_incpc(6);
1598 return 20;
1599 }
CPUFUNC(op_430_4)1600 unsigned long CPUFUNC(op_430_4)(uint32_t opcode) /* SUB */
1601 {
1602 uint32_t dstreg = opcode & 7;
1603 OpcodeFamily = 7; CurrentInstrCycles = 22;
1604 {{ int8_t src = get_ibyte(2);
1605 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
1606 BusCyclePenalty += 2;
1607 { int8_t dst = m68k_read_memory_8(dsta);
1608 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
1609 { int flgs = ((int8_t)(src)) < 0;
1610 int flgo = ((int8_t)(dst)) < 0;
1611 int flgn = ((int8_t)(newv)) < 0;
1612 SET_ZFLG (((int8_t)(newv)) == 0);
1613 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1614 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
1615 COPY_CARRY;
1616 SET_NFLG (flgn != 0);
1617 m68k_write_memory_8(dsta,newv);
1618 }}}}}}}m68k_incpc(6);
1619 return 22;
1620 }
CPUFUNC(op_438_4)1621 unsigned long CPUFUNC(op_438_4)(uint32_t opcode) /* SUB */
1622 {
1623 OpcodeFamily = 7; CurrentInstrCycles = 20;
1624 {{ int8_t src = get_ibyte(2);
1625 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
1626 { int8_t dst = m68k_read_memory_8(dsta);
1627 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
1628 { int flgs = ((int8_t)(src)) < 0;
1629 int flgo = ((int8_t)(dst)) < 0;
1630 int flgn = ((int8_t)(newv)) < 0;
1631 SET_ZFLG (((int8_t)(newv)) == 0);
1632 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1633 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
1634 COPY_CARRY;
1635 SET_NFLG (flgn != 0);
1636 m68k_write_memory_8(dsta,newv);
1637 }}}}}}}m68k_incpc(6);
1638 return 20;
1639 }
CPUFUNC(op_439_4)1640 unsigned long CPUFUNC(op_439_4)(uint32_t opcode) /* SUB */
1641 {
1642 OpcodeFamily = 7; CurrentInstrCycles = 24;
1643 {{ int8_t src = get_ibyte(2);
1644 { uint32_t dsta = get_ilong(4);
1645 { int8_t dst = m68k_read_memory_8(dsta);
1646 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
1647 { int flgs = ((int8_t)(src)) < 0;
1648 int flgo = ((int8_t)(dst)) < 0;
1649 int flgn = ((int8_t)(newv)) < 0;
1650 SET_ZFLG (((int8_t)(newv)) == 0);
1651 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1652 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
1653 COPY_CARRY;
1654 SET_NFLG (flgn != 0);
1655 m68k_write_memory_8(dsta,newv);
1656 }}}}}}}m68k_incpc(8);
1657 return 24;
1658 }
CPUFUNC(op_440_4)1659 unsigned long CPUFUNC(op_440_4)(uint32_t opcode) /* SUB */
1660 {
1661 uint32_t dstreg = opcode & 7;
1662 OpcodeFamily = 7; CurrentInstrCycles = 8;
1663 {{ int16_t src = get_iword(2);
1664 { int16_t dst = m68k_dreg(regs, dstreg);
1665 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
1666 { int flgs = ((int16_t)(src)) < 0;
1667 int flgo = ((int16_t)(dst)) < 0;
1668 int flgn = ((int16_t)(newv)) < 0;
1669 SET_ZFLG (((int16_t)(newv)) == 0);
1670 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1671 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
1672 COPY_CARRY;
1673 SET_NFLG (flgn != 0);
1674 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
1675 }}}}}}m68k_incpc(4);
1676 return 8;
1677 }
CPUFUNC(op_450_4)1678 unsigned long CPUFUNC(op_450_4)(uint32_t opcode) /* SUB */
1679 {
1680 uint32_t dstreg = opcode & 7;
1681 OpcodeFamily = 7; CurrentInstrCycles = 16;
1682 {{ int16_t src = get_iword(2);
1683 { uint32_t dsta = m68k_areg(regs, dstreg);
1684 { int16_t dst = m68k_read_memory_16(dsta);
1685 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
1686 { int flgs = ((int16_t)(src)) < 0;
1687 int flgo = ((int16_t)(dst)) < 0;
1688 int flgn = ((int16_t)(newv)) < 0;
1689 SET_ZFLG (((int16_t)(newv)) == 0);
1690 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1691 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
1692 COPY_CARRY;
1693 SET_NFLG (flgn != 0);
1694 m68k_write_memory_16(dsta,newv);
1695 }}}}}}}m68k_incpc(4);
1696 return 16;
1697 }
CPUFUNC(op_458_4)1698 unsigned long CPUFUNC(op_458_4)(uint32_t opcode) /* SUB */
1699 {
1700 uint32_t dstreg = opcode & 7;
1701 OpcodeFamily = 7; CurrentInstrCycles = 16;
1702 {{ int16_t src = get_iword(2);
1703 { uint32_t dsta = m68k_areg(regs, dstreg);
1704 { int16_t dst = m68k_read_memory_16(dsta);
1705 m68k_areg(regs, dstreg) += 2;
1706 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
1707 { int flgs = ((int16_t)(src)) < 0;
1708 int flgo = ((int16_t)(dst)) < 0;
1709 int flgn = ((int16_t)(newv)) < 0;
1710 SET_ZFLG (((int16_t)(newv)) == 0);
1711 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1712 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
1713 COPY_CARRY;
1714 SET_NFLG (flgn != 0);
1715 m68k_write_memory_16(dsta,newv);
1716 }}}}}}}m68k_incpc(4);
1717 return 16;
1718 }
CPUFUNC(op_460_4)1719 unsigned long CPUFUNC(op_460_4)(uint32_t opcode) /* SUB */
1720 {
1721 uint32_t dstreg = opcode & 7;
1722 OpcodeFamily = 7; CurrentInstrCycles = 18;
1723 {{ int16_t src = get_iword(2);
1724 { uint32_t dsta = m68k_areg(regs, dstreg) - 2;
1725 { int16_t dst = m68k_read_memory_16(dsta);
1726 m68k_areg (regs, dstreg) = dsta;
1727 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
1728 { int flgs = ((int16_t)(src)) < 0;
1729 int flgo = ((int16_t)(dst)) < 0;
1730 int flgn = ((int16_t)(newv)) < 0;
1731 SET_ZFLG (((int16_t)(newv)) == 0);
1732 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1733 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
1734 COPY_CARRY;
1735 SET_NFLG (flgn != 0);
1736 m68k_write_memory_16(dsta,newv);
1737 }}}}}}}m68k_incpc(4);
1738 return 18;
1739 }
CPUFUNC(op_468_4)1740 unsigned long CPUFUNC(op_468_4)(uint32_t opcode) /* SUB */
1741 {
1742 uint32_t dstreg = opcode & 7;
1743 OpcodeFamily = 7; CurrentInstrCycles = 20;
1744 {{ int16_t src = get_iword(2);
1745 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
1746 { int16_t dst = m68k_read_memory_16(dsta);
1747 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
1748 { int flgs = ((int16_t)(src)) < 0;
1749 int flgo = ((int16_t)(dst)) < 0;
1750 int flgn = ((int16_t)(newv)) < 0;
1751 SET_ZFLG (((int16_t)(newv)) == 0);
1752 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1753 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
1754 COPY_CARRY;
1755 SET_NFLG (flgn != 0);
1756 m68k_write_memory_16(dsta,newv);
1757 }}}}}}}m68k_incpc(6);
1758 return 20;
1759 }
CPUFUNC(op_470_4)1760 unsigned long CPUFUNC(op_470_4)(uint32_t opcode) /* SUB */
1761 {
1762 uint32_t dstreg = opcode & 7;
1763 OpcodeFamily = 7; CurrentInstrCycles = 22;
1764 {{ int16_t src = get_iword(2);
1765 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
1766 BusCyclePenalty += 2;
1767 { int16_t dst = m68k_read_memory_16(dsta);
1768 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
1769 { int flgs = ((int16_t)(src)) < 0;
1770 int flgo = ((int16_t)(dst)) < 0;
1771 int flgn = ((int16_t)(newv)) < 0;
1772 SET_ZFLG (((int16_t)(newv)) == 0);
1773 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1774 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
1775 COPY_CARRY;
1776 SET_NFLG (flgn != 0);
1777 m68k_write_memory_16(dsta,newv);
1778 }}}}}}}m68k_incpc(6);
1779 return 22;
1780 }
CPUFUNC(op_478_4)1781 unsigned long CPUFUNC(op_478_4)(uint32_t opcode) /* SUB */
1782 {
1783 OpcodeFamily = 7; CurrentInstrCycles = 20;
1784 {{ int16_t src = get_iword(2);
1785 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
1786 { int16_t dst = m68k_read_memory_16(dsta);
1787 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
1788 { int flgs = ((int16_t)(src)) < 0;
1789 int flgo = ((int16_t)(dst)) < 0;
1790 int flgn = ((int16_t)(newv)) < 0;
1791 SET_ZFLG (((int16_t)(newv)) == 0);
1792 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1793 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
1794 COPY_CARRY;
1795 SET_NFLG (flgn != 0);
1796 m68k_write_memory_16(dsta,newv);
1797 }}}}}}}m68k_incpc(6);
1798 return 20;
1799 }
CPUFUNC(op_479_4)1800 unsigned long CPUFUNC(op_479_4)(uint32_t opcode) /* SUB */
1801 {
1802 OpcodeFamily = 7; CurrentInstrCycles = 24;
1803 {{ int16_t src = get_iword(2);
1804 { uint32_t dsta = get_ilong(4);
1805 { int16_t dst = m68k_read_memory_16(dsta);
1806 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
1807 { int flgs = ((int16_t)(src)) < 0;
1808 int flgo = ((int16_t)(dst)) < 0;
1809 int flgn = ((int16_t)(newv)) < 0;
1810 SET_ZFLG (((int16_t)(newv)) == 0);
1811 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1812 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
1813 COPY_CARRY;
1814 SET_NFLG (flgn != 0);
1815 m68k_write_memory_16(dsta,newv);
1816 }}}}}}}m68k_incpc(8);
1817 return 24;
1818 }
CPUFUNC(op_480_4)1819 unsigned long CPUFUNC(op_480_4)(uint32_t opcode) /* SUB */
1820 {
1821 uint32_t dstreg = opcode & 7;
1822 OpcodeFamily = 7; CurrentInstrCycles = 16;
1823 {{ int32_t src = get_ilong(2);
1824 { int32_t dst = m68k_dreg(regs, dstreg);
1825 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
1826 { int flgs = ((int32_t)(src)) < 0;
1827 int flgo = ((int32_t)(dst)) < 0;
1828 int flgn = ((int32_t)(newv)) < 0;
1829 SET_ZFLG (((int32_t)(newv)) == 0);
1830 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1831 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
1832 COPY_CARRY;
1833 SET_NFLG (flgn != 0);
1834 m68k_dreg(regs, dstreg) = (newv);
1835 }}}}}}m68k_incpc(6);
1836 return 16;
1837 }
CPUFUNC(op_490_4)1838 unsigned long CPUFUNC(op_490_4)(uint32_t opcode) /* SUB */
1839 {
1840 uint32_t dstreg = opcode & 7;
1841 OpcodeFamily = 7; CurrentInstrCycles = 28;
1842 {{ int32_t src = get_ilong(2);
1843 { uint32_t dsta = m68k_areg(regs, dstreg);
1844 { int32_t dst = m68k_read_memory_32(dsta);
1845 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
1846 { int flgs = ((int32_t)(src)) < 0;
1847 int flgo = ((int32_t)(dst)) < 0;
1848 int flgn = ((int32_t)(newv)) < 0;
1849 SET_ZFLG (((int32_t)(newv)) == 0);
1850 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1851 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
1852 COPY_CARRY;
1853 SET_NFLG (flgn != 0);
1854 m68k_write_memory_32(dsta,newv);
1855 }}}}}}}m68k_incpc(6);
1856 return 28;
1857 }
CPUFUNC(op_498_4)1858 unsigned long CPUFUNC(op_498_4)(uint32_t opcode) /* SUB */
1859 {
1860 uint32_t dstreg = opcode & 7;
1861 OpcodeFamily = 7; CurrentInstrCycles = 28;
1862 {{ int32_t src = get_ilong(2);
1863 { uint32_t dsta = m68k_areg(regs, dstreg);
1864 { int32_t dst = m68k_read_memory_32(dsta);
1865 m68k_areg(regs, dstreg) += 4;
1866 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
1867 { int flgs = ((int32_t)(src)) < 0;
1868 int flgo = ((int32_t)(dst)) < 0;
1869 int flgn = ((int32_t)(newv)) < 0;
1870 SET_ZFLG (((int32_t)(newv)) == 0);
1871 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1872 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
1873 COPY_CARRY;
1874 SET_NFLG (flgn != 0);
1875 m68k_write_memory_32(dsta,newv);
1876 }}}}}}}m68k_incpc(6);
1877 return 28;
1878 }
CPUFUNC(op_4a0_4)1879 unsigned long CPUFUNC(op_4a0_4)(uint32_t opcode) /* SUB */
1880 {
1881 uint32_t dstreg = opcode & 7;
1882 OpcodeFamily = 7; CurrentInstrCycles = 30;
1883 {{ int32_t src = get_ilong(2);
1884 { uint32_t dsta = m68k_areg(regs, dstreg) - 4;
1885 { int32_t dst = m68k_read_memory_32(dsta);
1886 m68k_areg (regs, dstreg) = dsta;
1887 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
1888 { int flgs = ((int32_t)(src)) < 0;
1889 int flgo = ((int32_t)(dst)) < 0;
1890 int flgn = ((int32_t)(newv)) < 0;
1891 SET_ZFLG (((int32_t)(newv)) == 0);
1892 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1893 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
1894 COPY_CARRY;
1895 SET_NFLG (flgn != 0);
1896 m68k_write_memory_32(dsta,newv);
1897 }}}}}}}m68k_incpc(6);
1898 return 30;
1899 }
CPUFUNC(op_4a8_4)1900 unsigned long CPUFUNC(op_4a8_4)(uint32_t opcode) /* SUB */
1901 {
1902 uint32_t dstreg = opcode & 7;
1903 OpcodeFamily = 7; CurrentInstrCycles = 32;
1904 {{ int32_t src = get_ilong(2);
1905 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
1906 { int32_t dst = m68k_read_memory_32(dsta);
1907 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
1908 { int flgs = ((int32_t)(src)) < 0;
1909 int flgo = ((int32_t)(dst)) < 0;
1910 int flgn = ((int32_t)(newv)) < 0;
1911 SET_ZFLG (((int32_t)(newv)) == 0);
1912 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1913 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
1914 COPY_CARRY;
1915 SET_NFLG (flgn != 0);
1916 m68k_write_memory_32(dsta,newv);
1917 }}}}}}}m68k_incpc(8);
1918 return 32;
1919 }
CPUFUNC(op_4b0_4)1920 unsigned long CPUFUNC(op_4b0_4)(uint32_t opcode) /* SUB */
1921 {
1922 uint32_t dstreg = opcode & 7;
1923 OpcodeFamily = 7; CurrentInstrCycles = 34;
1924 {{ int32_t src = get_ilong(2);
1925 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
1926 BusCyclePenalty += 2;
1927 { int32_t dst = m68k_read_memory_32(dsta);
1928 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
1929 { int flgs = ((int32_t)(src)) < 0;
1930 int flgo = ((int32_t)(dst)) < 0;
1931 int flgn = ((int32_t)(newv)) < 0;
1932 SET_ZFLG (((int32_t)(newv)) == 0);
1933 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1934 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
1935 COPY_CARRY;
1936 SET_NFLG (flgn != 0);
1937 m68k_write_memory_32(dsta,newv);
1938 }}}}}}}m68k_incpc(8);
1939 return 34;
1940 }
CPUFUNC(op_4b8_4)1941 unsigned long CPUFUNC(op_4b8_4)(uint32_t opcode) /* SUB */
1942 {
1943 OpcodeFamily = 7; CurrentInstrCycles = 32;
1944 {{ int32_t src = get_ilong(2);
1945 { uint32_t dsta = (int32_t)(int16_t)get_iword(6);
1946 { int32_t dst = m68k_read_memory_32(dsta);
1947 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
1948 { int flgs = ((int32_t)(src)) < 0;
1949 int flgo = ((int32_t)(dst)) < 0;
1950 int flgn = ((int32_t)(newv)) < 0;
1951 SET_ZFLG (((int32_t)(newv)) == 0);
1952 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1953 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
1954 COPY_CARRY;
1955 SET_NFLG (flgn != 0);
1956 m68k_write_memory_32(dsta,newv);
1957 }}}}}}}m68k_incpc(8);
1958 return 32;
1959 }
CPUFUNC(op_4b9_4)1960 unsigned long CPUFUNC(op_4b9_4)(uint32_t opcode) /* SUB */
1961 {
1962 OpcodeFamily = 7; CurrentInstrCycles = 36;
1963 {{ int32_t src = get_ilong(2);
1964 { uint32_t dsta = get_ilong(6);
1965 { int32_t dst = m68k_read_memory_32(dsta);
1966 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
1967 { int flgs = ((int32_t)(src)) < 0;
1968 int flgo = ((int32_t)(dst)) < 0;
1969 int flgn = ((int32_t)(newv)) < 0;
1970 SET_ZFLG (((int32_t)(newv)) == 0);
1971 SET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));
1972 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
1973 COPY_CARRY;
1974 SET_NFLG (flgn != 0);
1975 m68k_write_memory_32(dsta,newv);
1976 }}}}}}}m68k_incpc(10);
1977 return 36;
1978 }
CPUFUNC(op_600_4)1979 unsigned long CPUFUNC(op_600_4)(uint32_t opcode) /* ADD */
1980 {
1981 uint32_t dstreg = opcode & 7;
1982 OpcodeFamily = 11; CurrentInstrCycles = 8;
1983 {{ int8_t src = get_ibyte(2);
1984 { int8_t dst = m68k_dreg(regs, dstreg);
1985 { refill_prefetch (m68k_getpc(), 2);
1986 {uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
1987 { int flgs = ((int8_t)(src)) < 0;
1988 int flgo = ((int8_t)(dst)) < 0;
1989 int flgn = ((int8_t)(newv)) < 0;
1990 SET_ZFLG (((int8_t)(newv)) == 0);
1991 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
1992 SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
1993 COPY_CARRY;
1994 SET_NFLG (flgn != 0);
1995 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((newv) & 0xff);
1996 }}}}}}m68k_incpc(4);
1997 return 8;
1998 }
CPUFUNC(op_610_4)1999 unsigned long CPUFUNC(op_610_4)(uint32_t opcode) /* ADD */
2000 {
2001 uint32_t dstreg = opcode & 7;
2002 OpcodeFamily = 11; CurrentInstrCycles = 16;
2003 {{ int8_t src = get_ibyte(2);
2004 { uint32_t dsta = m68k_areg(regs, dstreg);
2005 { int8_t dst = m68k_read_memory_8(dsta);
2006 { refill_prefetch (m68k_getpc(), 2);
2007 {uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
2008 { int flgs = ((int8_t)(src)) < 0;
2009 int flgo = ((int8_t)(dst)) < 0;
2010 int flgn = ((int8_t)(newv)) < 0;
2011 SET_ZFLG (((int8_t)(newv)) == 0);
2012 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2013 SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
2014 COPY_CARRY;
2015 SET_NFLG (flgn != 0);
2016 m68k_write_memory_8(dsta,newv);
2017 }}}}}}}m68k_incpc(4);
2018 return 16;
2019 }
CPUFUNC(op_618_4)2020 unsigned long CPUFUNC(op_618_4)(uint32_t opcode) /* ADD */
2021 {
2022 uint32_t dstreg = opcode & 7;
2023 OpcodeFamily = 11; CurrentInstrCycles = 16;
2024 {{ int8_t src = get_ibyte(2);
2025 { uint32_t dsta = m68k_areg(regs, dstreg);
2026 { int8_t dst = m68k_read_memory_8(dsta);
2027 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
2028 { refill_prefetch (m68k_getpc(), 2);
2029 {uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
2030 { int flgs = ((int8_t)(src)) < 0;
2031 int flgo = ((int8_t)(dst)) < 0;
2032 int flgn = ((int8_t)(newv)) < 0;
2033 SET_ZFLG (((int8_t)(newv)) == 0);
2034 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2035 SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
2036 COPY_CARRY;
2037 SET_NFLG (flgn != 0);
2038 m68k_write_memory_8(dsta,newv);
2039 }}}}}}}m68k_incpc(4);
2040 return 16;
2041 }
CPUFUNC(op_620_4)2042 unsigned long CPUFUNC(op_620_4)(uint32_t opcode) /* ADD */
2043 {
2044 uint32_t dstreg = opcode & 7;
2045 OpcodeFamily = 11; CurrentInstrCycles = 18;
2046 {{ int8_t src = get_ibyte(2);
2047 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
2048 { int8_t dst = m68k_read_memory_8(dsta);
2049 m68k_areg (regs, dstreg) = dsta;
2050 { refill_prefetch (m68k_getpc(), 2);
2051 {uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
2052 { int flgs = ((int8_t)(src)) < 0;
2053 int flgo = ((int8_t)(dst)) < 0;
2054 int flgn = ((int8_t)(newv)) < 0;
2055 SET_ZFLG (((int8_t)(newv)) == 0);
2056 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2057 SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
2058 COPY_CARRY;
2059 SET_NFLG (flgn != 0);
2060 m68k_write_memory_8(dsta,newv);
2061 }}}}}}}m68k_incpc(4);
2062 return 18;
2063 }
CPUFUNC(op_628_4)2064 unsigned long CPUFUNC(op_628_4)(uint32_t opcode) /* ADD */
2065 {
2066 uint32_t dstreg = opcode & 7;
2067 OpcodeFamily = 11; CurrentInstrCycles = 20;
2068 {{ int8_t src = get_ibyte(2);
2069 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
2070 { int8_t dst = m68k_read_memory_8(dsta);
2071 { refill_prefetch (m68k_getpc(), 2);
2072 {uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
2073 { int flgs = ((int8_t)(src)) < 0;
2074 int flgo = ((int8_t)(dst)) < 0;
2075 int flgn = ((int8_t)(newv)) < 0;
2076 SET_ZFLG (((int8_t)(newv)) == 0);
2077 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2078 SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
2079 COPY_CARRY;
2080 SET_NFLG (flgn != 0);
2081 m68k_write_memory_8(dsta,newv);
2082 }}}}}}}m68k_incpc(6);
2083 return 20;
2084 }
CPUFUNC(op_630_4)2085 unsigned long CPUFUNC(op_630_4)(uint32_t opcode) /* ADD */
2086 {
2087 uint32_t dstreg = opcode & 7;
2088 OpcodeFamily = 11; CurrentInstrCycles = 22;
2089 {{ int8_t src = get_ibyte(2);
2090 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
2091 BusCyclePenalty += 2;
2092 { int8_t dst = m68k_read_memory_8(dsta);
2093 { refill_prefetch (m68k_getpc(), 2);
2094 {uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
2095 { int flgs = ((int8_t)(src)) < 0;
2096 int flgo = ((int8_t)(dst)) < 0;
2097 int flgn = ((int8_t)(newv)) < 0;
2098 SET_ZFLG (((int8_t)(newv)) == 0);
2099 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2100 SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
2101 COPY_CARRY;
2102 SET_NFLG (flgn != 0);
2103 m68k_write_memory_8(dsta,newv);
2104 }}}}}}}m68k_incpc(6);
2105 return 22;
2106 }
CPUFUNC(op_638_4)2107 unsigned long CPUFUNC(op_638_4)(uint32_t opcode) /* ADD */
2108 {
2109 OpcodeFamily = 11; CurrentInstrCycles = 20;
2110 {{ int8_t src = get_ibyte(2);
2111 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
2112 { int8_t dst = m68k_read_memory_8(dsta);
2113 { refill_prefetch (m68k_getpc(), 2);
2114 {uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
2115 { int flgs = ((int8_t)(src)) < 0;
2116 int flgo = ((int8_t)(dst)) < 0;
2117 int flgn = ((int8_t)(newv)) < 0;
2118 SET_ZFLG (((int8_t)(newv)) == 0);
2119 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2120 SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
2121 COPY_CARRY;
2122 SET_NFLG (flgn != 0);
2123 m68k_write_memory_8(dsta,newv);
2124 }}}}}}}m68k_incpc(6);
2125 return 20;
2126 }
CPUFUNC(op_639_4)2127 unsigned long CPUFUNC(op_639_4)(uint32_t opcode) /* ADD */
2128 {
2129 OpcodeFamily = 11; CurrentInstrCycles = 24;
2130 {{ int8_t src = get_ibyte(2);
2131 { uint32_t dsta = get_ilong(4);
2132 { int8_t dst = m68k_read_memory_8(dsta);
2133 { refill_prefetch (m68k_getpc(), 2);
2134 {uint32_t newv = ((int8_t)(dst)) + ((int8_t)(src));
2135 { int flgs = ((int8_t)(src)) < 0;
2136 int flgo = ((int8_t)(dst)) < 0;
2137 int flgn = ((int8_t)(newv)) < 0;
2138 SET_ZFLG (((int8_t)(newv)) == 0);
2139 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2140 SET_CFLG (((uint8_t)(~dst)) < ((uint8_t)(src)));
2141 COPY_CARRY;
2142 SET_NFLG (flgn != 0);
2143 m68k_write_memory_8(dsta,newv);
2144 }}}}}}}m68k_incpc(8);
2145 return 24;
2146 }
CPUFUNC(op_640_4)2147 unsigned long CPUFUNC(op_640_4)(uint32_t opcode) /* ADD */
2148 {
2149 uint32_t dstreg = opcode & 7;
2150 OpcodeFamily = 11; CurrentInstrCycles = 8;
2151 {{ int16_t src = get_iword(2);
2152 { int16_t dst = m68k_dreg(regs, dstreg);
2153 { refill_prefetch (m68k_getpc(), 2);
2154 {uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
2155 { int flgs = ((int16_t)(src)) < 0;
2156 int flgo = ((int16_t)(dst)) < 0;
2157 int flgn = ((int16_t)(newv)) < 0;
2158 SET_ZFLG (((int16_t)(newv)) == 0);
2159 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2160 SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
2161 COPY_CARRY;
2162 SET_NFLG (flgn != 0);
2163 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((newv) & 0xffff);
2164 }}}}}}m68k_incpc(4);
2165 return 8;
2166 }
CPUFUNC(op_650_4)2167 unsigned long CPUFUNC(op_650_4)(uint32_t opcode) /* ADD */
2168 {
2169 uint32_t dstreg = opcode & 7;
2170 OpcodeFamily = 11; CurrentInstrCycles = 16;
2171 {{ int16_t src = get_iword(2);
2172 { uint32_t dsta = m68k_areg(regs, dstreg);
2173 { int16_t dst = m68k_read_memory_16(dsta);
2174 { refill_prefetch (m68k_getpc(), 2);
2175 {uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
2176 { int flgs = ((int16_t)(src)) < 0;
2177 int flgo = ((int16_t)(dst)) < 0;
2178 int flgn = ((int16_t)(newv)) < 0;
2179 SET_ZFLG (((int16_t)(newv)) == 0);
2180 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2181 SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
2182 COPY_CARRY;
2183 SET_NFLG (flgn != 0);
2184 m68k_write_memory_16(dsta,newv);
2185 }}}}}}}m68k_incpc(4);
2186 return 16;
2187 }
CPUFUNC(op_658_4)2188 unsigned long CPUFUNC(op_658_4)(uint32_t opcode) /* ADD */
2189 {
2190 uint32_t dstreg = opcode & 7;
2191 OpcodeFamily = 11; CurrentInstrCycles = 16;
2192 {{ int16_t src = get_iword(2);
2193 { uint32_t dsta = m68k_areg(regs, dstreg);
2194 { int16_t dst = m68k_read_memory_16(dsta);
2195 m68k_areg(regs, dstreg) += 2;
2196 { refill_prefetch (m68k_getpc(), 2);
2197 {uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
2198 { int flgs = ((int16_t)(src)) < 0;
2199 int flgo = ((int16_t)(dst)) < 0;
2200 int flgn = ((int16_t)(newv)) < 0;
2201 SET_ZFLG (((int16_t)(newv)) == 0);
2202 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2203 SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
2204 COPY_CARRY;
2205 SET_NFLG (flgn != 0);
2206 m68k_write_memory_16(dsta,newv);
2207 }}}}}}}m68k_incpc(4);
2208 return 16;
2209 }
CPUFUNC(op_660_4)2210 unsigned long CPUFUNC(op_660_4)(uint32_t opcode) /* ADD */
2211 {
2212 uint32_t dstreg = opcode & 7;
2213 OpcodeFamily = 11; CurrentInstrCycles = 18;
2214 {{ int16_t src = get_iword(2);
2215 { uint32_t dsta = m68k_areg(regs, dstreg) - 2;
2216 { int16_t dst = m68k_read_memory_16(dsta);
2217 m68k_areg (regs, dstreg) = dsta;
2218 { refill_prefetch (m68k_getpc(), 2);
2219 {uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
2220 { int flgs = ((int16_t)(src)) < 0;
2221 int flgo = ((int16_t)(dst)) < 0;
2222 int flgn = ((int16_t)(newv)) < 0;
2223 SET_ZFLG (((int16_t)(newv)) == 0);
2224 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2225 SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
2226 COPY_CARRY;
2227 SET_NFLG (flgn != 0);
2228 m68k_write_memory_16(dsta,newv);
2229 }}}}}}}m68k_incpc(4);
2230 return 18;
2231 }
CPUFUNC(op_668_4)2232 unsigned long CPUFUNC(op_668_4)(uint32_t opcode) /* ADD */
2233 {
2234 uint32_t dstreg = opcode & 7;
2235 OpcodeFamily = 11; CurrentInstrCycles = 20;
2236 {{ int16_t src = get_iword(2);
2237 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
2238 { int16_t dst = m68k_read_memory_16(dsta);
2239 { refill_prefetch (m68k_getpc(), 2);
2240 {uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
2241 { int flgs = ((int16_t)(src)) < 0;
2242 int flgo = ((int16_t)(dst)) < 0;
2243 int flgn = ((int16_t)(newv)) < 0;
2244 SET_ZFLG (((int16_t)(newv)) == 0);
2245 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2246 SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
2247 COPY_CARRY;
2248 SET_NFLG (flgn != 0);
2249 m68k_write_memory_16(dsta,newv);
2250 }}}}}}}m68k_incpc(6);
2251 return 20;
2252 }
CPUFUNC(op_670_4)2253 unsigned long CPUFUNC(op_670_4)(uint32_t opcode) /* ADD */
2254 {
2255 uint32_t dstreg = opcode & 7;
2256 OpcodeFamily = 11; CurrentInstrCycles = 22;
2257 {{ int16_t src = get_iword(2);
2258 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
2259 BusCyclePenalty += 2;
2260 { int16_t dst = m68k_read_memory_16(dsta);
2261 { refill_prefetch (m68k_getpc(), 2);
2262 {uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
2263 { int flgs = ((int16_t)(src)) < 0;
2264 int flgo = ((int16_t)(dst)) < 0;
2265 int flgn = ((int16_t)(newv)) < 0;
2266 SET_ZFLG (((int16_t)(newv)) == 0);
2267 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2268 SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
2269 COPY_CARRY;
2270 SET_NFLG (flgn != 0);
2271 m68k_write_memory_16(dsta,newv);
2272 }}}}}}}m68k_incpc(6);
2273 return 22;
2274 }
CPUFUNC(op_678_4)2275 unsigned long CPUFUNC(op_678_4)(uint32_t opcode) /* ADD */
2276 {
2277 OpcodeFamily = 11; CurrentInstrCycles = 20;
2278 {{ int16_t src = get_iword(2);
2279 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
2280 { int16_t dst = m68k_read_memory_16(dsta);
2281 { refill_prefetch (m68k_getpc(), 2);
2282 {uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
2283 { int flgs = ((int16_t)(src)) < 0;
2284 int flgo = ((int16_t)(dst)) < 0;
2285 int flgn = ((int16_t)(newv)) < 0;
2286 SET_ZFLG (((int16_t)(newv)) == 0);
2287 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2288 SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
2289 COPY_CARRY;
2290 SET_NFLG (flgn != 0);
2291 m68k_write_memory_16(dsta,newv);
2292 }}}}}}}m68k_incpc(6);
2293 return 20;
2294 }
CPUFUNC(op_679_4)2295 unsigned long CPUFUNC(op_679_4)(uint32_t opcode) /* ADD */
2296 {
2297 OpcodeFamily = 11; CurrentInstrCycles = 24;
2298 {{ int16_t src = get_iword(2);
2299 { uint32_t dsta = get_ilong(4);
2300 { int16_t dst = m68k_read_memory_16(dsta);
2301 { refill_prefetch (m68k_getpc(), 2);
2302 {uint32_t newv = ((int16_t)(dst)) + ((int16_t)(src));
2303 { int flgs = ((int16_t)(src)) < 0;
2304 int flgo = ((int16_t)(dst)) < 0;
2305 int flgn = ((int16_t)(newv)) < 0;
2306 SET_ZFLG (((int16_t)(newv)) == 0);
2307 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2308 SET_CFLG (((uint16_t)(~dst)) < ((uint16_t)(src)));
2309 COPY_CARRY;
2310 SET_NFLG (flgn != 0);
2311 m68k_write_memory_16(dsta,newv);
2312 }}}}}}}m68k_incpc(8);
2313 return 24;
2314 }
CPUFUNC(op_680_4)2315 unsigned long CPUFUNC(op_680_4)(uint32_t opcode) /* ADD */
2316 {
2317 uint32_t dstreg = opcode & 7;
2318 OpcodeFamily = 11; CurrentInstrCycles = 16;
2319 {{ int32_t src = get_ilong(2);
2320 { int32_t dst = m68k_dreg(regs, dstreg);
2321 { refill_prefetch (m68k_getpc(), 2);
2322 {uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
2323 { int flgs = ((int32_t)(src)) < 0;
2324 int flgo = ((int32_t)(dst)) < 0;
2325 int flgn = ((int32_t)(newv)) < 0;
2326 SET_ZFLG (((int32_t)(newv)) == 0);
2327 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2328 SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
2329 COPY_CARRY;
2330 SET_NFLG (flgn != 0);
2331 m68k_dreg(regs, dstreg) = (newv);
2332 }}}}}}m68k_incpc(6);
2333 return 16;
2334 }
CPUFUNC(op_690_4)2335 unsigned long CPUFUNC(op_690_4)(uint32_t opcode) /* ADD */
2336 {
2337 uint32_t dstreg = opcode & 7;
2338 OpcodeFamily = 11; CurrentInstrCycles = 28;
2339 {{ int32_t src = get_ilong(2);
2340 { uint32_t dsta = m68k_areg(regs, dstreg);
2341 { int32_t dst = m68k_read_memory_32(dsta);
2342 { refill_prefetch (m68k_getpc(), 2);
2343 {uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
2344 { int flgs = ((int32_t)(src)) < 0;
2345 int flgo = ((int32_t)(dst)) < 0;
2346 int flgn = ((int32_t)(newv)) < 0;
2347 SET_ZFLG (((int32_t)(newv)) == 0);
2348 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2349 SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
2350 COPY_CARRY;
2351 SET_NFLG (flgn != 0);
2352 m68k_write_memory_32(dsta,newv);
2353 }}}}}}}m68k_incpc(6);
2354 return 28;
2355 }
CPUFUNC(op_698_4)2356 unsigned long CPUFUNC(op_698_4)(uint32_t opcode) /* ADD */
2357 {
2358 uint32_t dstreg = opcode & 7;
2359 OpcodeFamily = 11; CurrentInstrCycles = 28;
2360 {{ int32_t src = get_ilong(2);
2361 { uint32_t dsta = m68k_areg(regs, dstreg);
2362 { int32_t dst = m68k_read_memory_32(dsta);
2363 m68k_areg(regs, dstreg) += 4;
2364 { refill_prefetch (m68k_getpc(), 2);
2365 {uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
2366 { int flgs = ((int32_t)(src)) < 0;
2367 int flgo = ((int32_t)(dst)) < 0;
2368 int flgn = ((int32_t)(newv)) < 0;
2369 SET_ZFLG (((int32_t)(newv)) == 0);
2370 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2371 SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
2372 COPY_CARRY;
2373 SET_NFLG (flgn != 0);
2374 m68k_write_memory_32(dsta,newv);
2375 }}}}}}}m68k_incpc(6);
2376 return 28;
2377 }
CPUFUNC(op_6a0_4)2378 unsigned long CPUFUNC(op_6a0_4)(uint32_t opcode) /* ADD */
2379 {
2380 uint32_t dstreg = opcode & 7;
2381 OpcodeFamily = 11; CurrentInstrCycles = 30;
2382 {{ int32_t src = get_ilong(2);
2383 { uint32_t dsta = m68k_areg(regs, dstreg) - 4;
2384 { int32_t dst = m68k_read_memory_32(dsta);
2385 m68k_areg (regs, dstreg) = dsta;
2386 { refill_prefetch (m68k_getpc(), 2);
2387 {uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
2388 { int flgs = ((int32_t)(src)) < 0;
2389 int flgo = ((int32_t)(dst)) < 0;
2390 int flgn = ((int32_t)(newv)) < 0;
2391 SET_ZFLG (((int32_t)(newv)) == 0);
2392 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2393 SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
2394 COPY_CARRY;
2395 SET_NFLG (flgn != 0);
2396 m68k_write_memory_32(dsta,newv);
2397 }}}}}}}m68k_incpc(6);
2398 return 30;
2399 }
CPUFUNC(op_6a8_4)2400 unsigned long CPUFUNC(op_6a8_4)(uint32_t opcode) /* ADD */
2401 {
2402 uint32_t dstreg = opcode & 7;
2403 OpcodeFamily = 11; CurrentInstrCycles = 32;
2404 {{ int32_t src = get_ilong(2);
2405 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
2406 { int32_t dst = m68k_read_memory_32(dsta);
2407 { refill_prefetch (m68k_getpc(), 2);
2408 {uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
2409 { int flgs = ((int32_t)(src)) < 0;
2410 int flgo = ((int32_t)(dst)) < 0;
2411 int flgn = ((int32_t)(newv)) < 0;
2412 SET_ZFLG (((int32_t)(newv)) == 0);
2413 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2414 SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
2415 COPY_CARRY;
2416 SET_NFLG (flgn != 0);
2417 m68k_write_memory_32(dsta,newv);
2418 }}}}}}}m68k_incpc(8);
2419 return 32;
2420 }
CPUFUNC(op_6b0_4)2421 unsigned long CPUFUNC(op_6b0_4)(uint32_t opcode) /* ADD */
2422 {
2423 uint32_t dstreg = opcode & 7;
2424 OpcodeFamily = 11; CurrentInstrCycles = 34;
2425 {{ int32_t src = get_ilong(2);
2426 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
2427 BusCyclePenalty += 2;
2428 { int32_t dst = m68k_read_memory_32(dsta);
2429 { refill_prefetch (m68k_getpc(), 2);
2430 {uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
2431 { int flgs = ((int32_t)(src)) < 0;
2432 int flgo = ((int32_t)(dst)) < 0;
2433 int flgn = ((int32_t)(newv)) < 0;
2434 SET_ZFLG (((int32_t)(newv)) == 0);
2435 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2436 SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
2437 COPY_CARRY;
2438 SET_NFLG (flgn != 0);
2439 m68k_write_memory_32(dsta,newv);
2440 }}}}}}}m68k_incpc(8);
2441 return 34;
2442 }
CPUFUNC(op_6b8_4)2443 unsigned long CPUFUNC(op_6b8_4)(uint32_t opcode) /* ADD */
2444 {
2445 OpcodeFamily = 11; CurrentInstrCycles = 32;
2446 {{ int32_t src = get_ilong(2);
2447 { uint32_t dsta = (int32_t)(int16_t)get_iword(6);
2448 { int32_t dst = m68k_read_memory_32(dsta);
2449 { refill_prefetch (m68k_getpc(), 2);
2450 {uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
2451 { int flgs = ((int32_t)(src)) < 0;
2452 int flgo = ((int32_t)(dst)) < 0;
2453 int flgn = ((int32_t)(newv)) < 0;
2454 SET_ZFLG (((int32_t)(newv)) == 0);
2455 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2456 SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
2457 COPY_CARRY;
2458 SET_NFLG (flgn != 0);
2459 m68k_write_memory_32(dsta,newv);
2460 }}}}}}}m68k_incpc(8);
2461 return 32;
2462 }
CPUFUNC(op_6b9_4)2463 unsigned long CPUFUNC(op_6b9_4)(uint32_t opcode) /* ADD */
2464 {
2465 OpcodeFamily = 11; CurrentInstrCycles = 36;
2466 {{ int32_t src = get_ilong(2);
2467 { uint32_t dsta = get_ilong(6);
2468 { int32_t dst = m68k_read_memory_32(dsta);
2469 { refill_prefetch (m68k_getpc(), 2);
2470 {uint32_t newv = ((int32_t)(dst)) + ((int32_t)(src));
2471 { int flgs = ((int32_t)(src)) < 0;
2472 int flgo = ((int32_t)(dst)) < 0;
2473 int flgn = ((int32_t)(newv)) < 0;
2474 SET_ZFLG (((int32_t)(newv)) == 0);
2475 SET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));
2476 SET_CFLG (((uint32_t)(~dst)) < ((uint32_t)(src)));
2477 COPY_CARRY;
2478 SET_NFLG (flgn != 0);
2479 m68k_write_memory_32(dsta,newv);
2480 }}}}}}}m68k_incpc(10);
2481 return 36;
2482 }
CPUFUNC(op_800_4)2483 unsigned long CPUFUNC(op_800_4)(uint32_t opcode) /* BTST */
2484 {
2485 uint32_t dstreg = opcode & 7;
2486 OpcodeFamily = 21; CurrentInstrCycles = 10;
2487 {{ int16_t src = get_iword(2);
2488 { int32_t dst = m68k_dreg(regs, dstreg);
2489 src &= 31;
2490 SET_ZFLG (1 ^ ((dst >> src) & 1));
2491 }}}m68k_incpc(4);
2492 return 10;
2493 }
CPUFUNC(op_810_4)2494 unsigned long CPUFUNC(op_810_4)(uint32_t opcode) /* BTST */
2495 {
2496 uint32_t dstreg = opcode & 7;
2497 OpcodeFamily = 21; CurrentInstrCycles = 12;
2498 {{ int16_t src = get_iword(2);
2499 { uint32_t dsta = m68k_areg(regs, dstreg);
2500 { int8_t dst = m68k_read_memory_8(dsta);
2501 src &= 7;
2502 SET_ZFLG (1 ^ ((dst >> src) & 1));
2503 }}}}m68k_incpc(4);
2504 return 12;
2505 }
CPUFUNC(op_818_4)2506 unsigned long CPUFUNC(op_818_4)(uint32_t opcode) /* BTST */
2507 {
2508 uint32_t dstreg = opcode & 7;
2509 OpcodeFamily = 21; CurrentInstrCycles = 12;
2510 {{ int16_t src = get_iword(2);
2511 { uint32_t dsta = m68k_areg(regs, dstreg);
2512 { int8_t dst = m68k_read_memory_8(dsta);
2513 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
2514 src &= 7;
2515 SET_ZFLG (1 ^ ((dst >> src) & 1));
2516 }}}}m68k_incpc(4);
2517 return 12;
2518 }
CPUFUNC(op_820_4)2519 unsigned long CPUFUNC(op_820_4)(uint32_t opcode) /* BTST */
2520 {
2521 uint32_t dstreg = opcode & 7;
2522 OpcodeFamily = 21; CurrentInstrCycles = 14;
2523 {{ int16_t src = get_iword(2);
2524 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
2525 { int8_t dst = m68k_read_memory_8(dsta);
2526 m68k_areg (regs, dstreg) = dsta;
2527 src &= 7;
2528 SET_ZFLG (1 ^ ((dst >> src) & 1));
2529 }}}}m68k_incpc(4);
2530 return 14;
2531 }
CPUFUNC(op_828_4)2532 unsigned long CPUFUNC(op_828_4)(uint32_t opcode) /* BTST */
2533 {
2534 uint32_t dstreg = opcode & 7;
2535 OpcodeFamily = 21; CurrentInstrCycles = 16;
2536 {{ int16_t src = get_iword(2);
2537 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
2538 { int8_t dst = m68k_read_memory_8(dsta);
2539 src &= 7;
2540 SET_ZFLG (1 ^ ((dst >> src) & 1));
2541 }}}}m68k_incpc(6);
2542 return 16;
2543 }
CPUFUNC(op_830_4)2544 unsigned long CPUFUNC(op_830_4)(uint32_t opcode) /* BTST */
2545 {
2546 uint32_t dstreg = opcode & 7;
2547 OpcodeFamily = 21; CurrentInstrCycles = 18;
2548 {{ int16_t src = get_iword(2);
2549 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
2550 BusCyclePenalty += 2;
2551 { int8_t dst = m68k_read_memory_8(dsta);
2552 src &= 7;
2553 SET_ZFLG (1 ^ ((dst >> src) & 1));
2554 }}}}m68k_incpc(6);
2555 return 18;
2556 }
CPUFUNC(op_838_4)2557 unsigned long CPUFUNC(op_838_4)(uint32_t opcode) /* BTST */
2558 {
2559 OpcodeFamily = 21; CurrentInstrCycles = 16;
2560 {{ int16_t src = get_iword(2);
2561 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
2562 { int8_t dst = m68k_read_memory_8(dsta);
2563 src &= 7;
2564 SET_ZFLG (1 ^ ((dst >> src) & 1));
2565 }}}}m68k_incpc(6);
2566 return 16;
2567 }
CPUFUNC(op_839_4)2568 unsigned long CPUFUNC(op_839_4)(uint32_t opcode) /* BTST */
2569 {
2570 OpcodeFamily = 21; CurrentInstrCycles = 20;
2571 {{ int16_t src = get_iword(2);
2572 { uint32_t dsta = get_ilong(4);
2573 { int8_t dst = m68k_read_memory_8(dsta);
2574 src &= 7;
2575 SET_ZFLG (1 ^ ((dst >> src) & 1));
2576 }}}}m68k_incpc(8);
2577 return 20;
2578 }
CPUFUNC(op_83a_4)2579 unsigned long CPUFUNC(op_83a_4)(uint32_t opcode) /* BTST */
2580 {
2581 uint32_t dstreg = 2;
2582 OpcodeFamily = 21; CurrentInstrCycles = 16;
2583 {{ int16_t src = get_iword(2);
2584 { uint32_t dsta = m68k_getpc () + 4;
2585 dsta += (int32_t)(int16_t)get_iword(4);
2586 { int8_t dst = m68k_read_memory_8(dsta);
2587 src &= 7;
2588 SET_ZFLG (1 ^ ((dst >> src) & 1));
2589 }}}}m68k_incpc(6);
2590 return 16;
2591 }
CPUFUNC(op_83b_4)2592 unsigned long CPUFUNC(op_83b_4)(uint32_t opcode) /* BTST */
2593 {
2594 uint32_t dstreg = 3;
2595 OpcodeFamily = 21; CurrentInstrCycles = 18;
2596 {{ int16_t src = get_iword(2);
2597 { uint32_t tmppc = m68k_getpc() + 4;
2598 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
2599 BusCyclePenalty += 2;
2600 { int8_t dst = m68k_read_memory_8(dsta);
2601 src &= 7;
2602 SET_ZFLG (1 ^ ((dst >> src) & 1));
2603 }}}}m68k_incpc(6);
2604 return 18;
2605 }
CPUFUNC(op_83c_4)2606 unsigned long CPUFUNC(op_83c_4)(uint32_t opcode) /* BTST */
2607 {
2608 OpcodeFamily = 21; CurrentInstrCycles = 12;
2609 {{ int16_t src = get_iword(2);
2610 { int8_t dst = get_ibyte(4);
2611 src &= 7;
2612 SET_ZFLG (1 ^ ((dst >> src) & 1));
2613 }}}m68k_incpc(6);
2614 return 12;
2615 }
CPUFUNC(op_840_4)2616 unsigned long CPUFUNC(op_840_4)(uint32_t opcode) /* BCHG */
2617 {
2618 uint32_t dstreg = opcode & 7;
2619 OpcodeFamily = 22; CurrentInstrCycles = 12;
2620 {{ int16_t src = get_iword(2);
2621 { int32_t dst = m68k_dreg(regs, dstreg);
2622 src &= 31;
2623 dst ^= (1 << src);
2624 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
2625 m68k_dreg(regs, dstreg) = (dst);
2626 }}}m68k_incpc(4);
2627 return 12;
2628 }
CPUFUNC(op_850_4)2629 unsigned long CPUFUNC(op_850_4)(uint32_t opcode) /* BCHG */
2630 {
2631 uint32_t dstreg = opcode & 7;
2632 OpcodeFamily = 22; CurrentInstrCycles = 16;
2633 {{ int16_t src = get_iword(2);
2634 { uint32_t dsta = m68k_areg(regs, dstreg);
2635 { int8_t dst = m68k_read_memory_8(dsta);
2636 src &= 7;
2637 dst ^= (1 << src);
2638 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
2639 m68k_write_memory_8(dsta,dst);
2640 }}}}m68k_incpc(4);
2641 return 16;
2642 }
CPUFUNC(op_858_4)2643 unsigned long CPUFUNC(op_858_4)(uint32_t opcode) /* BCHG */
2644 {
2645 uint32_t dstreg = opcode & 7;
2646 OpcodeFamily = 22; CurrentInstrCycles = 16;
2647 {{ int16_t src = get_iword(2);
2648 { uint32_t dsta = m68k_areg(regs, dstreg);
2649 { int8_t dst = m68k_read_memory_8(dsta);
2650 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
2651 src &= 7;
2652 dst ^= (1 << src);
2653 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
2654 m68k_write_memory_8(dsta,dst);
2655 }}}}m68k_incpc(4);
2656 return 16;
2657 }
CPUFUNC(op_860_4)2658 unsigned long CPUFUNC(op_860_4)(uint32_t opcode) /* BCHG */
2659 {
2660 uint32_t dstreg = opcode & 7;
2661 OpcodeFamily = 22; CurrentInstrCycles = 18;
2662 {{ int16_t src = get_iword(2);
2663 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
2664 { int8_t dst = m68k_read_memory_8(dsta);
2665 m68k_areg (regs, dstreg) = dsta;
2666 src &= 7;
2667 dst ^= (1 << src);
2668 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
2669 m68k_write_memory_8(dsta,dst);
2670 }}}}m68k_incpc(4);
2671 return 18;
2672 }
CPUFUNC(op_868_4)2673 unsigned long CPUFUNC(op_868_4)(uint32_t opcode) /* BCHG */
2674 {
2675 uint32_t dstreg = opcode & 7;
2676 OpcodeFamily = 22; CurrentInstrCycles = 20;
2677 {{ int16_t src = get_iword(2);
2678 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
2679 { int8_t dst = m68k_read_memory_8(dsta);
2680 src &= 7;
2681 dst ^= (1 << src);
2682 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
2683 m68k_write_memory_8(dsta,dst);
2684 }}}}m68k_incpc(6);
2685 return 20;
2686 }
CPUFUNC(op_870_4)2687 unsigned long CPUFUNC(op_870_4)(uint32_t opcode) /* BCHG */
2688 {
2689 uint32_t dstreg = opcode & 7;
2690 OpcodeFamily = 22; CurrentInstrCycles = 22;
2691 {{ int16_t src = get_iword(2);
2692 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
2693 BusCyclePenalty += 2;
2694 { int8_t dst = m68k_read_memory_8(dsta);
2695 src &= 7;
2696 dst ^= (1 << src);
2697 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
2698 m68k_write_memory_8(dsta,dst);
2699 }}}}m68k_incpc(6);
2700 return 22;
2701 }
CPUFUNC(op_878_4)2702 unsigned long CPUFUNC(op_878_4)(uint32_t opcode) /* BCHG */
2703 {
2704 OpcodeFamily = 22; CurrentInstrCycles = 20;
2705 {{ int16_t src = get_iword(2);
2706 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
2707 { int8_t dst = m68k_read_memory_8(dsta);
2708 src &= 7;
2709 dst ^= (1 << src);
2710 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
2711 m68k_write_memory_8(dsta,dst);
2712 }}}}m68k_incpc(6);
2713 return 20;
2714 }
CPUFUNC(op_879_4)2715 unsigned long CPUFUNC(op_879_4)(uint32_t opcode) /* BCHG */
2716 {
2717 OpcodeFamily = 22; CurrentInstrCycles = 24;
2718 {{ int16_t src = get_iword(2);
2719 { uint32_t dsta = get_ilong(4);
2720 { int8_t dst = m68k_read_memory_8(dsta);
2721 src &= 7;
2722 dst ^= (1 << src);
2723 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
2724 m68k_write_memory_8(dsta,dst);
2725 }}}}m68k_incpc(8);
2726 return 24;
2727 }
CPUFUNC(op_87a_4)2728 unsigned long CPUFUNC(op_87a_4)(uint32_t opcode) /* BCHG */
2729 {
2730 uint32_t dstreg = 2;
2731 OpcodeFamily = 22; CurrentInstrCycles = 20;
2732 {{ int16_t src = get_iword(2);
2733 { uint32_t dsta = m68k_getpc () + 4;
2734 dsta += (int32_t)(int16_t)get_iword(4);
2735 { int8_t dst = m68k_read_memory_8(dsta);
2736 src &= 7;
2737 dst ^= (1 << src);
2738 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
2739 m68k_write_memory_8(dsta,dst);
2740 }}}}m68k_incpc(6);
2741 return 20;
2742 }
CPUFUNC(op_87b_4)2743 unsigned long CPUFUNC(op_87b_4)(uint32_t opcode) /* BCHG */
2744 {
2745 uint32_t dstreg = 3;
2746 OpcodeFamily = 22; CurrentInstrCycles = 22;
2747 {{ int16_t src = get_iword(2);
2748 { uint32_t tmppc = m68k_getpc() + 4;
2749 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
2750 BusCyclePenalty += 2;
2751 { int8_t dst = m68k_read_memory_8(dsta);
2752 src &= 7;
2753 dst ^= (1 << src);
2754 SET_ZFLG (((uint32_t)dst & (1 << src)) >> src);
2755 m68k_write_memory_8(dsta,dst);
2756 }}}}m68k_incpc(6);
2757 return 22;
2758 }
CPUFUNC(op_880_4)2759 unsigned long CPUFUNC(op_880_4)(uint32_t opcode) /* BCLR */
2760 {
2761 uint32_t dstreg = opcode & 7;
2762 OpcodeFamily = 23; CurrentInstrCycles = 14;
2763 {{ int16_t src = get_iword(2);
2764 { int32_t dst = m68k_dreg(regs, dstreg);
2765 src &= 31;
2766 SET_ZFLG (1 ^ ((dst >> src) & 1));
2767 dst &= ~(1 << src);
2768 m68k_dreg(regs, dstreg) = (dst);
2769 if ( src < 16 ) { m68k_incpc(4); return 12; }
2770 }}}m68k_incpc(4);
2771 return 14;
2772 }
CPUFUNC(op_890_4)2773 unsigned long CPUFUNC(op_890_4)(uint32_t opcode) /* BCLR */
2774 {
2775 uint32_t dstreg = opcode & 7;
2776 OpcodeFamily = 23; CurrentInstrCycles = 16;
2777 {{ int16_t src = get_iword(2);
2778 { uint32_t dsta = m68k_areg(regs, dstreg);
2779 { int8_t dst = m68k_read_memory_8(dsta);
2780 src &= 7;
2781 SET_ZFLG (1 ^ ((dst >> src) & 1));
2782 dst &= ~(1 << src);
2783 m68k_write_memory_8(dsta,dst);
2784 }}}}m68k_incpc(4);
2785 return 16;
2786 }
CPUFUNC(op_898_4)2787 unsigned long CPUFUNC(op_898_4)(uint32_t opcode) /* BCLR */
2788 {
2789 uint32_t dstreg = opcode & 7;
2790 OpcodeFamily = 23; CurrentInstrCycles = 16;
2791 {{ int16_t src = get_iword(2);
2792 { uint32_t dsta = m68k_areg(regs, dstreg);
2793 { int8_t dst = m68k_read_memory_8(dsta);
2794 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
2795 src &= 7;
2796 SET_ZFLG (1 ^ ((dst >> src) & 1));
2797 dst &= ~(1 << src);
2798 m68k_write_memory_8(dsta,dst);
2799 }}}}m68k_incpc(4);
2800 return 16;
2801 }
CPUFUNC(op_8a0_4)2802 unsigned long CPUFUNC(op_8a0_4)(uint32_t opcode) /* BCLR */
2803 {
2804 uint32_t dstreg = opcode & 7;
2805 OpcodeFamily = 23; CurrentInstrCycles = 18;
2806 {{ int16_t src = get_iword(2);
2807 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
2808 { int8_t dst = m68k_read_memory_8(dsta);
2809 m68k_areg (regs, dstreg) = dsta;
2810 src &= 7;
2811 SET_ZFLG (1 ^ ((dst >> src) & 1));
2812 dst &= ~(1 << src);
2813 m68k_write_memory_8(dsta,dst);
2814 }}}}m68k_incpc(4);
2815 return 18;
2816 }
CPUFUNC(op_8a8_4)2817 unsigned long CPUFUNC(op_8a8_4)(uint32_t opcode) /* BCLR */
2818 {
2819 uint32_t dstreg = opcode & 7;
2820 OpcodeFamily = 23; CurrentInstrCycles = 20;
2821 {{ int16_t src = get_iword(2);
2822 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
2823 { int8_t dst = m68k_read_memory_8(dsta);
2824 src &= 7;
2825 SET_ZFLG (1 ^ ((dst >> src) & 1));
2826 dst &= ~(1 << src);
2827 m68k_write_memory_8(dsta,dst);
2828 }}}}m68k_incpc(6);
2829 return 20;
2830 }
CPUFUNC(op_8b0_4)2831 unsigned long CPUFUNC(op_8b0_4)(uint32_t opcode) /* BCLR */
2832 {
2833 uint32_t dstreg = opcode & 7;
2834 OpcodeFamily = 23; CurrentInstrCycles = 22;
2835 {{ int16_t src = get_iword(2);
2836 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
2837 BusCyclePenalty += 2;
2838 { int8_t dst = m68k_read_memory_8(dsta);
2839 src &= 7;
2840 SET_ZFLG (1 ^ ((dst >> src) & 1));
2841 dst &= ~(1 << src);
2842 m68k_write_memory_8(dsta,dst);
2843 }}}}m68k_incpc(6);
2844 return 22;
2845 }
CPUFUNC(op_8b8_4)2846 unsigned long CPUFUNC(op_8b8_4)(uint32_t opcode) /* BCLR */
2847 {
2848 OpcodeFamily = 23; CurrentInstrCycles = 20;
2849 {{ int16_t src = get_iword(2);
2850 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
2851 { int8_t dst = m68k_read_memory_8(dsta);
2852 src &= 7;
2853 SET_ZFLG (1 ^ ((dst >> src) & 1));
2854 dst &= ~(1 << src);
2855 m68k_write_memory_8(dsta,dst);
2856 }}}}m68k_incpc(6);
2857 return 20;
2858 }
CPUFUNC(op_8b9_4)2859 unsigned long CPUFUNC(op_8b9_4)(uint32_t opcode) /* BCLR */
2860 {
2861 OpcodeFamily = 23; CurrentInstrCycles = 24;
2862 {{ int16_t src = get_iword(2);
2863 { uint32_t dsta = get_ilong(4);
2864 { int8_t dst = m68k_read_memory_8(dsta);
2865 src &= 7;
2866 SET_ZFLG (1 ^ ((dst >> src) & 1));
2867 dst &= ~(1 << src);
2868 m68k_write_memory_8(dsta,dst);
2869 }}}}m68k_incpc(8);
2870 return 24;
2871 }
CPUFUNC(op_8ba_4)2872 unsigned long CPUFUNC(op_8ba_4)(uint32_t opcode) /* BCLR */
2873 {
2874 uint32_t dstreg = 2;
2875 OpcodeFamily = 23; CurrentInstrCycles = 20;
2876 {{ int16_t src = get_iword(2);
2877 { uint32_t dsta = m68k_getpc () + 4;
2878 dsta += (int32_t)(int16_t)get_iword(4);
2879 { int8_t dst = m68k_read_memory_8(dsta);
2880 src &= 7;
2881 SET_ZFLG (1 ^ ((dst >> src) & 1));
2882 dst &= ~(1 << src);
2883 m68k_write_memory_8(dsta,dst);
2884 }}}}m68k_incpc(6);
2885 return 20;
2886 }
CPUFUNC(op_8bb_4)2887 unsigned long CPUFUNC(op_8bb_4)(uint32_t opcode) /* BCLR */
2888 {
2889 uint32_t dstreg = 3;
2890 OpcodeFamily = 23; CurrentInstrCycles = 22;
2891 {{ int16_t src = get_iword(2);
2892 { uint32_t tmppc = m68k_getpc() + 4;
2893 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
2894 BusCyclePenalty += 2;
2895 { int8_t dst = m68k_read_memory_8(dsta);
2896 src &= 7;
2897 SET_ZFLG (1 ^ ((dst >> src) & 1));
2898 dst &= ~(1 << src);
2899 m68k_write_memory_8(dsta,dst);
2900 }}}}m68k_incpc(6);
2901 return 22;
2902 }
CPUFUNC(op_8c0_4)2903 unsigned long CPUFUNC(op_8c0_4)(uint32_t opcode) /* BSET */
2904 {
2905 uint32_t dstreg = opcode & 7;
2906 OpcodeFamily = 24; CurrentInstrCycles = 12;
2907 {{ int16_t src = get_iword(2);
2908 { int32_t dst = m68k_dreg(regs, dstreg);
2909 src &= 31;
2910 SET_ZFLG (1 ^ ((dst >> src) & 1));
2911 dst |= (1 << src);
2912 m68k_dreg(regs, dstreg) = (dst);
2913 }}}m68k_incpc(4);
2914 return 12;
2915 }
CPUFUNC(op_8d0_4)2916 unsigned long CPUFUNC(op_8d0_4)(uint32_t opcode) /* BSET */
2917 {
2918 uint32_t dstreg = opcode & 7;
2919 OpcodeFamily = 24; CurrentInstrCycles = 16;
2920 {{ int16_t src = get_iword(2);
2921 { uint32_t dsta = m68k_areg(regs, dstreg);
2922 { int8_t dst = m68k_read_memory_8(dsta);
2923 src &= 7;
2924 SET_ZFLG (1 ^ ((dst >> src) & 1));
2925 dst |= (1 << src);
2926 m68k_write_memory_8(dsta,dst);
2927 }}}}m68k_incpc(4);
2928 return 16;
2929 }
CPUFUNC(op_8d8_4)2930 unsigned long CPUFUNC(op_8d8_4)(uint32_t opcode) /* BSET */
2931 {
2932 uint32_t dstreg = opcode & 7;
2933 OpcodeFamily = 24; CurrentInstrCycles = 16;
2934 {{ int16_t src = get_iword(2);
2935 { uint32_t dsta = m68k_areg(regs, dstreg);
2936 { int8_t dst = m68k_read_memory_8(dsta);
2937 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
2938 src &= 7;
2939 SET_ZFLG (1 ^ ((dst >> src) & 1));
2940 dst |= (1 << src);
2941 m68k_write_memory_8(dsta,dst);
2942 }}}}m68k_incpc(4);
2943 return 16;
2944 }
CPUFUNC(op_8e0_4)2945 unsigned long CPUFUNC(op_8e0_4)(uint32_t opcode) /* BSET */
2946 {
2947 uint32_t dstreg = opcode & 7;
2948 OpcodeFamily = 24; CurrentInstrCycles = 18;
2949 {{ int16_t src = get_iword(2);
2950 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
2951 { int8_t dst = m68k_read_memory_8(dsta);
2952 m68k_areg (regs, dstreg) = dsta;
2953 src &= 7;
2954 SET_ZFLG (1 ^ ((dst >> src) & 1));
2955 dst |= (1 << src);
2956 m68k_write_memory_8(dsta,dst);
2957 }}}}m68k_incpc(4);
2958 return 18;
2959 }
CPUFUNC(op_8e8_4)2960 unsigned long CPUFUNC(op_8e8_4)(uint32_t opcode) /* BSET */
2961 {
2962 uint32_t dstreg = opcode & 7;
2963 OpcodeFamily = 24; CurrentInstrCycles = 20;
2964 {{ int16_t src = get_iword(2);
2965 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
2966 { int8_t dst = m68k_read_memory_8(dsta);
2967 src &= 7;
2968 SET_ZFLG (1 ^ ((dst >> src) & 1));
2969 dst |= (1 << src);
2970 m68k_write_memory_8(dsta,dst);
2971 }}}}m68k_incpc(6);
2972 return 20;
2973 }
CPUFUNC(op_8f0_4)2974 unsigned long CPUFUNC(op_8f0_4)(uint32_t opcode) /* BSET */
2975 {
2976 uint32_t dstreg = opcode & 7;
2977 OpcodeFamily = 24; CurrentInstrCycles = 22;
2978 {{ int16_t src = get_iword(2);
2979 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
2980 BusCyclePenalty += 2;
2981 { int8_t dst = m68k_read_memory_8(dsta);
2982 src &= 7;
2983 SET_ZFLG (1 ^ ((dst >> src) & 1));
2984 dst |= (1 << src);
2985 m68k_write_memory_8(dsta,dst);
2986 }}}}m68k_incpc(6);
2987 return 22;
2988 }
CPUFUNC(op_8f8_4)2989 unsigned long CPUFUNC(op_8f8_4)(uint32_t opcode) /* BSET */
2990 {
2991 OpcodeFamily = 24; CurrentInstrCycles = 20;
2992 {{ int16_t src = get_iword(2);
2993 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
2994 { int8_t dst = m68k_read_memory_8(dsta);
2995 src &= 7;
2996 SET_ZFLG (1 ^ ((dst >> src) & 1));
2997 dst |= (1 << src);
2998 m68k_write_memory_8(dsta,dst);
2999 }}}}m68k_incpc(6);
3000 return 20;
3001 }
CPUFUNC(op_8f9_4)3002 unsigned long CPUFUNC(op_8f9_4)(uint32_t opcode) /* BSET */
3003 {
3004 OpcodeFamily = 24; CurrentInstrCycles = 24;
3005 {{ int16_t src = get_iword(2);
3006 { uint32_t dsta = get_ilong(4);
3007 { int8_t dst = m68k_read_memory_8(dsta);
3008 src &= 7;
3009 SET_ZFLG (1 ^ ((dst >> src) & 1));
3010 dst |= (1 << src);
3011 m68k_write_memory_8(dsta,dst);
3012 }}}}m68k_incpc(8);
3013 return 24;
3014 }
CPUFUNC(op_8fa_4)3015 unsigned long CPUFUNC(op_8fa_4)(uint32_t opcode) /* BSET */
3016 {
3017 uint32_t dstreg = 2;
3018 OpcodeFamily = 24; CurrentInstrCycles = 20;
3019 {{ int16_t src = get_iword(2);
3020 { uint32_t dsta = m68k_getpc () + 4;
3021 dsta += (int32_t)(int16_t)get_iword(4);
3022 { int8_t dst = m68k_read_memory_8(dsta);
3023 src &= 7;
3024 SET_ZFLG (1 ^ ((dst >> src) & 1));
3025 dst |= (1 << src);
3026 m68k_write_memory_8(dsta,dst);
3027 }}}}m68k_incpc(6);
3028 return 20;
3029 }
CPUFUNC(op_8fb_4)3030 unsigned long CPUFUNC(op_8fb_4)(uint32_t opcode) /* BSET */
3031 {
3032 uint32_t dstreg = 3;
3033 OpcodeFamily = 24; CurrentInstrCycles = 22;
3034 {{ int16_t src = get_iword(2);
3035 { uint32_t tmppc = m68k_getpc() + 4;
3036 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
3037 BusCyclePenalty += 2;
3038 { int8_t dst = m68k_read_memory_8(dsta);
3039 src &= 7;
3040 SET_ZFLG (1 ^ ((dst >> src) & 1));
3041 dst |= (1 << src);
3042 m68k_write_memory_8(dsta,dst);
3043 }}}}m68k_incpc(6);
3044 return 22;
3045 }
CPUFUNC(op_a00_4)3046 unsigned long CPUFUNC(op_a00_4)(uint32_t opcode) /* EOR */
3047 {
3048 uint32_t dstreg = opcode & 7;
3049 OpcodeFamily = 3; CurrentInstrCycles = 8;
3050 {{ int8_t src = get_ibyte(2);
3051 { int8_t dst = m68k_dreg(regs, dstreg);
3052 src ^= dst;
3053 CLEAR_CZNV;
3054 SET_ZFLG (((int8_t)(src)) == 0);
3055 SET_NFLG (((int8_t)(src)) < 0);
3056 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
3057 }}}m68k_incpc(4);
3058 return 8;
3059 }
CPUFUNC(op_a10_4)3060 unsigned long CPUFUNC(op_a10_4)(uint32_t opcode) /* EOR */
3061 {
3062 uint32_t dstreg = opcode & 7;
3063 OpcodeFamily = 3; CurrentInstrCycles = 16;
3064 {{ int8_t src = get_ibyte(2);
3065 { uint32_t dsta = m68k_areg(regs, dstreg);
3066 { int8_t dst = m68k_read_memory_8(dsta);
3067 src ^= dst;
3068 CLEAR_CZNV;
3069 SET_ZFLG (((int8_t)(src)) == 0);
3070 SET_NFLG (((int8_t)(src)) < 0);
3071 m68k_write_memory_8(dsta,src);
3072 }}}}m68k_incpc(4);
3073 return 16;
3074 }
CPUFUNC(op_a18_4)3075 unsigned long CPUFUNC(op_a18_4)(uint32_t opcode) /* EOR */
3076 {
3077 uint32_t dstreg = opcode & 7;
3078 OpcodeFamily = 3; CurrentInstrCycles = 16;
3079 {{ int8_t src = get_ibyte(2);
3080 { uint32_t dsta = m68k_areg(regs, dstreg);
3081 { int8_t dst = m68k_read_memory_8(dsta);
3082 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
3083 src ^= dst;
3084 CLEAR_CZNV;
3085 SET_ZFLG (((int8_t)(src)) == 0);
3086 SET_NFLG (((int8_t)(src)) < 0);
3087 m68k_write_memory_8(dsta,src);
3088 }}}}m68k_incpc(4);
3089 return 16;
3090 }
CPUFUNC(op_a20_4)3091 unsigned long CPUFUNC(op_a20_4)(uint32_t opcode) /* EOR */
3092 {
3093 uint32_t dstreg = opcode & 7;
3094 OpcodeFamily = 3; CurrentInstrCycles = 18;
3095 {{ int8_t src = get_ibyte(2);
3096 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
3097 { int8_t dst = m68k_read_memory_8(dsta);
3098 m68k_areg (regs, dstreg) = dsta;
3099 src ^= dst;
3100 CLEAR_CZNV;
3101 SET_ZFLG (((int8_t)(src)) == 0);
3102 SET_NFLG (((int8_t)(src)) < 0);
3103 m68k_write_memory_8(dsta,src);
3104 }}}}m68k_incpc(4);
3105 return 18;
3106 }
CPUFUNC(op_a28_4)3107 unsigned long CPUFUNC(op_a28_4)(uint32_t opcode) /* EOR */
3108 {
3109 uint32_t dstreg = opcode & 7;
3110 OpcodeFamily = 3; CurrentInstrCycles = 20;
3111 {{ int8_t src = get_ibyte(2);
3112 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
3113 { int8_t dst = m68k_read_memory_8(dsta);
3114 src ^= dst;
3115 CLEAR_CZNV;
3116 SET_ZFLG (((int8_t)(src)) == 0);
3117 SET_NFLG (((int8_t)(src)) < 0);
3118 m68k_write_memory_8(dsta,src);
3119 }}}}m68k_incpc(6);
3120 return 20;
3121 }
CPUFUNC(op_a30_4)3122 unsigned long CPUFUNC(op_a30_4)(uint32_t opcode) /* EOR */
3123 {
3124 uint32_t dstreg = opcode & 7;
3125 OpcodeFamily = 3; CurrentInstrCycles = 22;
3126 {{ int8_t src = get_ibyte(2);
3127 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
3128 BusCyclePenalty += 2;
3129 { int8_t dst = m68k_read_memory_8(dsta);
3130 src ^= dst;
3131 CLEAR_CZNV;
3132 SET_ZFLG (((int8_t)(src)) == 0);
3133 SET_NFLG (((int8_t)(src)) < 0);
3134 m68k_write_memory_8(dsta,src);
3135 }}}}m68k_incpc(6);
3136 return 22;
3137 }
CPUFUNC(op_a38_4)3138 unsigned long CPUFUNC(op_a38_4)(uint32_t opcode) /* EOR */
3139 {
3140 OpcodeFamily = 3; CurrentInstrCycles = 20;
3141 {{ int8_t src = get_ibyte(2);
3142 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
3143 { int8_t dst = m68k_read_memory_8(dsta);
3144 src ^= dst;
3145 CLEAR_CZNV;
3146 SET_ZFLG (((int8_t)(src)) == 0);
3147 SET_NFLG (((int8_t)(src)) < 0);
3148 m68k_write_memory_8(dsta,src);
3149 }}}}m68k_incpc(6);
3150 return 20;
3151 }
CPUFUNC(op_a39_4)3152 unsigned long CPUFUNC(op_a39_4)(uint32_t opcode) /* EOR */
3153 {
3154 OpcodeFamily = 3; CurrentInstrCycles = 24;
3155 {{ int8_t src = get_ibyte(2);
3156 { uint32_t dsta = get_ilong(4);
3157 { int8_t dst = m68k_read_memory_8(dsta);
3158 src ^= dst;
3159 CLEAR_CZNV;
3160 SET_ZFLG (((int8_t)(src)) == 0);
3161 SET_NFLG (((int8_t)(src)) < 0);
3162 m68k_write_memory_8(dsta,src);
3163 }}}}m68k_incpc(8);
3164 return 24;
3165 }
CPUFUNC(op_a3c_4)3166 unsigned long CPUFUNC(op_a3c_4)(uint32_t opcode) /* EORSR */
3167 {
3168 OpcodeFamily = 6; CurrentInstrCycles = 20;
3169 { MakeSR();
3170 { int16_t src = get_iword(2);
3171 src &= 0xFF;
3172 regs.sr ^= src;
3173 MakeFromSR();
3174 }}m68k_incpc(4);
3175 return 20;
3176 }
CPUFUNC(op_a40_4)3177 unsigned long CPUFUNC(op_a40_4)(uint32_t opcode) /* EOR */
3178 {
3179 uint32_t dstreg = opcode & 7;
3180 OpcodeFamily = 3; CurrentInstrCycles = 8;
3181 {{ int16_t src = get_iword(2);
3182 { int16_t dst = m68k_dreg(regs, dstreg);
3183 src ^= dst;
3184 CLEAR_CZNV;
3185 SET_ZFLG (((int16_t)(src)) == 0);
3186 SET_NFLG (((int16_t)(src)) < 0);
3187 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xffff) | ((src) & 0xffff);
3188 }}}m68k_incpc(4);
3189 return 8;
3190 }
CPUFUNC(op_a50_4)3191 unsigned long CPUFUNC(op_a50_4)(uint32_t opcode) /* EOR */
3192 {
3193 uint32_t dstreg = opcode & 7;
3194 OpcodeFamily = 3; CurrentInstrCycles = 16;
3195 {{ int16_t src = get_iword(2);
3196 { uint32_t dsta = m68k_areg(regs, dstreg);
3197 { int16_t dst = m68k_read_memory_16(dsta);
3198 src ^= dst;
3199 CLEAR_CZNV;
3200 SET_ZFLG (((int16_t)(src)) == 0);
3201 SET_NFLG (((int16_t)(src)) < 0);
3202 m68k_write_memory_16(dsta,src);
3203 }}}}m68k_incpc(4);
3204 return 16;
3205 }
CPUFUNC(op_a58_4)3206 unsigned long CPUFUNC(op_a58_4)(uint32_t opcode) /* EOR */
3207 {
3208 uint32_t dstreg = opcode & 7;
3209 OpcodeFamily = 3; CurrentInstrCycles = 16;
3210 {{ int16_t src = get_iword(2);
3211 { uint32_t dsta = m68k_areg(regs, dstreg);
3212 { int16_t dst = m68k_read_memory_16(dsta);
3213 m68k_areg(regs, dstreg) += 2;
3214 src ^= dst;
3215 CLEAR_CZNV;
3216 SET_ZFLG (((int16_t)(src)) == 0);
3217 SET_NFLG (((int16_t)(src)) < 0);
3218 m68k_write_memory_16(dsta,src);
3219 }}}}m68k_incpc(4);
3220 return 16;
3221 }
CPUFUNC(op_a60_4)3222 unsigned long CPUFUNC(op_a60_4)(uint32_t opcode) /* EOR */
3223 {
3224 uint32_t dstreg = opcode & 7;
3225 OpcodeFamily = 3; CurrentInstrCycles = 18;
3226 {{ int16_t src = get_iword(2);
3227 { uint32_t dsta = m68k_areg(regs, dstreg) - 2;
3228 { int16_t dst = m68k_read_memory_16(dsta);
3229 m68k_areg (regs, dstreg) = dsta;
3230 src ^= dst;
3231 CLEAR_CZNV;
3232 SET_ZFLG (((int16_t)(src)) == 0);
3233 SET_NFLG (((int16_t)(src)) < 0);
3234 m68k_write_memory_16(dsta,src);
3235 }}}}m68k_incpc(4);
3236 return 18;
3237 }
CPUFUNC(op_a68_4)3238 unsigned long CPUFUNC(op_a68_4)(uint32_t opcode) /* EOR */
3239 {
3240 uint32_t dstreg = opcode & 7;
3241 OpcodeFamily = 3; CurrentInstrCycles = 20;
3242 {{ int16_t src = get_iword(2);
3243 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
3244 { int16_t dst = m68k_read_memory_16(dsta);
3245 src ^= dst;
3246 CLEAR_CZNV;
3247 SET_ZFLG (((int16_t)(src)) == 0);
3248 SET_NFLG (((int16_t)(src)) < 0);
3249 m68k_write_memory_16(dsta,src);
3250 }}}}m68k_incpc(6);
3251 return 20;
3252 }
CPUFUNC(op_a70_4)3253 unsigned long CPUFUNC(op_a70_4)(uint32_t opcode) /* EOR */
3254 {
3255 uint32_t dstreg = opcode & 7;
3256 OpcodeFamily = 3; CurrentInstrCycles = 22;
3257 {{ int16_t src = get_iword(2);
3258 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
3259 BusCyclePenalty += 2;
3260 { int16_t dst = m68k_read_memory_16(dsta);
3261 src ^= dst;
3262 CLEAR_CZNV;
3263 SET_ZFLG (((int16_t)(src)) == 0);
3264 SET_NFLG (((int16_t)(src)) < 0);
3265 m68k_write_memory_16(dsta,src);
3266 }}}}m68k_incpc(6);
3267 return 22;
3268 }
CPUFUNC(op_a78_4)3269 unsigned long CPUFUNC(op_a78_4)(uint32_t opcode) /* EOR */
3270 {
3271 OpcodeFamily = 3; CurrentInstrCycles = 20;
3272 {{ int16_t src = get_iword(2);
3273 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
3274 { int16_t dst = m68k_read_memory_16(dsta);
3275 src ^= dst;
3276 CLEAR_CZNV;
3277 SET_ZFLG (((int16_t)(src)) == 0);
3278 SET_NFLG (((int16_t)(src)) < 0);
3279 m68k_write_memory_16(dsta,src);
3280 }}}}m68k_incpc(6);
3281 return 20;
3282 }
CPUFUNC(op_a79_4)3283 unsigned long CPUFUNC(op_a79_4)(uint32_t opcode) /* EOR */
3284 {
3285 OpcodeFamily = 3; CurrentInstrCycles = 24;
3286 {{ int16_t src = get_iword(2);
3287 { uint32_t dsta = get_ilong(4);
3288 { int16_t dst = m68k_read_memory_16(dsta);
3289 src ^= dst;
3290 CLEAR_CZNV;
3291 SET_ZFLG (((int16_t)(src)) == 0);
3292 SET_NFLG (((int16_t)(src)) < 0);
3293 m68k_write_memory_16(dsta,src);
3294 }}}}m68k_incpc(8);
3295 return 24;
3296 }
CPUFUNC(op_a7c_4)3297 unsigned long CPUFUNC(op_a7c_4)(uint32_t opcode) /* EORSR */
3298 {
3299 OpcodeFamily = 6; CurrentInstrCycles = 20;
3300 {if (!regs.s) { Exception(8,0,M68000_EXC_SRC_CPU); goto endlabel204; }
3301 { MakeSR();
3302 { int16_t src = get_iword(2);
3303 regs.sr ^= src;
3304 MakeFromSR();
3305 }}}m68k_incpc(4);
3306 endlabel204: ;
3307 return 20;
3308 }
3309 #endif
3310
3311 #ifdef PART_2
CPUFUNC(op_a80_4)3312 unsigned long CPUFUNC(op_a80_4)(uint32_t opcode) /* EOR */
3313 {
3314 uint32_t dstreg = opcode & 7;
3315 OpcodeFamily = 3; CurrentInstrCycles = 16;
3316 {{ int32_t src = get_ilong(2);
3317 { int32_t dst = m68k_dreg(regs, dstreg);
3318 src ^= dst;
3319 CLEAR_CZNV;
3320 SET_ZFLG (((int32_t)(src)) == 0);
3321 SET_NFLG (((int32_t)(src)) < 0);
3322 m68k_dreg(regs, dstreg) = (src);
3323 }}}m68k_incpc(6);
3324 return 16;
3325 }
CPUFUNC(op_a90_4)3326 unsigned long CPUFUNC(op_a90_4)(uint32_t opcode) /* EOR */
3327 {
3328 uint32_t dstreg = opcode & 7;
3329 OpcodeFamily = 3; CurrentInstrCycles = 28;
3330 {{ int32_t src = get_ilong(2);
3331 { uint32_t dsta = m68k_areg(regs, dstreg);
3332 { int32_t dst = m68k_read_memory_32(dsta);
3333 src ^= dst;
3334 CLEAR_CZNV;
3335 SET_ZFLG (((int32_t)(src)) == 0);
3336 SET_NFLG (((int32_t)(src)) < 0);
3337 m68k_write_memory_32(dsta,src);
3338 }}}}m68k_incpc(6);
3339 return 28;
3340 }
CPUFUNC(op_a98_4)3341 unsigned long CPUFUNC(op_a98_4)(uint32_t opcode) /* EOR */
3342 {
3343 uint32_t dstreg = opcode & 7;
3344 OpcodeFamily = 3; CurrentInstrCycles = 28;
3345 {{ int32_t src = get_ilong(2);
3346 { uint32_t dsta = m68k_areg(regs, dstreg);
3347 { int32_t dst = m68k_read_memory_32(dsta);
3348 m68k_areg(regs, dstreg) += 4;
3349 src ^= dst;
3350 CLEAR_CZNV;
3351 SET_ZFLG (((int32_t)(src)) == 0);
3352 SET_NFLG (((int32_t)(src)) < 0);
3353 m68k_write_memory_32(dsta,src);
3354 }}}}m68k_incpc(6);
3355 return 28;
3356 }
CPUFUNC(op_aa0_4)3357 unsigned long CPUFUNC(op_aa0_4)(uint32_t opcode) /* EOR */
3358 {
3359 uint32_t dstreg = opcode & 7;
3360 OpcodeFamily = 3; CurrentInstrCycles = 30;
3361 {{ int32_t src = get_ilong(2);
3362 { uint32_t dsta = m68k_areg(regs, dstreg) - 4;
3363 { int32_t dst = m68k_read_memory_32(dsta);
3364 m68k_areg (regs, dstreg) = dsta;
3365 src ^= dst;
3366 CLEAR_CZNV;
3367 SET_ZFLG (((int32_t)(src)) == 0);
3368 SET_NFLG (((int32_t)(src)) < 0);
3369 m68k_write_memory_32(dsta,src);
3370 }}}}m68k_incpc(6);
3371 return 30;
3372 }
CPUFUNC(op_aa8_4)3373 unsigned long CPUFUNC(op_aa8_4)(uint32_t opcode) /* EOR */
3374 {
3375 uint32_t dstreg = opcode & 7;
3376 OpcodeFamily = 3; CurrentInstrCycles = 32;
3377 {{ int32_t src = get_ilong(2);
3378 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
3379 { int32_t dst = m68k_read_memory_32(dsta);
3380 src ^= dst;
3381 CLEAR_CZNV;
3382 SET_ZFLG (((int32_t)(src)) == 0);
3383 SET_NFLG (((int32_t)(src)) < 0);
3384 m68k_write_memory_32(dsta,src);
3385 }}}}m68k_incpc(8);
3386 return 32;
3387 }
CPUFUNC(op_ab0_4)3388 unsigned long CPUFUNC(op_ab0_4)(uint32_t opcode) /* EOR */
3389 {
3390 uint32_t dstreg = opcode & 7;
3391 OpcodeFamily = 3; CurrentInstrCycles = 34;
3392 {{ int32_t src = get_ilong(2);
3393 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
3394 BusCyclePenalty += 2;
3395 { int32_t dst = m68k_read_memory_32(dsta);
3396 src ^= dst;
3397 CLEAR_CZNV;
3398 SET_ZFLG (((int32_t)(src)) == 0);
3399 SET_NFLG (((int32_t)(src)) < 0);
3400 m68k_write_memory_32(dsta,src);
3401 }}}}m68k_incpc(8);
3402 return 34;
3403 }
CPUFUNC(op_ab8_4)3404 unsigned long CPUFUNC(op_ab8_4)(uint32_t opcode) /* EOR */
3405 {
3406 OpcodeFamily = 3; CurrentInstrCycles = 32;
3407 {{ int32_t src = get_ilong(2);
3408 { uint32_t dsta = (int32_t)(int16_t)get_iword(6);
3409 { int32_t dst = m68k_read_memory_32(dsta);
3410 src ^= dst;
3411 CLEAR_CZNV;
3412 SET_ZFLG (((int32_t)(src)) == 0);
3413 SET_NFLG (((int32_t)(src)) < 0);
3414 m68k_write_memory_32(dsta,src);
3415 }}}}m68k_incpc(8);
3416 return 32;
3417 }
CPUFUNC(op_ab9_4)3418 unsigned long CPUFUNC(op_ab9_4)(uint32_t opcode) /* EOR */
3419 {
3420 OpcodeFamily = 3; CurrentInstrCycles = 36;
3421 {{ int32_t src = get_ilong(2);
3422 { uint32_t dsta = get_ilong(6);
3423 { int32_t dst = m68k_read_memory_32(dsta);
3424 src ^= dst;
3425 CLEAR_CZNV;
3426 SET_ZFLG (((int32_t)(src)) == 0);
3427 SET_NFLG (((int32_t)(src)) < 0);
3428 m68k_write_memory_32(dsta,src);
3429 }}}}m68k_incpc(10);
3430 return 36;
3431 }
CPUFUNC(op_c00_4)3432 unsigned long CPUFUNC(op_c00_4)(uint32_t opcode) /* CMP */
3433 {
3434 uint32_t dstreg = opcode & 7;
3435 OpcodeFamily = 25; CurrentInstrCycles = 8;
3436 {{ int8_t src = get_ibyte(2);
3437 { int8_t dst = m68k_dreg(regs, dstreg);
3438 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
3439 { int flgs = ((int8_t)(src)) < 0;
3440 int flgo = ((int8_t)(dst)) < 0;
3441 int flgn = ((int8_t)(newv)) < 0;
3442 SET_ZFLG (((int8_t)(newv)) == 0);
3443 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3444 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
3445 SET_NFLG (flgn != 0);
3446 }}}}}}m68k_incpc(4);
3447 return 8;
3448 }
CPUFUNC(op_c10_4)3449 unsigned long CPUFUNC(op_c10_4)(uint32_t opcode) /* CMP */
3450 {
3451 uint32_t dstreg = opcode & 7;
3452 OpcodeFamily = 25; CurrentInstrCycles = 12;
3453 {{ int8_t src = get_ibyte(2);
3454 { uint32_t dsta = m68k_areg(regs, dstreg);
3455 { int8_t dst = m68k_read_memory_8(dsta);
3456 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
3457 { int flgs = ((int8_t)(src)) < 0;
3458 int flgo = ((int8_t)(dst)) < 0;
3459 int flgn = ((int8_t)(newv)) < 0;
3460 SET_ZFLG (((int8_t)(newv)) == 0);
3461 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3462 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
3463 SET_NFLG (flgn != 0);
3464 }}}}}}}m68k_incpc(4);
3465 return 12;
3466 }
CPUFUNC(op_c18_4)3467 unsigned long CPUFUNC(op_c18_4)(uint32_t opcode) /* CMP */
3468 {
3469 uint32_t dstreg = opcode & 7;
3470 OpcodeFamily = 25; CurrentInstrCycles = 12;
3471 {{ int8_t src = get_ibyte(2);
3472 { uint32_t dsta = m68k_areg(regs, dstreg);
3473 { int8_t dst = m68k_read_memory_8(dsta);
3474 m68k_areg(regs, dstreg) += areg_byteinc[dstreg];
3475 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
3476 { int flgs = ((int8_t)(src)) < 0;
3477 int flgo = ((int8_t)(dst)) < 0;
3478 int flgn = ((int8_t)(newv)) < 0;
3479 SET_ZFLG (((int8_t)(newv)) == 0);
3480 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3481 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
3482 SET_NFLG (flgn != 0);
3483 }}}}}}}m68k_incpc(4);
3484 return 12;
3485 }
CPUFUNC(op_c20_4)3486 unsigned long CPUFUNC(op_c20_4)(uint32_t opcode) /* CMP */
3487 {
3488 uint32_t dstreg = opcode & 7;
3489 OpcodeFamily = 25; CurrentInstrCycles = 14;
3490 {{ int8_t src = get_ibyte(2);
3491 { uint32_t dsta = m68k_areg(regs, dstreg) - areg_byteinc[dstreg];
3492 { int8_t dst = m68k_read_memory_8(dsta);
3493 m68k_areg (regs, dstreg) = dsta;
3494 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
3495 { int flgs = ((int8_t)(src)) < 0;
3496 int flgo = ((int8_t)(dst)) < 0;
3497 int flgn = ((int8_t)(newv)) < 0;
3498 SET_ZFLG (((int8_t)(newv)) == 0);
3499 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3500 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
3501 SET_NFLG (flgn != 0);
3502 }}}}}}}m68k_incpc(4);
3503 return 14;
3504 }
CPUFUNC(op_c28_4)3505 unsigned long CPUFUNC(op_c28_4)(uint32_t opcode) /* CMP */
3506 {
3507 uint32_t dstreg = opcode & 7;
3508 OpcodeFamily = 25; CurrentInstrCycles = 16;
3509 {{ int8_t src = get_ibyte(2);
3510 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
3511 { int8_t dst = m68k_read_memory_8(dsta);
3512 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
3513 { int flgs = ((int8_t)(src)) < 0;
3514 int flgo = ((int8_t)(dst)) < 0;
3515 int flgn = ((int8_t)(newv)) < 0;
3516 SET_ZFLG (((int8_t)(newv)) == 0);
3517 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3518 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
3519 SET_NFLG (flgn != 0);
3520 }}}}}}}m68k_incpc(6);
3521 return 16;
3522 }
CPUFUNC(op_c30_4)3523 unsigned long CPUFUNC(op_c30_4)(uint32_t opcode) /* CMP */
3524 {
3525 uint32_t dstreg = opcode & 7;
3526 OpcodeFamily = 25; CurrentInstrCycles = 18;
3527 {{ int8_t src = get_ibyte(2);
3528 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
3529 BusCyclePenalty += 2;
3530 { int8_t dst = m68k_read_memory_8(dsta);
3531 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
3532 { int flgs = ((int8_t)(src)) < 0;
3533 int flgo = ((int8_t)(dst)) < 0;
3534 int flgn = ((int8_t)(newv)) < 0;
3535 SET_ZFLG (((int8_t)(newv)) == 0);
3536 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3537 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
3538 SET_NFLG (flgn != 0);
3539 }}}}}}}m68k_incpc(6);
3540 return 18;
3541 }
CPUFUNC(op_c38_4)3542 unsigned long CPUFUNC(op_c38_4)(uint32_t opcode) /* CMP */
3543 {
3544 OpcodeFamily = 25; CurrentInstrCycles = 16;
3545 {{ int8_t src = get_ibyte(2);
3546 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
3547 { int8_t dst = m68k_read_memory_8(dsta);
3548 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
3549 { int flgs = ((int8_t)(src)) < 0;
3550 int flgo = ((int8_t)(dst)) < 0;
3551 int flgn = ((int8_t)(newv)) < 0;
3552 SET_ZFLG (((int8_t)(newv)) == 0);
3553 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3554 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
3555 SET_NFLG (flgn != 0);
3556 }}}}}}}m68k_incpc(6);
3557 return 16;
3558 }
CPUFUNC(op_c39_4)3559 unsigned long CPUFUNC(op_c39_4)(uint32_t opcode) /* CMP */
3560 {
3561 OpcodeFamily = 25; CurrentInstrCycles = 20;
3562 {{ int8_t src = get_ibyte(2);
3563 { uint32_t dsta = get_ilong(4);
3564 { int8_t dst = m68k_read_memory_8(dsta);
3565 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
3566 { int flgs = ((int8_t)(src)) < 0;
3567 int flgo = ((int8_t)(dst)) < 0;
3568 int flgn = ((int8_t)(newv)) < 0;
3569 SET_ZFLG (((int8_t)(newv)) == 0);
3570 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3571 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
3572 SET_NFLG (flgn != 0);
3573 }}}}}}}m68k_incpc(8);
3574 return 20;
3575 }
CPUFUNC(op_c3a_4)3576 unsigned long CPUFUNC(op_c3a_4)(uint32_t opcode) /* CMP */
3577 {
3578 uint32_t dstreg = 2;
3579 OpcodeFamily = 25; CurrentInstrCycles = 16;
3580 {{ int8_t src = get_ibyte(2);
3581 { uint32_t dsta = m68k_getpc () + 4;
3582 dsta += (int32_t)(int16_t)get_iword(4);
3583 { int8_t dst = m68k_read_memory_8(dsta);
3584 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
3585 { int flgs = ((int8_t)(src)) < 0;
3586 int flgo = ((int8_t)(dst)) < 0;
3587 int flgn = ((int8_t)(newv)) < 0;
3588 SET_ZFLG (((int8_t)(newv)) == 0);
3589 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3590 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
3591 SET_NFLG (flgn != 0);
3592 }}}}}}}m68k_incpc(6);
3593 return 16;
3594 }
CPUFUNC(op_c3b_4)3595 unsigned long CPUFUNC(op_c3b_4)(uint32_t opcode) /* CMP */
3596 {
3597 uint32_t dstreg = 3;
3598 OpcodeFamily = 25; CurrentInstrCycles = 18;
3599 {{ int8_t src = get_ibyte(2);
3600 { uint32_t tmppc = m68k_getpc() + 4;
3601 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
3602 BusCyclePenalty += 2;
3603 { int8_t dst = m68k_read_memory_8(dsta);
3604 {{uint32_t newv = ((int8_t)(dst)) - ((int8_t)(src));
3605 { int flgs = ((int8_t)(src)) < 0;
3606 int flgo = ((int8_t)(dst)) < 0;
3607 int flgn = ((int8_t)(newv)) < 0;
3608 SET_ZFLG (((int8_t)(newv)) == 0);
3609 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3610 SET_CFLG (((uint8_t)(src)) > ((uint8_t)(dst)));
3611 SET_NFLG (flgn != 0);
3612 }}}}}}}m68k_incpc(6);
3613 return 18;
3614 }
CPUFUNC(op_c40_4)3615 unsigned long CPUFUNC(op_c40_4)(uint32_t opcode) /* CMP */
3616 {
3617 uint32_t dstreg = opcode & 7;
3618 OpcodeFamily = 25; CurrentInstrCycles = 8;
3619 {{ int16_t src = get_iword(2);
3620 { int16_t dst = m68k_dreg(regs, dstreg);
3621 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
3622 { int flgs = ((int16_t)(src)) < 0;
3623 int flgo = ((int16_t)(dst)) < 0;
3624 int flgn = ((int16_t)(newv)) < 0;
3625 SET_ZFLG (((int16_t)(newv)) == 0);
3626 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3627 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
3628 SET_NFLG (flgn != 0);
3629 }}}}}}m68k_incpc(4);
3630 return 8;
3631 }
CPUFUNC(op_c50_4)3632 unsigned long CPUFUNC(op_c50_4)(uint32_t opcode) /* CMP */
3633 {
3634 uint32_t dstreg = opcode & 7;
3635 OpcodeFamily = 25; CurrentInstrCycles = 12;
3636 {{ int16_t src = get_iword(2);
3637 { uint32_t dsta = m68k_areg(regs, dstreg);
3638 { int16_t dst = m68k_read_memory_16(dsta);
3639 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
3640 { int flgs = ((int16_t)(src)) < 0;
3641 int flgo = ((int16_t)(dst)) < 0;
3642 int flgn = ((int16_t)(newv)) < 0;
3643 SET_ZFLG (((int16_t)(newv)) == 0);
3644 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3645 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
3646 SET_NFLG (flgn != 0);
3647 }}}}}}}m68k_incpc(4);
3648 return 12;
3649 }
CPUFUNC(op_c58_4)3650 unsigned long CPUFUNC(op_c58_4)(uint32_t opcode) /* CMP */
3651 {
3652 uint32_t dstreg = opcode & 7;
3653 OpcodeFamily = 25; CurrentInstrCycles = 12;
3654 {{ int16_t src = get_iword(2);
3655 { uint32_t dsta = m68k_areg(regs, dstreg);
3656 { int16_t dst = m68k_read_memory_16(dsta);
3657 m68k_areg(regs, dstreg) += 2;
3658 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
3659 { int flgs = ((int16_t)(src)) < 0;
3660 int flgo = ((int16_t)(dst)) < 0;
3661 int flgn = ((int16_t)(newv)) < 0;
3662 SET_ZFLG (((int16_t)(newv)) == 0);
3663 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3664 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
3665 SET_NFLG (flgn != 0);
3666 }}}}}}}m68k_incpc(4);
3667 return 12;
3668 }
CPUFUNC(op_c60_4)3669 unsigned long CPUFUNC(op_c60_4)(uint32_t opcode) /* CMP */
3670 {
3671 uint32_t dstreg = opcode & 7;
3672 OpcodeFamily = 25; CurrentInstrCycles = 14;
3673 {{ int16_t src = get_iword(2);
3674 { uint32_t dsta = m68k_areg(regs, dstreg) - 2;
3675 { int16_t dst = m68k_read_memory_16(dsta);
3676 m68k_areg (regs, dstreg) = dsta;
3677 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
3678 { int flgs = ((int16_t)(src)) < 0;
3679 int flgo = ((int16_t)(dst)) < 0;
3680 int flgn = ((int16_t)(newv)) < 0;
3681 SET_ZFLG (((int16_t)(newv)) == 0);
3682 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3683 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
3684 SET_NFLG (flgn != 0);
3685 }}}}}}}m68k_incpc(4);
3686 return 14;
3687 }
CPUFUNC(op_c68_4)3688 unsigned long CPUFUNC(op_c68_4)(uint32_t opcode) /* CMP */
3689 {
3690 uint32_t dstreg = opcode & 7;
3691 OpcodeFamily = 25; CurrentInstrCycles = 16;
3692 {{ int16_t src = get_iword(2);
3693 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(4);
3694 { int16_t dst = m68k_read_memory_16(dsta);
3695 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
3696 { int flgs = ((int16_t)(src)) < 0;
3697 int flgo = ((int16_t)(dst)) < 0;
3698 int flgn = ((int16_t)(newv)) < 0;
3699 SET_ZFLG (((int16_t)(newv)) == 0);
3700 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3701 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
3702 SET_NFLG (flgn != 0);
3703 }}}}}}}m68k_incpc(6);
3704 return 16;
3705 }
CPUFUNC(op_c70_4)3706 unsigned long CPUFUNC(op_c70_4)(uint32_t opcode) /* CMP */
3707 {
3708 uint32_t dstreg = opcode & 7;
3709 OpcodeFamily = 25; CurrentInstrCycles = 18;
3710 {{ int16_t src = get_iword(2);
3711 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(4));
3712 BusCyclePenalty += 2;
3713 { int16_t dst = m68k_read_memory_16(dsta);
3714 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
3715 { int flgs = ((int16_t)(src)) < 0;
3716 int flgo = ((int16_t)(dst)) < 0;
3717 int flgn = ((int16_t)(newv)) < 0;
3718 SET_ZFLG (((int16_t)(newv)) == 0);
3719 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3720 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
3721 SET_NFLG (flgn != 0);
3722 }}}}}}}m68k_incpc(6);
3723 return 18;
3724 }
CPUFUNC(op_c78_4)3725 unsigned long CPUFUNC(op_c78_4)(uint32_t opcode) /* CMP */
3726 {
3727 OpcodeFamily = 25; CurrentInstrCycles = 16;
3728 {{ int16_t src = get_iword(2);
3729 { uint32_t dsta = (int32_t)(int16_t)get_iword(4);
3730 { int16_t dst = m68k_read_memory_16(dsta);
3731 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
3732 { int flgs = ((int16_t)(src)) < 0;
3733 int flgo = ((int16_t)(dst)) < 0;
3734 int flgn = ((int16_t)(newv)) < 0;
3735 SET_ZFLG (((int16_t)(newv)) == 0);
3736 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3737 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
3738 SET_NFLG (flgn != 0);
3739 }}}}}}}m68k_incpc(6);
3740 return 16;
3741 }
CPUFUNC(op_c79_4)3742 unsigned long CPUFUNC(op_c79_4)(uint32_t opcode) /* CMP */
3743 {
3744 OpcodeFamily = 25; CurrentInstrCycles = 20;
3745 {{ int16_t src = get_iword(2);
3746 { uint32_t dsta = get_ilong(4);
3747 { int16_t dst = m68k_read_memory_16(dsta);
3748 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
3749 { int flgs = ((int16_t)(src)) < 0;
3750 int flgo = ((int16_t)(dst)) < 0;
3751 int flgn = ((int16_t)(newv)) < 0;
3752 SET_ZFLG (((int16_t)(newv)) == 0);
3753 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3754 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
3755 SET_NFLG (flgn != 0);
3756 }}}}}}}m68k_incpc(8);
3757 return 20;
3758 }
CPUFUNC(op_c7a_4)3759 unsigned long CPUFUNC(op_c7a_4)(uint32_t opcode) /* CMP */
3760 {
3761 uint32_t dstreg = 2;
3762 OpcodeFamily = 25; CurrentInstrCycles = 16;
3763 {{ int16_t src = get_iword(2);
3764 { uint32_t dsta = m68k_getpc () + 4;
3765 dsta += (int32_t)(int16_t)get_iword(4);
3766 { int16_t dst = m68k_read_memory_16(dsta);
3767 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
3768 { int flgs = ((int16_t)(src)) < 0;
3769 int flgo = ((int16_t)(dst)) < 0;
3770 int flgn = ((int16_t)(newv)) < 0;
3771 SET_ZFLG (((int16_t)(newv)) == 0);
3772 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3773 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
3774 SET_NFLG (flgn != 0);
3775 }}}}}}}m68k_incpc(6);
3776 return 16;
3777 }
CPUFUNC(op_c7b_4)3778 unsigned long CPUFUNC(op_c7b_4)(uint32_t opcode) /* CMP */
3779 {
3780 uint32_t dstreg = 3;
3781 OpcodeFamily = 25; CurrentInstrCycles = 18;
3782 {{ int16_t src = get_iword(2);
3783 { uint32_t tmppc = m68k_getpc() + 4;
3784 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(4));
3785 BusCyclePenalty += 2;
3786 { int16_t dst = m68k_read_memory_16(dsta);
3787 {{uint32_t newv = ((int16_t)(dst)) - ((int16_t)(src));
3788 { int flgs = ((int16_t)(src)) < 0;
3789 int flgo = ((int16_t)(dst)) < 0;
3790 int flgn = ((int16_t)(newv)) < 0;
3791 SET_ZFLG (((int16_t)(newv)) == 0);
3792 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3793 SET_CFLG (((uint16_t)(src)) > ((uint16_t)(dst)));
3794 SET_NFLG (flgn != 0);
3795 }}}}}}}m68k_incpc(6);
3796 return 18;
3797 }
CPUFUNC(op_c80_4)3798 unsigned long CPUFUNC(op_c80_4)(uint32_t opcode) /* CMP */
3799 {
3800 uint32_t dstreg = opcode & 7;
3801 OpcodeFamily = 25; CurrentInstrCycles = 14;
3802 {{ int32_t src = get_ilong(2);
3803 { int32_t dst = m68k_dreg(regs, dstreg);
3804 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
3805 { int flgs = ((int32_t)(src)) < 0;
3806 int flgo = ((int32_t)(dst)) < 0;
3807 int flgn = ((int32_t)(newv)) < 0;
3808 SET_ZFLG (((int32_t)(newv)) == 0);
3809 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3810 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
3811 SET_NFLG (flgn != 0);
3812 }}}}}}m68k_incpc(6);
3813 return 14;
3814 }
CPUFUNC(op_c90_4)3815 unsigned long CPUFUNC(op_c90_4)(uint32_t opcode) /* CMP */
3816 {
3817 uint32_t dstreg = opcode & 7;
3818 OpcodeFamily = 25; CurrentInstrCycles = 20;
3819 {{ int32_t src = get_ilong(2);
3820 { uint32_t dsta = m68k_areg(regs, dstreg);
3821 { int32_t dst = m68k_read_memory_32(dsta);
3822 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
3823 { int flgs = ((int32_t)(src)) < 0;
3824 int flgo = ((int32_t)(dst)) < 0;
3825 int flgn = ((int32_t)(newv)) < 0;
3826 SET_ZFLG (((int32_t)(newv)) == 0);
3827 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3828 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
3829 SET_NFLG (flgn != 0);
3830 }}}}}}}m68k_incpc(6);
3831 return 20;
3832 }
CPUFUNC(op_c98_4)3833 unsigned long CPUFUNC(op_c98_4)(uint32_t opcode) /* CMP */
3834 {
3835 uint32_t dstreg = opcode & 7;
3836 OpcodeFamily = 25; CurrentInstrCycles = 20;
3837 {{ int32_t src = get_ilong(2);
3838 { uint32_t dsta = m68k_areg(regs, dstreg);
3839 { int32_t dst = m68k_read_memory_32(dsta);
3840 m68k_areg(regs, dstreg) += 4;
3841 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
3842 { int flgs = ((int32_t)(src)) < 0;
3843 int flgo = ((int32_t)(dst)) < 0;
3844 int flgn = ((int32_t)(newv)) < 0;
3845 SET_ZFLG (((int32_t)(newv)) == 0);
3846 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3847 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
3848 SET_NFLG (flgn != 0);
3849 }}}}}}}m68k_incpc(6);
3850 return 20;
3851 }
CPUFUNC(op_ca0_4)3852 unsigned long CPUFUNC(op_ca0_4)(uint32_t opcode) /* CMP */
3853 {
3854 uint32_t dstreg = opcode & 7;
3855 OpcodeFamily = 25; CurrentInstrCycles = 22;
3856 {{ int32_t src = get_ilong(2);
3857 { uint32_t dsta = m68k_areg(regs, dstreg) - 4;
3858 { int32_t dst = m68k_read_memory_32(dsta);
3859 m68k_areg (regs, dstreg) = dsta;
3860 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
3861 { int flgs = ((int32_t)(src)) < 0;
3862 int flgo = ((int32_t)(dst)) < 0;
3863 int flgn = ((int32_t)(newv)) < 0;
3864 SET_ZFLG (((int32_t)(newv)) == 0);
3865 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3866 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
3867 SET_NFLG (flgn != 0);
3868 }}}}}}}m68k_incpc(6);
3869 return 22;
3870 }
CPUFUNC(op_ca8_4)3871 unsigned long CPUFUNC(op_ca8_4)(uint32_t opcode) /* CMP */
3872 {
3873 uint32_t dstreg = opcode & 7;
3874 OpcodeFamily = 25; CurrentInstrCycles = 24;
3875 {{ int32_t src = get_ilong(2);
3876 { uint32_t dsta = m68k_areg(regs, dstreg) + (int32_t)(int16_t)get_iword(6);
3877 { int32_t dst = m68k_read_memory_32(dsta);
3878 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
3879 { int flgs = ((int32_t)(src)) < 0;
3880 int flgo = ((int32_t)(dst)) < 0;
3881 int flgn = ((int32_t)(newv)) < 0;
3882 SET_ZFLG (((int32_t)(newv)) == 0);
3883 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3884 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
3885 SET_NFLG (flgn != 0);
3886 }}}}}}}m68k_incpc(8);
3887 return 24;
3888 }
CPUFUNC(op_cb0_4)3889 unsigned long CPUFUNC(op_cb0_4)(uint32_t opcode) /* CMP */
3890 {
3891 uint32_t dstreg = opcode & 7;
3892 OpcodeFamily = 25; CurrentInstrCycles = 26;
3893 {{ int32_t src = get_ilong(2);
3894 { uint32_t dsta = get_disp_ea_000(m68k_areg(regs, dstreg), get_iword(6));
3895 BusCyclePenalty += 2;
3896 { int32_t dst = m68k_read_memory_32(dsta);
3897 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
3898 { int flgs = ((int32_t)(src)) < 0;
3899 int flgo = ((int32_t)(dst)) < 0;
3900 int flgn = ((int32_t)(newv)) < 0;
3901 SET_ZFLG (((int32_t)(newv)) == 0);
3902 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3903 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
3904 SET_NFLG (flgn != 0);
3905 }}}}}}}m68k_incpc(8);
3906 return 26;
3907 }
CPUFUNC(op_cb8_4)3908 unsigned long CPUFUNC(op_cb8_4)(uint32_t opcode) /* CMP */
3909 {
3910 OpcodeFamily = 25; CurrentInstrCycles = 24;
3911 {{ int32_t src = get_ilong(2);
3912 { uint32_t dsta = (int32_t)(int16_t)get_iword(6);
3913 { int32_t dst = m68k_read_memory_32(dsta);
3914 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
3915 { int flgs = ((int32_t)(src)) < 0;
3916 int flgo = ((int32_t)(dst)) < 0;
3917 int flgn = ((int32_t)(newv)) < 0;
3918 SET_ZFLG (((int32_t)(newv)) == 0);
3919 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3920 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
3921 SET_NFLG (flgn != 0);
3922 }}}}}}}m68k_incpc(8);
3923 return 24;
3924 }
CPUFUNC(op_cb9_4)3925 unsigned long CPUFUNC(op_cb9_4)(uint32_t opcode) /* CMP */
3926 {
3927 OpcodeFamily = 25; CurrentInstrCycles = 28;
3928 {{ int32_t src = get_ilong(2);
3929 { uint32_t dsta = get_ilong(6);
3930 { int32_t dst = m68k_read_memory_32(dsta);
3931 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
3932 { int flgs = ((int32_t)(src)) < 0;
3933 int flgo = ((int32_t)(dst)) < 0;
3934 int flgn = ((int32_t)(newv)) < 0;
3935 SET_ZFLG (((int32_t)(newv)) == 0);
3936 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3937 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
3938 SET_NFLG (flgn != 0);
3939 }}}}}}}m68k_incpc(10);
3940 return 28;
3941 }
CPUFUNC(op_cba_4)3942 unsigned long CPUFUNC(op_cba_4)(uint32_t opcode) /* CMP */
3943 {
3944 uint32_t dstreg = 2;
3945 OpcodeFamily = 25; CurrentInstrCycles = 24;
3946 {{ int32_t src = get_ilong(2);
3947 { uint32_t dsta = m68k_getpc () + 6;
3948 dsta += (int32_t)(int16_t)get_iword(6);
3949 { int32_t dst = m68k_read_memory_32(dsta);
3950 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
3951 { int flgs = ((int32_t)(src)) < 0;
3952 int flgo = ((int32_t)(dst)) < 0;
3953 int flgn = ((int32_t)(newv)) < 0;
3954 SET_ZFLG (((int32_t)(newv)) == 0);
3955 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3956 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
3957 SET_NFLG (flgn != 0);
3958 }}}}}}}m68k_incpc(8);
3959 return 24;
3960 }
CPUFUNC(op_cbb_4)3961 unsigned long CPUFUNC(op_cbb_4)(uint32_t opcode) /* CMP */
3962 {
3963 uint32_t dstreg = 3;
3964 OpcodeFamily = 25; CurrentInstrCycles = 26;
3965 {{ int32_t src = get_ilong(2);
3966 { uint32_t tmppc = m68k_getpc() + 6;
3967 uint32_t dsta = get_disp_ea_000(tmppc, get_iword(6));
3968 BusCyclePenalty += 2;
3969 { int32_t dst = m68k_read_memory_32(dsta);
3970 {{uint32_t newv = ((int32_t)(dst)) - ((int32_t)(src));
3971 { int flgs = ((int32_t)(src)) < 0;
3972 int flgo = ((int32_t)(dst)) < 0;
3973 int flgn = ((int32_t)(newv)) < 0;
3974 SET_ZFLG (((int32_t)(newv)) == 0);
3975 SET_VFLG ((flgs != flgo) && (flgn != flgo));
3976 SET_CFLG (((uint32_t)(src)) > ((uint32_t)(dst)));
3977 SET_NFLG (flgn != 0);
3978 }}}}}}}m68k_incpc(8);
3979 return 26;
3980 }
CPUFUNC(op_1000_4)3981 unsigned long CPUFUNC(op_1000_4)(uint32_t opcode) /* MOVE */
3982 {
3983 uint32_t srcreg = (opcode & 7);
3984 uint32_t dstreg = (opcode >> 9) & 7;
3985 OpcodeFamily = 30; CurrentInstrCycles = 4;
3986 {{ int8_t src = m68k_dreg(regs, srcreg);
3987 { CLEAR_CZNV;
3988 SET_ZFLG (((int8_t)(src)) == 0);
3989 SET_NFLG (((int8_t)(src)) < 0);
3990 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
3991 }}}m68k_incpc(2);
3992 return 4;
3993 }
CPUFUNC(op_1008_4)3994 unsigned long CPUFUNC(op_1008_4)(uint32_t opcode) /* MOVE */
3995 {
3996 uint32_t srcreg = (opcode & 7);
3997 uint32_t dstreg = (opcode >> 9) & 7;
3998 OpcodeFamily = 30; CurrentInstrCycles = 4;
3999 {{ int8_t src = m68k_areg(regs, srcreg);
4000 { CLEAR_CZNV;
4001 SET_ZFLG (((int8_t)(src)) == 0);
4002 SET_NFLG (((int8_t)(src)) < 0);
4003 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
4004 }}}m68k_incpc(2);
4005 return 4;
4006 }
CPUFUNC(op_1010_4)4007 unsigned long CPUFUNC(op_1010_4)(uint32_t opcode) /* MOVE */
4008 {
4009 uint32_t srcreg = (opcode & 7);
4010 uint32_t dstreg = (opcode >> 9) & 7;
4011 OpcodeFamily = 30; CurrentInstrCycles = 8;
4012 {{ uint32_t srca = m68k_areg(regs, srcreg);
4013 { int8_t src = m68k_read_memory_8(srca);
4014 { CLEAR_CZNV;
4015 SET_ZFLG (((int8_t)(src)) == 0);
4016 SET_NFLG (((int8_t)(src)) < 0);
4017 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
4018 }}}}m68k_incpc(2);
4019 return 8;
4020 }
CPUFUNC(op_1018_4)4021 unsigned long CPUFUNC(op_1018_4)(uint32_t opcode) /* MOVE */
4022 {
4023 uint32_t srcreg = (opcode & 7);
4024 uint32_t dstreg = (opcode >> 9) & 7;
4025 OpcodeFamily = 30; CurrentInstrCycles = 8;
4026 {{ uint32_t srca = m68k_areg(regs, srcreg);
4027 { int8_t src = m68k_read_memory_8(srca);
4028 m68k_areg(regs, srcreg) += areg_byteinc[srcreg];
4029 { CLEAR_CZNV;
4030 SET_ZFLG (((int8_t)(src)) == 0);
4031 SET_NFLG (((int8_t)(src)) < 0);
4032 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
4033 }}}}m68k_incpc(2);
4034 return 8;
4035 }
CPUFUNC(op_1020_4)4036 unsigned long CPUFUNC(op_1020_4)(uint32_t opcode) /* MOVE */
4037 {
4038 uint32_t srcreg = (opcode & 7);
4039 uint32_t dstreg = (opcode >> 9) & 7;
4040 OpcodeFamily = 30; CurrentInstrCycles = 10;
4041 {{ uint32_t srca = m68k_areg(regs, srcreg) - areg_byteinc[srcreg];
4042 { int8_t src = m68k_read_memory_8(srca);
4043 m68k_areg (regs, srcreg) = srca;
4044 { CLEAR_CZNV;
4045 SET_ZFLG (((int8_t)(src)) == 0);
4046 SET_NFLG (((int8_t)(src)) < 0);
4047 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
4048 }}}}m68k_incpc(2);
4049 return 10;
4050 }
CPUFUNC(op_1028_4)4051 unsigned long CPUFUNC(op_1028_4)(uint32_t opcode) /* MOVE */
4052 {
4053 uint32_t srcreg = (opcode & 7);
4054 uint32_t dstreg = (opcode >> 9) & 7;
4055 OpcodeFamily = 30; CurrentInstrCycles = 12;
4056 {{ uint32_t srca = m68k_areg(regs, srcreg) + (int32_t)(int16_t)get_iword(2);
4057 { int8_t src = m68k_read_memory_8(srca);
4058 { CLEAR_CZNV;
4059 SET_ZFLG (((int8_t)(src)) == 0);
4060 SET_NFLG (((int8_t)(src)) < 0);
4061 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
4062 }}}}m68k_incpc(4);
4063 return 12;
4064 }
CPUFUNC(op_1030_4)4065 unsigned long CPUFUNC(op_1030_4)(uint32_t opcode) /* MOVE */
4066 {
4067 uint32_t srcreg = (opcode & 7);
4068 uint32_t dstreg = (opcode >> 9) & 7;
4069 OpcodeFamily = 30; CurrentInstrCycles = 14;
4070 {{ uint32_t srca = get_disp_ea_000(m68k_areg(regs, srcreg), get_iword(2));
4071 BusCyclePenalty += 2;
4072 { int8_t src = m68k_read_memory_8(srca);
4073 { CLEAR_CZNV;
4074 SET_ZFLG (((int8_t)(src)) == 0);
4075 SET_NFLG (((int8_t)(src)) < 0);
4076 m68k_dreg(regs, dstreg) = (m68k_dreg(regs, dstreg) & ~0xff) | ((src) & 0xff);
4077 }}}}m68k_incpc(4);
4078 return 14;
4079 }
CPUFUNC(op_1038_4)4080