1 /* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 2 * Mupen64plus - rdp_core.h * 3 * Mupen64Plus homepage: http://code.google.com/p/mupen64plus/ * 4 * Copyright (C) 2014 Bobby Smiles * 5 * * 6 * This program is free software; you can redistribute it and/or modify * 7 * it under the terms of the GNU General Public License as published by * 8 * the Free Software Foundation; either version 2 of the License, or * 9 * (at your option) any later version. * 10 * * 11 * This program is distributed in the hope that it will be useful, * 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of * 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * 14 * GNU General Public License for more details. * 15 * * 16 * You should have received a copy of the GNU General Public License * 17 * along with this program; if not, write to the * 18 * Free Software Foundation, Inc., * 19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. * 20 * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */ 21 22 #ifndef M64P_RDP_RDP_CORE_H 23 #define M64P_RDP_RDP_CORE_H 24 25 #include <stdint.h> 26 27 #include "fb.h" 28 29 #ifndef DPC_REG 30 #define DPC_REG(a) ((a & 0xffff) >> 2) 31 #endif 32 33 #ifndef DPS_REG 34 #define DPS_REG(a) ((a & 0xffff) >> 2) 35 #endif 36 37 struct r4300_core; 38 struct rsp_core; 39 struct ri_controller; 40 41 enum 42 { 43 /* DPC status - read */ 44 DPC_STATUS_XBUS_DMEM_DMA = 0x001, 45 DPC_STATUS_FREEZE = 0x002, 46 DPC_STATUS_FLUSH = 0x004, 47 DPC_STATUS_CBUF_READY = 0x080, 48 /* DPC status - write */ 49 DPC_STATUS_CLR_XBUS_DMEM_DMA = 0x001, 50 DPC_STATUS_SET_XBUS_DMEM_DMA = 0x002, 51 DPC_STATUS_CLR_FREEZE = 0x004, 52 DPC_STATUS_SET_FREEZE = 0x008, 53 DPC_STATUS_CLR_FLUSH = 0x010, 54 DPC_STATUS_SET_FLUSH = 0x020, 55 }; 56 57 enum dpc_registers 58 { 59 DPC_START_REG, 60 DPC_END_REG, 61 DPC_CURRENT_REG, 62 DPC_STATUS_REG, 63 DPC_CLOCK_REG, 64 DPC_BUFBUSY_REG, 65 DPC_PIPEBUSY_REG, 66 DPC_TMEM_REG, 67 DPC_REGS_COUNT 68 }; 69 70 enum dps_registers 71 { 72 DPS_TBIST_REG, 73 DPS_TEST_MODE_REG, 74 DPS_BUFTEST_ADDR_REG, 75 DPS_BUFTEST_DATA_REG, 76 DPS_REGS_COUNT 77 }; 78 79 80 struct rdp_core 81 { 82 uint32_t dpc_regs[DPC_REGS_COUNT]; 83 uint32_t dps_regs[DPS_REGS_COUNT]; 84 85 struct fb fb; 86 87 struct r4300_core* r4300; 88 struct rsp_core* sp; 89 struct ri_controller* ri; 90 }; 91 92 void init_rdp(struct rdp_core* dp, 93 struct r4300_core* r4300, 94 struct rsp_core* sp, 95 struct ri_controller* ri); 96 97 void poweron_rdp(struct rdp_core* dp); 98 99 int read_dpc_regs(void* opaque, uint32_t address, uint32_t* value); 100 int write_dpc_regs(void* opaque, uint32_t address, uint32_t value, uint32_t mask); 101 102 int read_dps_regs(void* opaque, uint32_t address, uint32_t* value); 103 int write_dps_regs(void* opaque, uint32_t address, uint32_t value, uint32_t mask); 104 105 void rdp_interrupt_event(struct rdp_core* dp); 106 107 #endif 108