1 /* $NetBSD: locore.h,v 1.1 2014/08/10 05:47:38 matt Exp $ */
2 
3 /*-
4  * Copyright (c) 2014 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Matt Thomas of 3am Software Foundry.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _AARCH64_LOCORE_H_
33 #define _AARCH64_LOCORE_H_
34 
35 #ifdef __aarch64__
36 
37 #include <sys/types.h>
38 
39 #include <sys/cpu.h>
40 #include <sys/lwp.h>
41 #include <sys/bus.h>
42 
43 #include <aarch64/armreg.h>
44 #include <aarch64/frame.h>
45 
46 struct mainbus_attach_args {
47 	const char *mba_name;
48 	bus_space_tag_t mba_memt;
49 	bus_dma_tag_t mba_dmat;
50 	bus_addr_t mba_addr;
51 	bus_size_t mba_size;
52 	int mba_intr;
53 	int mba_intrbase;
54 	int mba_package;
55 };
56 
57 void	userret(struct lwp *, struct trapframe *);
58 void	lwp_trampoline(void);
59 void	cpu_dosoftints(void);
60 void	dosoftints(void);
61 void	cpu_switchto_softint(struct lwp *, int);
62 void	cpu_send_ipi(struct cpu_info *, int);
63 
64 extern paddr_t physical_start;
65 extern paddr_t physical_end;
66 
67 extern const pcu_ops_t pcu_fpu_ops;
68 
69 static inline bool
fpu_used_p(lwp_t * l)70 fpu_used_p(lwp_t *l)
71 {
72 	KASSERT(l == curlwp);
73 	return pcu_valid_p(&pcu_fpu_ops);
74 }
75 
76 static inline void
fpu_discard(lwp_t * l,bool usesw)77 fpu_discard(lwp_t *l, bool usesw)
78 {
79 	KASSERT(l == curlwp);
80 	pcu_discard(&pcu_fpu_ops, usesw);
81 }
82 
83 static inline void
fpu_save(lwp_t * l)84 fpu_save(lwp_t *l)
85 {
86 	KASSERT(l == curlwp);
87 	pcu_save(&pcu_fpu_ops);
88 }
89 
90 static inline void cpsie(register_t psw) __attribute__((__unused__));
91 static inline register_t cpsid(register_t psw) __attribute__((__unused__));
92 
93 static inline void
cpsie(register_t psw)94 cpsie(register_t psw)
95 {
96 	if (!__builtin_constant_p(psw)) {
97 		reg_daif_write(psw);
98 	} else {
99 		reg_daifset_write(psw);
100 	}
101 }
102 
103 static inline void
enable_interrupts(register_t psw)104 enable_interrupts(register_t psw)
105 {
106 	reg_daif_write(psw);
107 }
108 
109 static inline register_t
cpsid(register_t psw)110 cpsid(register_t psw)
111 {
112 	register_t oldpsw = reg_daif_read();
113 	if (!__builtin_constant_p(psw)) {
114 		reg_daif_write(oldpsw & ~psw);
115 	} else {
116 		reg_daifclr_write(psw);
117 	}
118 	return oldpsw;
119 }
120 
121 static const paddr_t VTOPHYS_FAILED = (paddr_t) -1L;
122 
123 static inline paddr_t
vtophys(vaddr_t va)124 vtophys(vaddr_t va)
125 {
126 	const uint64_t daif = reg_daif_read();
127 	/*
128 	 * Use the address translation instruction to do the lookup.
129 	 */
130 	reg_daifset_write(DAIF_I|DAIF_F);
131 	__asm __volatile("at\ts1e1r, %0" :: "r"(va));
132 	paddr_t pa = reg_par_el1_read();
133 	pa = (pa & PAR_F) ? VTOPHYS_FAILED : (pa & PAR_PA);
134 	reg_daif_write(daif);
135 	return pa;
136 }
137 
138 static inline paddr_t
vtophysw(vaddr_t va)139 vtophysw(vaddr_t va)
140 {
141 	const uint64_t daif = reg_daif_read();
142 	/*
143 	 * Use the address translation instruction to do the lookup.
144 	 */
145 	reg_daifset_write(DAIF_I|DAIF_F);
146 	__asm __volatile("at\ts1e1w, %0" :: "r"(va));
147 	paddr_t pa = reg_par_el1_read();
148 	pa = (pa & PAR_F) ? VTOPHYS_FAILED : (pa & PAR_PA);
149 	reg_daif_write(daif);
150 	return pa;
151 }
152 
153 #elif defined(__arm__)
154 
155 #include <arm/locore.h>
156 
157 #endif /* __aarch64__/__arm__ */
158 
159 #endif /* _AARCH64_LOCORE_H_ */
160