1 /* $NetBSD: rs5c313_landisk.c,v 1.5 2010/04/06 15:29:19 nonaka Exp $ */
2
3 /*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: rs5c313_landisk.c,v 1.5 2010/04/06 15:29:19 nonaka Exp $");
31
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/device.h>
35 #include <sys/kernel.h>
36
37 #include <dev/clock_subr.h>
38 #include <dev/ic/rs5c313var.h>
39
40 #include <sh3/devreg.h>
41 #include <sh3/scireg.h>
42
43 #include <landisk/landisk/landiskreg.h>
44
45
46 /* autoconf glue */
47 static int rs5c313_landisk_match(device_t, cfdata_t, void *);
48 static void rs5c313_landisk_attach(device_t, device_t, void *);
49
50 CFATTACH_DECL_NEW(rs5c313_landisk, sizeof(struct rs5c313_softc),
51 rs5c313_landisk_match, rs5c313_landisk_attach, NULL, NULL);
52
53
54 /* chip access methods */
55 static void rtc_begin(struct rs5c313_softc *);
56 static void rtc_ce(struct rs5c313_softc *, int);
57 static void rtc_dir(struct rs5c313_softc *, int);
58 static void rtc_clk(struct rs5c313_softc *, int);
59 static int rtc_read(struct rs5c313_softc *);
60 static void rtc_write(struct rs5c313_softc *, int);
61
62 static struct rs5c313_ops rs5c313_landisk_ops = {
63 .rs5c313_op_begin = rtc_begin,
64 .rs5c313_op_ce = rtc_ce,
65 .rs5c313_op_clk = rtc_clk,
66 .rs5c313_op_dir = rtc_dir,
67 .rs5c313_op_read = rtc_read,
68 .rs5c313_op_write = rtc_write,
69 };
70
71 #define ndelay(x) delay(x)
72
73
74
75 static int
rs5c313_landisk_match(device_t parent,cfdata_t cf,void * aux)76 rs5c313_landisk_match(device_t parent, cfdata_t cf, void *aux)
77 {
78 static int matched = 0;
79
80 if (matched)
81 return 0;
82
83 matched = 1;
84 return 1;
85 }
86
87
88 static void
rs5c313_landisk_attach(device_t parent,device_t self,void * aux)89 rs5c313_landisk_attach(device_t parent, device_t self, void *aux)
90 {
91 struct rs5c313_softc *sc = device_private(self);
92
93 sc->sc_dev = self;
94 sc->sc_model = MODEL_5C313;
95 sc->sc_ops = &rs5c313_landisk_ops;
96 rs5c313_attach(sc);
97 }
98
99
100 static void
rtc_begin(struct rs5c313_softc * sc)101 rtc_begin(struct rs5c313_softc *sc)
102 {
103
104 SHREG_SCSPTR = SCSPTR_SPB1IO | SCSPTR_SPB1DT
105 | SCSPTR_SPB0IO | SCSPTR_SPB0DT;
106 ndelay(100);
107 }
108
109
110 /*
111 * CE pin
112 */
113 static void
rtc_ce(struct rs5c313_softc * sc,int onoff)114 rtc_ce(struct rs5c313_softc *sc, int onoff)
115 {
116
117 if (onoff)
118 _reg_write_1(LANDISK_PWRMNG, PWRMNG_RTC_CE);
119 else
120 _reg_write_1(LANDISK_PWRMNG, 0);
121 ndelay(600);
122 }
123
124
125 /*
126 * SCLK pin is connnected to SPB0DT.
127 * SPB0DT is always in output mode, we set SPB0IO in rtc_begin.
128 */
129 static void
rtc_clk(struct rs5c313_softc * sc,int onoff)130 rtc_clk(struct rs5c313_softc *sc, int onoff)
131 {
132 uint8_t r = SHREG_SCSPTR;
133
134 if (onoff)
135 r |= SCSPTR_SPB0DT;
136 else
137 r &= ~SCSPTR_SPB0DT;
138 SHREG_SCSPTR = r;
139 }
140
141
142 /*
143 * SIO pin is connected to SPB1DT.
144 * SPB1DT is output when SPB1IO is set.
145 */
146 static void
rtc_dir(struct rs5c313_softc * sc,int output)147 rtc_dir(struct rs5c313_softc *sc, int output)
148 {
149 uint8_t r = SHREG_SCSPTR;
150
151 if (output)
152 r |= SCSPTR_SPB1IO;
153 else
154 r &= ~SCSPTR_SPB1IO;
155 SHREG_SCSPTR = r;
156 }
157
158
159 /*
160 * Read bit from SPB1DT pin.
161 */
162 static int
rtc_read(struct rs5c313_softc * sc)163 rtc_read(struct rs5c313_softc *sc)
164 {
165 int bit;
166
167 ndelay(300);
168
169 bit = (SHREG_SCSPTR & SCSPTR_SPB1DT) ? 1 : 0;
170
171 rtc_clk(sc, 0);
172 ndelay(300);
173 rtc_clk(sc, 1);
174
175 return bit;
176 }
177
178
179 /*
180 * Write bit via SPB1DT pin.
181 */
182 static void
rtc_write(struct rs5c313_softc * sc,int bit)183 rtc_write(struct rs5c313_softc *sc, int bit)
184 {
185 uint8_t r = SHREG_SCSPTR;
186
187 if (bit)
188 r |= SCSPTR_SPB1DT;
189 else
190 r &= ~SCSPTR_SPB1DT;
191 SHREG_SCSPTR = r;
192
193 ndelay(300);
194
195 rtc_clk(sc, 0);
196 ndelay(300);
197 rtc_clk(sc, 1);
198 }
199