1@c Copyright (C) 2013-2014 Free Software Foundation, Inc.
2@c This is part of the GCC manual.
3@c For copying conditions, see the file gcc.texi.
4
5@subsubsection CRC32 intrinsics
6
7These intrinsics are available when the CRC32 architecture extension is
8specified, e.g. when the @option{-march=armv8-a+crc} switch is used, or when
9the target processor specified with @option{-mcpu} supports it.
10
11@itemize @bullet
12@item uint32_t __crc32b (uint32_t, uint8_t)
13@*@emph{Form of expected instruction(s):} @code{crc32b @var{r0}, @var{r0}, @var{r0}}
14@end itemize
15
16
17@itemize @bullet
18@item uint32_t __crc32h (uint32_t, uint16_t)
19@*@emph{Form of expected instruction(s):} @code{crc32h @var{r0}, @var{r0}, @var{r0}}
20@end itemize
21
22
23@itemize @bullet
24@item uint32_t __crc32w (uint32_t, uint32_t)
25@*@emph{Form of expected instruction(s):} @code{crc32w @var{r0}, @var{r0}, @var{r0}}
26@end itemize
27
28
29@itemize @bullet
30@item uint32_t __crc32d (uint32_t, uint64_t)
31@*@emph{Form of expected instruction(s):} Two @code{crc32w @var{r0}, @var{r0}, @var{r0}}
32instructions.
33@end itemize
34
35@itemize @bullet
36@item uint32_t __crc32cb (uint32_t, uint8_t)
37@*@emph{Form of expected instruction(s):} @code{crc32cb @var{r0}, @var{r0}, @var{r0}}
38@end itemize
39
40
41@itemize @bullet
42@item uint32_t __crc32ch (uint32_t, uint16_t)
43@*@emph{Form of expected instruction(s):} @code{crc32ch @var{r0}, @var{r0}, @var{r0}}
44@end itemize
45
46
47@itemize @bullet
48@item uint32_t __crc32cw (uint32_t, uint32_t)
49@*@emph{Form of expected instruction(s):} @code{crc32cw @var{r0}, @var{r0}, @var{r0}}
50@end itemize
51
52
53@itemize @bullet
54@item uint32_t __crc32cd (uint32_t, uint64_t)
55@*@emph{Form of expected instruction(s):} Two @code{crc32cw @var{r0}, @var{r0}, @var{r0}}
56instructions.
57@end itemize
58