1 /* $NetBSD: mp_11_0_sh_mask.h,v 1.2 2021/12/18 23:45:17 riastradh Exp $ */ 2 3 /* 4 * Copyright (C) 2018 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included 14 * in all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 20 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 24 #ifndef _mp_11_0_2_SH_MASK_HEADER 25 #define _mp_11_0_2_SH_MASK_HEADER 26 27 28 // addressBlock: mp_SmuMp0_SmnDec 29 //MP0_SMN_C2PMSG_32 30 #define MP0_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 31 #define MP0_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 32 //MP0_SMN_C2PMSG_33 33 #define MP0_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 34 #define MP0_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 35 //MP0_SMN_C2PMSG_34 36 #define MP0_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 37 #define MP0_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 38 //MP0_SMN_C2PMSG_35 39 #define MP0_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 40 #define MP0_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 41 //MP0_SMN_C2PMSG_36 42 #define MP0_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 43 #define MP0_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 44 //MP0_SMN_C2PMSG_37 45 #define MP0_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 46 #define MP0_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 47 //MP0_SMN_C2PMSG_38 48 #define MP0_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 49 #define MP0_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 50 //MP0_SMN_C2PMSG_39 51 #define MP0_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 52 #define MP0_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 53 //MP0_SMN_C2PMSG_40 54 #define MP0_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 55 #define MP0_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 56 //MP0_SMN_C2PMSG_41 57 #define MP0_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 58 #define MP0_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 59 //MP0_SMN_C2PMSG_42 60 #define MP0_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 61 #define MP0_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 62 //MP0_SMN_C2PMSG_43 63 #define MP0_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 64 #define MP0_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 65 //MP0_SMN_C2PMSG_44 66 #define MP0_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 67 #define MP0_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 68 //MP0_SMN_C2PMSG_45 69 #define MP0_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 70 #define MP0_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 71 //MP0_SMN_C2PMSG_46 72 #define MP0_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 73 #define MP0_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 74 //MP0_SMN_C2PMSG_47 75 #define MP0_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 76 #define MP0_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 77 //MP0_SMN_C2PMSG_48 78 #define MP0_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 79 #define MP0_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 80 //MP0_SMN_C2PMSG_49 81 #define MP0_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 82 #define MP0_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 83 //MP0_SMN_C2PMSG_50 84 #define MP0_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 85 #define MP0_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 86 //MP0_SMN_C2PMSG_51 87 #define MP0_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 88 #define MP0_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 89 //MP0_SMN_C2PMSG_52 90 #define MP0_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 91 #define MP0_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 92 //MP0_SMN_C2PMSG_53 93 #define MP0_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 94 #define MP0_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 95 //MP0_SMN_C2PMSG_54 96 #define MP0_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 97 #define MP0_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 98 //MP0_SMN_C2PMSG_55 99 #define MP0_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 100 #define MP0_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 101 //MP0_SMN_C2PMSG_56 102 #define MP0_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 103 #define MP0_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 104 //MP0_SMN_C2PMSG_57 105 #define MP0_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 106 #define MP0_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 107 //MP0_SMN_C2PMSG_58 108 #define MP0_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 109 #define MP0_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 110 //MP0_SMN_C2PMSG_59 111 #define MP0_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 112 #define MP0_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 113 //MP0_SMN_C2PMSG_60 114 #define MP0_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 115 #define MP0_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 116 //MP0_SMN_C2PMSG_61 117 #define MP0_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 118 #define MP0_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 119 //MP0_SMN_C2PMSG_62 120 #define MP0_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 121 #define MP0_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 122 //MP0_SMN_C2PMSG_63 123 #define MP0_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 124 #define MP0_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 125 //MP0_SMN_C2PMSG_64 126 #define MP0_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 127 #define MP0_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 128 //MP0_SMN_C2PMSG_65 129 #define MP0_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 130 #define MP0_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 131 //MP0_SMN_C2PMSG_66 132 #define MP0_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 133 #define MP0_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 134 //MP0_SMN_C2PMSG_67 135 #define MP0_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 136 #define MP0_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 137 //MP0_SMN_C2PMSG_68 138 #define MP0_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 139 #define MP0_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 140 //MP0_SMN_C2PMSG_69 141 #define MP0_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 142 #define MP0_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 143 //MP0_SMN_C2PMSG_70 144 #define MP0_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 145 #define MP0_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 146 //MP0_SMN_C2PMSG_71 147 #define MP0_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 148 #define MP0_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 149 //MP0_SMN_C2PMSG_72 150 #define MP0_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 151 #define MP0_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 152 //MP0_SMN_C2PMSG_73 153 #define MP0_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 154 #define MP0_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 155 //MP0_SMN_C2PMSG_74 156 #define MP0_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 157 #define MP0_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 158 //MP0_SMN_C2PMSG_75 159 #define MP0_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 160 #define MP0_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 161 //MP0_SMN_C2PMSG_76 162 #define MP0_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 163 #define MP0_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 164 //MP0_SMN_C2PMSG_77 165 #define MP0_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 166 #define MP0_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 167 //MP0_SMN_C2PMSG_78 168 #define MP0_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 169 #define MP0_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 170 //MP0_SMN_C2PMSG_79 171 #define MP0_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 172 #define MP0_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 173 //MP0_SMN_C2PMSG_80 174 #define MP0_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 175 #define MP0_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 176 //MP0_SMN_C2PMSG_81 177 #define MP0_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 178 #define MP0_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 179 //MP0_SMN_C2PMSG_82 180 #define MP0_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 181 #define MP0_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 182 //MP0_SMN_C2PMSG_83 183 #define MP0_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 184 #define MP0_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 185 //MP0_SMN_C2PMSG_84 186 #define MP0_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 187 #define MP0_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 188 //MP0_SMN_C2PMSG_85 189 #define MP0_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 190 #define MP0_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 191 //MP0_SMN_C2PMSG_86 192 #define MP0_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 193 #define MP0_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 194 //MP0_SMN_C2PMSG_87 195 #define MP0_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 196 #define MP0_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 197 //MP0_SMN_C2PMSG_88 198 #define MP0_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 199 #define MP0_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 200 //MP0_SMN_C2PMSG_89 201 #define MP0_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 202 #define MP0_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 203 //MP0_SMN_C2PMSG_90 204 #define MP0_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 205 #define MP0_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 206 //MP0_SMN_C2PMSG_91 207 #define MP0_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 208 #define MP0_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 209 //MP0_SMN_C2PMSG_92 210 #define MP0_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 211 #define MP0_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 212 //MP0_SMN_C2PMSG_93 213 #define MP0_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 214 #define MP0_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 215 //MP0_SMN_C2PMSG_94 216 #define MP0_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 217 #define MP0_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 218 //MP0_SMN_C2PMSG_95 219 #define MP0_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 220 #define MP0_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 221 //MP0_SMN_C2PMSG_96 222 #define MP0_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 223 #define MP0_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 224 //MP0_SMN_C2PMSG_97 225 #define MP0_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 226 #define MP0_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 227 //MP0_SMN_C2PMSG_98 228 #define MP0_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 229 #define MP0_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 230 //MP0_SMN_C2PMSG_99 231 #define MP0_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 232 #define MP0_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 233 //MP0_SMN_C2PMSG_100 234 #define MP0_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 235 #define MP0_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 236 //MP0_SMN_C2PMSG_101 237 #define MP0_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 238 #define MP0_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 239 //MP0_SMN_C2PMSG_102 240 #define MP0_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 241 #define MP0_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 242 //MP0_SMN_C2PMSG_103 243 #define MP0_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 244 #define MP0_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 245 //MP0_SMN_ACTIVE_FCN_ID 246 #define MP0_SMN_ACTIVE_FCN_ID__VFID__SHIFT 0x0 247 #define MP0_SMN_ACTIVE_FCN_ID__VF__SHIFT 0x1f 248 #define MP0_SMN_ACTIVE_FCN_ID__VFID_MASK 0x0000001FL 249 #define MP0_SMN_ACTIVE_FCN_ID__VF_MASK 0x80000000L 250 //MP0_SMN_IH_CREDIT 251 #define MP0_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 252 #define MP0_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 253 #define MP0_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 254 #define MP0_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 255 //MP0_SMN_IH_SW_INT 256 #define MP0_SMN_IH_SW_INT__ID__SHIFT 0x0 257 #define MP0_SMN_IH_SW_INT__VALID__SHIFT 0x8 258 #define MP0_SMN_IH_SW_INT__ID_MASK 0x000000FFL 259 #define MP0_SMN_IH_SW_INT__VALID_MASK 0x00000100L 260 //MP0_SMN_IH_SW_INT_CTRL 261 #define MP0_SMN_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 262 #define MP0_SMN_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 263 #define MP0_SMN_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 264 #define MP0_SMN_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 265 266 267 //MP1_FIRMWARE_FLAGS 268 #define MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED__SHIFT 0x0 269 #define MP1_FIRMWARE_FLAGS__RESERVED__SHIFT 0x1 270 #define MP1_FIRMWARE_FLAGS__INTERRUPTS_ENABLED_MASK 0x00000001L 271 #define MP1_FIRMWARE_FLAGS__RESERVED_MASK 0xFFFFFFFEL 272 //MP1_PUB_SCRATCH0 273 #define MP1_PUB_SCRATCH0__DATA__SHIFT 0x0 274 #define MP1_PUB_SCRATCH0__DATA_MASK 0xFFFFFFFFL 275 //MP1_PUB_SCRATCH1 276 #define MP1_PUB_SCRATCH1__DATA__SHIFT 0x0 277 #define MP1_PUB_SCRATCH1__DATA_MASK 0xFFFFFFFFL 278 //MP1_PUB_SCRATCH2 279 #define MP1_PUB_SCRATCH2__DATA__SHIFT 0x0 280 #define MP1_PUB_SCRATCH2__DATA_MASK 0xFFFFFFFFL 281 //MP1_PUB_SCRATCH3 282 #define MP1_PUB_SCRATCH3__DATA__SHIFT 0x0 283 #define MP1_PUB_SCRATCH3__DATA_MASK 0xFFFFFFFFL 284 //MP1_C2PMSG_0 285 #define MP1_C2PMSG_0__CONTENT__SHIFT 0x0 286 #define MP1_C2PMSG_0__CONTENT_MASK 0xFFFFFFFFL 287 //MP1_C2PMSG_1 288 #define MP1_C2PMSG_1__CONTENT__SHIFT 0x0 289 #define MP1_C2PMSG_1__CONTENT_MASK 0xFFFFFFFFL 290 //MP1_C2PMSG_2 291 #define MP1_C2PMSG_2__CONTENT__SHIFT 0x0 292 #define MP1_C2PMSG_2__CONTENT_MASK 0xFFFFFFFFL 293 //MP1_C2PMSG_3 294 #define MP1_C2PMSG_3__CONTENT__SHIFT 0x0 295 #define MP1_C2PMSG_3__CONTENT_MASK 0xFFFFFFFFL 296 //MP1_C2PMSG_4 297 #define MP1_C2PMSG_4__CONTENT__SHIFT 0x0 298 #define MP1_C2PMSG_4__CONTENT_MASK 0xFFFFFFFFL 299 //MP1_C2PMSG_5 300 #define MP1_C2PMSG_5__CONTENT__SHIFT 0x0 301 #define MP1_C2PMSG_5__CONTENT_MASK 0xFFFFFFFFL 302 //MP1_C2PMSG_6 303 #define MP1_C2PMSG_6__CONTENT__SHIFT 0x0 304 #define MP1_C2PMSG_6__CONTENT_MASK 0xFFFFFFFFL 305 //MP1_C2PMSG_7 306 #define MP1_C2PMSG_7__CONTENT__SHIFT 0x0 307 #define MP1_C2PMSG_7__CONTENT_MASK 0xFFFFFFFFL 308 //MP1_C2PMSG_8 309 #define MP1_C2PMSG_8__CONTENT__SHIFT 0x0 310 #define MP1_C2PMSG_8__CONTENT_MASK 0xFFFFFFFFL 311 //MP1_C2PMSG_9 312 #define MP1_C2PMSG_9__CONTENT__SHIFT 0x0 313 #define MP1_C2PMSG_9__CONTENT_MASK 0xFFFFFFFFL 314 //MP1_C2PMSG_10 315 #define MP1_C2PMSG_10__CONTENT__SHIFT 0x0 316 #define MP1_C2PMSG_10__CONTENT_MASK 0xFFFFFFFFL 317 //MP1_C2PMSG_11 318 #define MP1_C2PMSG_11__CONTENT__SHIFT 0x0 319 #define MP1_C2PMSG_11__CONTENT_MASK 0xFFFFFFFFL 320 //MP1_C2PMSG_12 321 #define MP1_C2PMSG_12__CONTENT__SHIFT 0x0 322 #define MP1_C2PMSG_12__CONTENT_MASK 0xFFFFFFFFL 323 //MP1_C2PMSG_13 324 #define MP1_C2PMSG_13__CONTENT__SHIFT 0x0 325 #define MP1_C2PMSG_13__CONTENT_MASK 0xFFFFFFFFL 326 //MP1_C2PMSG_14 327 #define MP1_C2PMSG_14__CONTENT__SHIFT 0x0 328 #define MP1_C2PMSG_14__CONTENT_MASK 0xFFFFFFFFL 329 //MP1_C2PMSG_15 330 #define MP1_C2PMSG_15__CONTENT__SHIFT 0x0 331 #define MP1_C2PMSG_15__CONTENT_MASK 0xFFFFFFFFL 332 //MP1_C2PMSG_16 333 #define MP1_C2PMSG_16__CONTENT__SHIFT 0x0 334 #define MP1_C2PMSG_16__CONTENT_MASK 0xFFFFFFFFL 335 //MP1_C2PMSG_17 336 #define MP1_C2PMSG_17__CONTENT__SHIFT 0x0 337 #define MP1_C2PMSG_17__CONTENT_MASK 0xFFFFFFFFL 338 //MP1_C2PMSG_18 339 #define MP1_C2PMSG_18__CONTENT__SHIFT 0x0 340 #define MP1_C2PMSG_18__CONTENT_MASK 0xFFFFFFFFL 341 //MP1_C2PMSG_19 342 #define MP1_C2PMSG_19__CONTENT__SHIFT 0x0 343 #define MP1_C2PMSG_19__CONTENT_MASK 0xFFFFFFFFL 344 //MP1_C2PMSG_20 345 #define MP1_C2PMSG_20__CONTENT__SHIFT 0x0 346 #define MP1_C2PMSG_20__CONTENT_MASK 0xFFFFFFFFL 347 //MP1_C2PMSG_21 348 #define MP1_C2PMSG_21__CONTENT__SHIFT 0x0 349 #define MP1_C2PMSG_21__CONTENT_MASK 0xFFFFFFFFL 350 //MP1_C2PMSG_22 351 #define MP1_C2PMSG_22__CONTENT__SHIFT 0x0 352 #define MP1_C2PMSG_22__CONTENT_MASK 0xFFFFFFFFL 353 //MP1_C2PMSG_23 354 #define MP1_C2PMSG_23__CONTENT__SHIFT 0x0 355 #define MP1_C2PMSG_23__CONTENT_MASK 0xFFFFFFFFL 356 //MP1_C2PMSG_24 357 #define MP1_C2PMSG_24__CONTENT__SHIFT 0x0 358 #define MP1_C2PMSG_24__CONTENT_MASK 0xFFFFFFFFL 359 //MP1_C2PMSG_25 360 #define MP1_C2PMSG_25__CONTENT__SHIFT 0x0 361 #define MP1_C2PMSG_25__CONTENT_MASK 0xFFFFFFFFL 362 //MP1_C2PMSG_26 363 #define MP1_C2PMSG_26__CONTENT__SHIFT 0x0 364 #define MP1_C2PMSG_26__CONTENT_MASK 0xFFFFFFFFL 365 //MP1_C2PMSG_27 366 #define MP1_C2PMSG_27__CONTENT__SHIFT 0x0 367 #define MP1_C2PMSG_27__CONTENT_MASK 0xFFFFFFFFL 368 //MP1_C2PMSG_28 369 #define MP1_C2PMSG_28__CONTENT__SHIFT 0x0 370 #define MP1_C2PMSG_28__CONTENT_MASK 0xFFFFFFFFL 371 //MP1_C2PMSG_29 372 #define MP1_C2PMSG_29__CONTENT__SHIFT 0x0 373 #define MP1_C2PMSG_29__CONTENT_MASK 0xFFFFFFFFL 374 //MP1_C2PMSG_30 375 #define MP1_C2PMSG_30__CONTENT__SHIFT 0x0 376 #define MP1_C2PMSG_30__CONTENT_MASK 0xFFFFFFFFL 377 //MP1_C2PMSG_31 378 #define MP1_C2PMSG_31__CONTENT__SHIFT 0x0 379 #define MP1_C2PMSG_31__CONTENT_MASK 0xFFFFFFFFL 380 //MP1_P2CMSG_0 381 #define MP1_P2CMSG_0__CONTENT__SHIFT 0x0 382 #define MP1_P2CMSG_0__CONTENT_MASK 0xFFFFFFFFL 383 //MP1_P2CMSG_1 384 #define MP1_P2CMSG_1__CONTENT__SHIFT 0x0 385 #define MP1_P2CMSG_1__CONTENT_MASK 0xFFFFFFFFL 386 //MP1_P2CMSG_2 387 #define MP1_P2CMSG_2__CONTENT__SHIFT 0x0 388 #define MP1_P2CMSG_2__CONTENT_MASK 0xFFFFFFFFL 389 //MP1_P2CMSG_3 390 #define MP1_P2CMSG_3__CONTENT__SHIFT 0x0 391 #define MP1_P2CMSG_3__CONTENT_MASK 0xFFFFFFFFL 392 //MP1_P2CMSG_INTEN 393 #define MP1_P2CMSG_INTEN__INTEN__SHIFT 0x0 394 #define MP1_P2CMSG_INTEN__INTEN_MASK 0x0000000FL 395 //MP1_P2CMSG_INTSTS 396 #define MP1_P2CMSG_INTSTS__INTSTS0__SHIFT 0x0 397 #define MP1_P2CMSG_INTSTS__INTSTS1__SHIFT 0x1 398 #define MP1_P2CMSG_INTSTS__INTSTS2__SHIFT 0x2 399 #define MP1_P2CMSG_INTSTS__INTSTS3__SHIFT 0x3 400 #define MP1_P2CMSG_INTSTS__INTSTS0_MASK 0x00000001L 401 #define MP1_P2CMSG_INTSTS__INTSTS1_MASK 0x00000002L 402 #define MP1_P2CMSG_INTSTS__INTSTS2_MASK 0x00000004L 403 #define MP1_P2CMSG_INTSTS__INTSTS3_MASK 0x00000008L 404 //MP1_P2SMSG_0 405 #define MP1_P2SMSG_0__CONTENT__SHIFT 0x0 406 #define MP1_P2SMSG_0__CONTENT_MASK 0xFFFFFFFFL 407 //MP1_P2SMSG_1 408 #define MP1_P2SMSG_1__CONTENT__SHIFT 0x0 409 #define MP1_P2SMSG_1__CONTENT_MASK 0xFFFFFFFFL 410 //MP1_P2SMSG_2 411 #define MP1_P2SMSG_2__CONTENT__SHIFT 0x0 412 #define MP1_P2SMSG_2__CONTENT_MASK 0xFFFFFFFFL 413 //MP1_P2SMSG_3 414 #define MP1_P2SMSG_3__CONTENT__SHIFT 0x0 415 #define MP1_P2SMSG_3__CONTENT_MASK 0xFFFFFFFFL 416 //MP1_P2SMSG_INTSTS 417 #define MP1_P2SMSG_INTSTS__INTSTS0__SHIFT 0x0 418 #define MP1_P2SMSG_INTSTS__INTSTS1__SHIFT 0x1 419 #define MP1_P2SMSG_INTSTS__INTSTS2__SHIFT 0x2 420 #define MP1_P2SMSG_INTSTS__INTSTS3__SHIFT 0x3 421 #define MP1_P2SMSG_INTSTS__INTSTS0_MASK 0x00000001L 422 #define MP1_P2SMSG_INTSTS__INTSTS1_MASK 0x00000002L 423 #define MP1_P2SMSG_INTSTS__INTSTS2_MASK 0x00000004L 424 #define MP1_P2SMSG_INTSTS__INTSTS3_MASK 0x00000008L 425 //MP1_S2PMSG_0 426 #define MP1_S2PMSG_0__CONTENT__SHIFT 0x0 427 #define MP1_S2PMSG_0__CONTENT_MASK 0xFFFFFFFFL 428 //MP1_C2PMSG_32 429 #define MP1_C2PMSG_32__CONTENT__SHIFT 0x0 430 #define MP1_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 431 //MP1_C2PMSG_33 432 #define MP1_C2PMSG_33__CONTENT__SHIFT 0x0 433 #define MP1_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 434 //MP1_C2PMSG_34 435 #define MP1_C2PMSG_34__CONTENT__SHIFT 0x0 436 #define MP1_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 437 //MP1_C2PMSG_35 438 #define MP1_C2PMSG_35__CONTENT__SHIFT 0x0 439 #define MP1_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 440 //MP1_C2PMSG_36 441 #define MP1_C2PMSG_36__CONTENT__SHIFT 0x0 442 #define MP1_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 443 //MP1_C2PMSG_37 444 #define MP1_C2PMSG_37__CONTENT__SHIFT 0x0 445 #define MP1_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 446 //MP1_C2PMSG_38 447 #define MP1_C2PMSG_38__CONTENT__SHIFT 0x0 448 #define MP1_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 449 //MP1_C2PMSG_39 450 #define MP1_C2PMSG_39__CONTENT__SHIFT 0x0 451 #define MP1_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 452 //MP1_C2PMSG_40 453 #define MP1_C2PMSG_40__CONTENT__SHIFT 0x0 454 #define MP1_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 455 //MP1_C2PMSG_41 456 #define MP1_C2PMSG_41__CONTENT__SHIFT 0x0 457 #define MP1_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 458 //MP1_C2PMSG_42 459 #define MP1_C2PMSG_42__CONTENT__SHIFT 0x0 460 #define MP1_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 461 //MP1_C2PMSG_43 462 #define MP1_C2PMSG_43__CONTENT__SHIFT 0x0 463 #define MP1_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 464 //MP1_C2PMSG_44 465 #define MP1_C2PMSG_44__CONTENT__SHIFT 0x0 466 #define MP1_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 467 //MP1_C2PMSG_45 468 #define MP1_C2PMSG_45__CONTENT__SHIFT 0x0 469 #define MP1_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 470 //MP1_C2PMSG_46 471 #define MP1_C2PMSG_46__CONTENT__SHIFT 0x0 472 #define MP1_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 473 //MP1_C2PMSG_47 474 #define MP1_C2PMSG_47__CONTENT__SHIFT 0x0 475 #define MP1_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 476 //MP1_C2PMSG_48 477 #define MP1_C2PMSG_48__CONTENT__SHIFT 0x0 478 #define MP1_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 479 //MP1_C2PMSG_49 480 #define MP1_C2PMSG_49__CONTENT__SHIFT 0x0 481 #define MP1_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 482 //MP1_C2PMSG_50 483 #define MP1_C2PMSG_50__CONTENT__SHIFT 0x0 484 #define MP1_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 485 //MP1_C2PMSG_51 486 #define MP1_C2PMSG_51__CONTENT__SHIFT 0x0 487 #define MP1_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 488 //MP1_C2PMSG_52 489 #define MP1_C2PMSG_52__CONTENT__SHIFT 0x0 490 #define MP1_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 491 //MP1_C2PMSG_53 492 #define MP1_C2PMSG_53__CONTENT__SHIFT 0x0 493 #define MP1_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 494 //MP1_C2PMSG_54 495 #define MP1_C2PMSG_54__CONTENT__SHIFT 0x0 496 #define MP1_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 497 //MP1_C2PMSG_55 498 #define MP1_C2PMSG_55__CONTENT__SHIFT 0x0 499 #define MP1_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 500 //MP1_C2PMSG_56 501 #define MP1_C2PMSG_56__CONTENT__SHIFT 0x0 502 #define MP1_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 503 //MP1_C2PMSG_57 504 #define MP1_C2PMSG_57__CONTENT__SHIFT 0x0 505 #define MP1_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 506 //MP1_C2PMSG_58 507 #define MP1_C2PMSG_58__CONTENT__SHIFT 0x0 508 #define MP1_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 509 //MP1_C2PMSG_59 510 #define MP1_C2PMSG_59__CONTENT__SHIFT 0x0 511 #define MP1_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 512 //MP1_C2PMSG_60 513 #define MP1_C2PMSG_60__CONTENT__SHIFT 0x0 514 #define MP1_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 515 //MP1_C2PMSG_61 516 #define MP1_C2PMSG_61__CONTENT__SHIFT 0x0 517 #define MP1_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 518 //MP1_C2PMSG_62 519 #define MP1_C2PMSG_62__CONTENT__SHIFT 0x0 520 #define MP1_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 521 //MP1_C2PMSG_63 522 #define MP1_C2PMSG_63__CONTENT__SHIFT 0x0 523 #define MP1_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 524 //MP1_C2PMSG_64 525 #define MP1_C2PMSG_64__CONTENT__SHIFT 0x0 526 #define MP1_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 527 //MP1_C2PMSG_65 528 #define MP1_C2PMSG_65__CONTENT__SHIFT 0x0 529 #define MP1_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 530 //MP1_C2PMSG_66 531 #define MP1_C2PMSG_66__CONTENT__SHIFT 0x0 532 #define MP1_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 533 //MP1_C2PMSG_67 534 #define MP1_C2PMSG_67__CONTENT__SHIFT 0x0 535 #define MP1_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 536 //MP1_C2PMSG_68 537 #define MP1_C2PMSG_68__CONTENT__SHIFT 0x0 538 #define MP1_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 539 //MP1_C2PMSG_69 540 #define MP1_C2PMSG_69__CONTENT__SHIFT 0x0 541 #define MP1_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 542 //MP1_C2PMSG_70 543 #define MP1_C2PMSG_70__CONTENT__SHIFT 0x0 544 #define MP1_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 545 //MP1_C2PMSG_71 546 #define MP1_C2PMSG_71__CONTENT__SHIFT 0x0 547 #define MP1_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 548 //MP1_C2PMSG_72 549 #define MP1_C2PMSG_72__CONTENT__SHIFT 0x0 550 #define MP1_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 551 //MP1_C2PMSG_73 552 #define MP1_C2PMSG_73__CONTENT__SHIFT 0x0 553 #define MP1_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 554 //MP1_C2PMSG_74 555 #define MP1_C2PMSG_74__CONTENT__SHIFT 0x0 556 #define MP1_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 557 //MP1_C2PMSG_75 558 #define MP1_C2PMSG_75__CONTENT__SHIFT 0x0 559 #define MP1_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 560 //MP1_C2PMSG_76 561 #define MP1_C2PMSG_76__CONTENT__SHIFT 0x0 562 #define MP1_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 563 //MP1_C2PMSG_77 564 #define MP1_C2PMSG_77__CONTENT__SHIFT 0x0 565 #define MP1_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 566 //MP1_C2PMSG_78 567 #define MP1_C2PMSG_78__CONTENT__SHIFT 0x0 568 #define MP1_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 569 //MP1_C2PMSG_79 570 #define MP1_C2PMSG_79__CONTENT__SHIFT 0x0 571 #define MP1_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 572 //MP1_C2PMSG_80 573 #define MP1_C2PMSG_80__CONTENT__SHIFT 0x0 574 #define MP1_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 575 //MP1_C2PMSG_81 576 #define MP1_C2PMSG_81__CONTENT__SHIFT 0x0 577 #define MP1_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 578 //MP1_C2PMSG_82 579 #define MP1_C2PMSG_82__CONTENT__SHIFT 0x0 580 #define MP1_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 581 //MP1_C2PMSG_83 582 #define MP1_C2PMSG_83__CONTENT__SHIFT 0x0 583 #define MP1_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 584 //MP1_C2PMSG_84 585 #define MP1_C2PMSG_84__CONTENT__SHIFT 0x0 586 #define MP1_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 587 //MP1_C2PMSG_85 588 #define MP1_C2PMSG_85__CONTENT__SHIFT 0x0 589 #define MP1_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 590 //MP1_C2PMSG_86 591 #define MP1_C2PMSG_86__CONTENT__SHIFT 0x0 592 #define MP1_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 593 //MP1_C2PMSG_87 594 #define MP1_C2PMSG_87__CONTENT__SHIFT 0x0 595 #define MP1_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 596 //MP1_C2PMSG_88 597 #define MP1_C2PMSG_88__CONTENT__SHIFT 0x0 598 #define MP1_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 599 //MP1_C2PMSG_89 600 #define MP1_C2PMSG_89__CONTENT__SHIFT 0x0 601 #define MP1_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 602 //MP1_C2PMSG_90 603 #define MP1_C2PMSG_90__CONTENT__SHIFT 0x0 604 #define MP1_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 605 //MP1_C2PMSG_91 606 #define MP1_C2PMSG_91__CONTENT__SHIFT 0x0 607 #define MP1_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 608 //MP1_C2PMSG_92 609 #define MP1_C2PMSG_92__CONTENT__SHIFT 0x0 610 #define MP1_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 611 //MP1_C2PMSG_93 612 #define MP1_C2PMSG_93__CONTENT__SHIFT 0x0 613 #define MP1_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 614 //MP1_C2PMSG_94 615 #define MP1_C2PMSG_94__CONTENT__SHIFT 0x0 616 #define MP1_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 617 //MP1_C2PMSG_95 618 #define MP1_C2PMSG_95__CONTENT__SHIFT 0x0 619 #define MP1_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 620 //MP1_C2PMSG_96 621 #define MP1_C2PMSG_96__CONTENT__SHIFT 0x0 622 #define MP1_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 623 //MP1_C2PMSG_97 624 #define MP1_C2PMSG_97__CONTENT__SHIFT 0x0 625 #define MP1_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 626 //MP1_C2PMSG_98 627 #define MP1_C2PMSG_98__CONTENT__SHIFT 0x0 628 #define MP1_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 629 //MP1_C2PMSG_99 630 #define MP1_C2PMSG_99__CONTENT__SHIFT 0x0 631 #define MP1_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 632 //MP1_C2PMSG_100 633 #define MP1_C2PMSG_100__CONTENT__SHIFT 0x0 634 #define MP1_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 635 //MP1_C2PMSG_101 636 #define MP1_C2PMSG_101__CONTENT__SHIFT 0x0 637 #define MP1_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 638 //MP1_C2PMSG_102 639 #define MP1_C2PMSG_102__CONTENT__SHIFT 0x0 640 #define MP1_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 641 //MP1_C2PMSG_103 642 #define MP1_C2PMSG_103__CONTENT__SHIFT 0x0 643 #define MP1_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 644 //MP1_ACTIVE_FCN_ID 645 #define MP1_ACTIVE_FCN_ID__VFID__SHIFT 0x0 646 #define MP1_ACTIVE_FCN_ID__VF__SHIFT 0x1f 647 #define MP1_ACTIVE_FCN_ID__VFID_MASK 0x0000001FL 648 #define MP1_ACTIVE_FCN_ID__VF_MASK 0x80000000L 649 //MP1_IH_CREDIT 650 #define MP1_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 651 #define MP1_IH_CREDIT__CLIENT_ID__SHIFT 0x10 652 #define MP1_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 653 #define MP1_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 654 //MP1_IH_SW_INT 655 #define MP1_IH_SW_INT__ID__SHIFT 0x0 656 #define MP1_IH_SW_INT__VALID__SHIFT 0x8 657 #define MP1_IH_SW_INT__ID_MASK 0x000000FFL 658 #define MP1_IH_SW_INT__VALID_MASK 0x00000100L 659 //MP1_IH_SW_INT_CTRL 660 #define MP1_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 661 #define MP1_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 662 #define MP1_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 663 #define MP1_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 664 //MP1_FPS_CNT 665 #define MP1_FPS_CNT__COUNT__SHIFT 0x0 666 #define MP1_FPS_CNT__COUNT_MASK 0xFFFFFFFFL 667 //MP1_PUB_CTRL 668 #define MP1_PUB_CTRL__RESET__SHIFT 0x0 669 #define MP1_PUB_CTRL__RESET_MASK 0x00000001L 670 //MP1_EXT_SCRATCH0 671 #define MP1_EXT_SCRATCH0__DATA__SHIFT 0x0 672 #define MP1_EXT_SCRATCH0__DATA_MASK 0xFFFFFFFFL 673 //MP1_EXT_SCRATCH1 674 #define MP1_EXT_SCRATCH1__DATA__SHIFT 0x0 675 #define MP1_EXT_SCRATCH1__DATA_MASK 0xFFFFFFFFL 676 //MP1_EXT_SCRATCH2 677 #define MP1_EXT_SCRATCH2__DATA__SHIFT 0x0 678 #define MP1_EXT_SCRATCH2__DATA_MASK 0xFFFFFFFFL 679 //MP1_EXT_SCRATCH3 680 #define MP1_EXT_SCRATCH3__DATA__SHIFT 0x0 681 #define MP1_EXT_SCRATCH3__DATA_MASK 0xFFFFFFFFL 682 //MP1_EXT_SCRATCH4 683 #define MP1_EXT_SCRATCH4__DATA__SHIFT 0x0 684 #define MP1_EXT_SCRATCH4__DATA_MASK 0xFFFFFFFFL 685 //MP1_EXT_SCRATCH5 686 #define MP1_EXT_SCRATCH5__DATA__SHIFT 0x0 687 #define MP1_EXT_SCRATCH5__DATA_MASK 0xFFFFFFFFL 688 //MP1_EXT_SCRATCH6 689 #define MP1_EXT_SCRATCH6__DATA__SHIFT 0x0 690 #define MP1_EXT_SCRATCH6__DATA_MASK 0xFFFFFFFFL 691 //MP1_EXT_SCRATCH7 692 #define MP1_EXT_SCRATCH7__DATA__SHIFT 0x0 693 #define MP1_EXT_SCRATCH7__DATA_MASK 0xFFFFFFFFL 694 695 696 // addressBlock: mp_SmuMp1_SmnDec 697 //MP1_SMN_C2PMSG_32 698 #define MP1_SMN_C2PMSG_32__CONTENT__SHIFT 0x0 699 #define MP1_SMN_C2PMSG_32__CONTENT_MASK 0xFFFFFFFFL 700 //MP1_SMN_C2PMSG_33 701 #define MP1_SMN_C2PMSG_33__CONTENT__SHIFT 0x0 702 #define MP1_SMN_C2PMSG_33__CONTENT_MASK 0xFFFFFFFFL 703 //MP1_SMN_C2PMSG_34 704 #define MP1_SMN_C2PMSG_34__CONTENT__SHIFT 0x0 705 #define MP1_SMN_C2PMSG_34__CONTENT_MASK 0xFFFFFFFFL 706 //MP1_SMN_C2PMSG_35 707 #define MP1_SMN_C2PMSG_35__CONTENT__SHIFT 0x0 708 #define MP1_SMN_C2PMSG_35__CONTENT_MASK 0xFFFFFFFFL 709 //MP1_SMN_C2PMSG_36 710 #define MP1_SMN_C2PMSG_36__CONTENT__SHIFT 0x0 711 #define MP1_SMN_C2PMSG_36__CONTENT_MASK 0xFFFFFFFFL 712 //MP1_SMN_C2PMSG_37 713 #define MP1_SMN_C2PMSG_37__CONTENT__SHIFT 0x0 714 #define MP1_SMN_C2PMSG_37__CONTENT_MASK 0xFFFFFFFFL 715 //MP1_SMN_C2PMSG_38 716 #define MP1_SMN_C2PMSG_38__CONTENT__SHIFT 0x0 717 #define MP1_SMN_C2PMSG_38__CONTENT_MASK 0xFFFFFFFFL 718 //MP1_SMN_C2PMSG_39 719 #define MP1_SMN_C2PMSG_39__CONTENT__SHIFT 0x0 720 #define MP1_SMN_C2PMSG_39__CONTENT_MASK 0xFFFFFFFFL 721 //MP1_SMN_C2PMSG_40 722 #define MP1_SMN_C2PMSG_40__CONTENT__SHIFT 0x0 723 #define MP1_SMN_C2PMSG_40__CONTENT_MASK 0xFFFFFFFFL 724 //MP1_SMN_C2PMSG_41 725 #define MP1_SMN_C2PMSG_41__CONTENT__SHIFT 0x0 726 #define MP1_SMN_C2PMSG_41__CONTENT_MASK 0xFFFFFFFFL 727 //MP1_SMN_C2PMSG_42 728 #define MP1_SMN_C2PMSG_42__CONTENT__SHIFT 0x0 729 #define MP1_SMN_C2PMSG_42__CONTENT_MASK 0xFFFFFFFFL 730 //MP1_SMN_C2PMSG_43 731 #define MP1_SMN_C2PMSG_43__CONTENT__SHIFT 0x0 732 #define MP1_SMN_C2PMSG_43__CONTENT_MASK 0xFFFFFFFFL 733 //MP1_SMN_C2PMSG_44 734 #define MP1_SMN_C2PMSG_44__CONTENT__SHIFT 0x0 735 #define MP1_SMN_C2PMSG_44__CONTENT_MASK 0xFFFFFFFFL 736 //MP1_SMN_C2PMSG_45 737 #define MP1_SMN_C2PMSG_45__CONTENT__SHIFT 0x0 738 #define MP1_SMN_C2PMSG_45__CONTENT_MASK 0xFFFFFFFFL 739 //MP1_SMN_C2PMSG_46 740 #define MP1_SMN_C2PMSG_46__CONTENT__SHIFT 0x0 741 #define MP1_SMN_C2PMSG_46__CONTENT_MASK 0xFFFFFFFFL 742 //MP1_SMN_C2PMSG_47 743 #define MP1_SMN_C2PMSG_47__CONTENT__SHIFT 0x0 744 #define MP1_SMN_C2PMSG_47__CONTENT_MASK 0xFFFFFFFFL 745 //MP1_SMN_C2PMSG_48 746 #define MP1_SMN_C2PMSG_48__CONTENT__SHIFT 0x0 747 #define MP1_SMN_C2PMSG_48__CONTENT_MASK 0xFFFFFFFFL 748 //MP1_SMN_C2PMSG_49 749 #define MP1_SMN_C2PMSG_49__CONTENT__SHIFT 0x0 750 #define MP1_SMN_C2PMSG_49__CONTENT_MASK 0xFFFFFFFFL 751 //MP1_SMN_C2PMSG_50 752 #define MP1_SMN_C2PMSG_50__CONTENT__SHIFT 0x0 753 #define MP1_SMN_C2PMSG_50__CONTENT_MASK 0xFFFFFFFFL 754 //MP1_SMN_C2PMSG_51 755 #define MP1_SMN_C2PMSG_51__CONTENT__SHIFT 0x0 756 #define MP1_SMN_C2PMSG_51__CONTENT_MASK 0xFFFFFFFFL 757 //MP1_SMN_C2PMSG_52 758 #define MP1_SMN_C2PMSG_52__CONTENT__SHIFT 0x0 759 #define MP1_SMN_C2PMSG_52__CONTENT_MASK 0xFFFFFFFFL 760 //MP1_SMN_C2PMSG_53 761 #define MP1_SMN_C2PMSG_53__CONTENT__SHIFT 0x0 762 #define MP1_SMN_C2PMSG_53__CONTENT_MASK 0xFFFFFFFFL 763 //MP1_SMN_C2PMSG_54 764 #define MP1_SMN_C2PMSG_54__CONTENT__SHIFT 0x0 765 #define MP1_SMN_C2PMSG_54__CONTENT_MASK 0xFFFFFFFFL 766 //MP1_SMN_C2PMSG_55 767 #define MP1_SMN_C2PMSG_55__CONTENT__SHIFT 0x0 768 #define MP1_SMN_C2PMSG_55__CONTENT_MASK 0xFFFFFFFFL 769 //MP1_SMN_C2PMSG_56 770 #define MP1_SMN_C2PMSG_56__CONTENT__SHIFT 0x0 771 #define MP1_SMN_C2PMSG_56__CONTENT_MASK 0xFFFFFFFFL 772 //MP1_SMN_C2PMSG_57 773 #define MP1_SMN_C2PMSG_57__CONTENT__SHIFT 0x0 774 #define MP1_SMN_C2PMSG_57__CONTENT_MASK 0xFFFFFFFFL 775 //MP1_SMN_C2PMSG_58 776 #define MP1_SMN_C2PMSG_58__CONTENT__SHIFT 0x0 777 #define MP1_SMN_C2PMSG_58__CONTENT_MASK 0xFFFFFFFFL 778 //MP1_SMN_C2PMSG_59 779 #define MP1_SMN_C2PMSG_59__CONTENT__SHIFT 0x0 780 #define MP1_SMN_C2PMSG_59__CONTENT_MASK 0xFFFFFFFFL 781 //MP1_SMN_C2PMSG_60 782 #define MP1_SMN_C2PMSG_60__CONTENT__SHIFT 0x0 783 #define MP1_SMN_C2PMSG_60__CONTENT_MASK 0xFFFFFFFFL 784 //MP1_SMN_C2PMSG_61 785 #define MP1_SMN_C2PMSG_61__CONTENT__SHIFT 0x0 786 #define MP1_SMN_C2PMSG_61__CONTENT_MASK 0xFFFFFFFFL 787 //MP1_SMN_C2PMSG_62 788 #define MP1_SMN_C2PMSG_62__CONTENT__SHIFT 0x0 789 #define MP1_SMN_C2PMSG_62__CONTENT_MASK 0xFFFFFFFFL 790 //MP1_SMN_C2PMSG_63 791 #define MP1_SMN_C2PMSG_63__CONTENT__SHIFT 0x0 792 #define MP1_SMN_C2PMSG_63__CONTENT_MASK 0xFFFFFFFFL 793 //MP1_SMN_C2PMSG_64 794 #define MP1_SMN_C2PMSG_64__CONTENT__SHIFT 0x0 795 #define MP1_SMN_C2PMSG_64__CONTENT_MASK 0xFFFFFFFFL 796 //MP1_SMN_C2PMSG_65 797 #define MP1_SMN_C2PMSG_65__CONTENT__SHIFT 0x0 798 #define MP1_SMN_C2PMSG_65__CONTENT_MASK 0xFFFFFFFFL 799 //MP1_SMN_C2PMSG_66 800 #define MP1_SMN_C2PMSG_66__CONTENT__SHIFT 0x0 801 #define MP1_SMN_C2PMSG_66__CONTENT_MASK 0xFFFFFFFFL 802 //MP1_SMN_C2PMSG_67 803 #define MP1_SMN_C2PMSG_67__CONTENT__SHIFT 0x0 804 #define MP1_SMN_C2PMSG_67__CONTENT_MASK 0xFFFFFFFFL 805 //MP1_SMN_C2PMSG_68 806 #define MP1_SMN_C2PMSG_68__CONTENT__SHIFT 0x0 807 #define MP1_SMN_C2PMSG_68__CONTENT_MASK 0xFFFFFFFFL 808 //MP1_SMN_C2PMSG_69 809 #define MP1_SMN_C2PMSG_69__CONTENT__SHIFT 0x0 810 #define MP1_SMN_C2PMSG_69__CONTENT_MASK 0xFFFFFFFFL 811 //MP1_SMN_C2PMSG_70 812 #define MP1_SMN_C2PMSG_70__CONTENT__SHIFT 0x0 813 #define MP1_SMN_C2PMSG_70__CONTENT_MASK 0xFFFFFFFFL 814 //MP1_SMN_C2PMSG_71 815 #define MP1_SMN_C2PMSG_71__CONTENT__SHIFT 0x0 816 #define MP1_SMN_C2PMSG_71__CONTENT_MASK 0xFFFFFFFFL 817 //MP1_SMN_C2PMSG_72 818 #define MP1_SMN_C2PMSG_72__CONTENT__SHIFT 0x0 819 #define MP1_SMN_C2PMSG_72__CONTENT_MASK 0xFFFFFFFFL 820 //MP1_SMN_C2PMSG_73 821 #define MP1_SMN_C2PMSG_73__CONTENT__SHIFT 0x0 822 #define MP1_SMN_C2PMSG_73__CONTENT_MASK 0xFFFFFFFFL 823 //MP1_SMN_C2PMSG_74 824 #define MP1_SMN_C2PMSG_74__CONTENT__SHIFT 0x0 825 #define MP1_SMN_C2PMSG_74__CONTENT_MASK 0xFFFFFFFFL 826 //MP1_SMN_C2PMSG_75 827 #define MP1_SMN_C2PMSG_75__CONTENT__SHIFT 0x0 828 #define MP1_SMN_C2PMSG_75__CONTENT_MASK 0xFFFFFFFFL 829 //MP1_SMN_C2PMSG_76 830 #define MP1_SMN_C2PMSG_76__CONTENT__SHIFT 0x0 831 #define MP1_SMN_C2PMSG_76__CONTENT_MASK 0xFFFFFFFFL 832 //MP1_SMN_C2PMSG_77 833 #define MP1_SMN_C2PMSG_77__CONTENT__SHIFT 0x0 834 #define MP1_SMN_C2PMSG_77__CONTENT_MASK 0xFFFFFFFFL 835 //MP1_SMN_C2PMSG_78 836 #define MP1_SMN_C2PMSG_78__CONTENT__SHIFT 0x0 837 #define MP1_SMN_C2PMSG_78__CONTENT_MASK 0xFFFFFFFFL 838 //MP1_SMN_C2PMSG_79 839 #define MP1_SMN_C2PMSG_79__CONTENT__SHIFT 0x0 840 #define MP1_SMN_C2PMSG_79__CONTENT_MASK 0xFFFFFFFFL 841 //MP1_SMN_C2PMSG_80 842 #define MP1_SMN_C2PMSG_80__CONTENT__SHIFT 0x0 843 #define MP1_SMN_C2PMSG_80__CONTENT_MASK 0xFFFFFFFFL 844 //MP1_SMN_C2PMSG_81 845 #define MP1_SMN_C2PMSG_81__CONTENT__SHIFT 0x0 846 #define MP1_SMN_C2PMSG_81__CONTENT_MASK 0xFFFFFFFFL 847 //MP1_SMN_C2PMSG_82 848 #define MP1_SMN_C2PMSG_82__CONTENT__SHIFT 0x0 849 #define MP1_SMN_C2PMSG_82__CONTENT_MASK 0xFFFFFFFFL 850 //MP1_SMN_C2PMSG_83 851 #define MP1_SMN_C2PMSG_83__CONTENT__SHIFT 0x0 852 #define MP1_SMN_C2PMSG_83__CONTENT_MASK 0xFFFFFFFFL 853 //MP1_SMN_C2PMSG_84 854 #define MP1_SMN_C2PMSG_84__CONTENT__SHIFT 0x0 855 #define MP1_SMN_C2PMSG_84__CONTENT_MASK 0xFFFFFFFFL 856 //MP1_SMN_C2PMSG_85 857 #define MP1_SMN_C2PMSG_85__CONTENT__SHIFT 0x0 858 #define MP1_SMN_C2PMSG_85__CONTENT_MASK 0xFFFFFFFFL 859 //MP1_SMN_C2PMSG_86 860 #define MP1_SMN_C2PMSG_86__CONTENT__SHIFT 0x0 861 #define MP1_SMN_C2PMSG_86__CONTENT_MASK 0xFFFFFFFFL 862 //MP1_SMN_C2PMSG_87 863 #define MP1_SMN_C2PMSG_87__CONTENT__SHIFT 0x0 864 #define MP1_SMN_C2PMSG_87__CONTENT_MASK 0xFFFFFFFFL 865 //MP1_SMN_C2PMSG_88 866 #define MP1_SMN_C2PMSG_88__CONTENT__SHIFT 0x0 867 #define MP1_SMN_C2PMSG_88__CONTENT_MASK 0xFFFFFFFFL 868 //MP1_SMN_C2PMSG_89 869 #define MP1_SMN_C2PMSG_89__CONTENT__SHIFT 0x0 870 #define MP1_SMN_C2PMSG_89__CONTENT_MASK 0xFFFFFFFFL 871 //MP1_SMN_C2PMSG_90 872 #define MP1_SMN_C2PMSG_90__CONTENT__SHIFT 0x0 873 #define MP1_SMN_C2PMSG_90__CONTENT_MASK 0xFFFFFFFFL 874 //MP1_SMN_C2PMSG_91 875 #define MP1_SMN_C2PMSG_91__CONTENT__SHIFT 0x0 876 #define MP1_SMN_C2PMSG_91__CONTENT_MASK 0xFFFFFFFFL 877 //MP1_SMN_C2PMSG_92 878 #define MP1_SMN_C2PMSG_92__CONTENT__SHIFT 0x0 879 #define MP1_SMN_C2PMSG_92__CONTENT_MASK 0xFFFFFFFFL 880 //MP1_SMN_C2PMSG_93 881 #define MP1_SMN_C2PMSG_93__CONTENT__SHIFT 0x0 882 #define MP1_SMN_C2PMSG_93__CONTENT_MASK 0xFFFFFFFFL 883 //MP1_SMN_C2PMSG_94 884 #define MP1_SMN_C2PMSG_94__CONTENT__SHIFT 0x0 885 #define MP1_SMN_C2PMSG_94__CONTENT_MASK 0xFFFFFFFFL 886 //MP1_SMN_C2PMSG_95 887 #define MP1_SMN_C2PMSG_95__CONTENT__SHIFT 0x0 888 #define MP1_SMN_C2PMSG_95__CONTENT_MASK 0xFFFFFFFFL 889 //MP1_SMN_C2PMSG_96 890 #define MP1_SMN_C2PMSG_96__CONTENT__SHIFT 0x0 891 #define MP1_SMN_C2PMSG_96__CONTENT_MASK 0xFFFFFFFFL 892 //MP1_SMN_C2PMSG_97 893 #define MP1_SMN_C2PMSG_97__CONTENT__SHIFT 0x0 894 #define MP1_SMN_C2PMSG_97__CONTENT_MASK 0xFFFFFFFFL 895 //MP1_SMN_C2PMSG_98 896 #define MP1_SMN_C2PMSG_98__CONTENT__SHIFT 0x0 897 #define MP1_SMN_C2PMSG_98__CONTENT_MASK 0xFFFFFFFFL 898 //MP1_SMN_C2PMSG_99 899 #define MP1_SMN_C2PMSG_99__CONTENT__SHIFT 0x0 900 #define MP1_SMN_C2PMSG_99__CONTENT_MASK 0xFFFFFFFFL 901 //MP1_SMN_C2PMSG_100 902 #define MP1_SMN_C2PMSG_100__CONTENT__SHIFT 0x0 903 #define MP1_SMN_C2PMSG_100__CONTENT_MASK 0xFFFFFFFFL 904 //MP1_SMN_C2PMSG_101 905 #define MP1_SMN_C2PMSG_101__CONTENT__SHIFT 0x0 906 #define MP1_SMN_C2PMSG_101__CONTENT_MASK 0xFFFFFFFFL 907 //MP1_SMN_C2PMSG_102 908 #define MP1_SMN_C2PMSG_102__CONTENT__SHIFT 0x0 909 #define MP1_SMN_C2PMSG_102__CONTENT_MASK 0xFFFFFFFFL 910 //MP1_SMN_C2PMSG_103 911 #define MP1_SMN_C2PMSG_103__CONTENT__SHIFT 0x0 912 #define MP1_SMN_C2PMSG_103__CONTENT_MASK 0xFFFFFFFFL 913 //MP1_SMN_ACTIVE_FCN_ID 914 #define MP1_SMN_ACTIVE_FCN_ID__VFID__SHIFT 0x0 915 #define MP1_SMN_ACTIVE_FCN_ID__VF__SHIFT 0x1f 916 #define MP1_SMN_ACTIVE_FCN_ID__VFID_MASK 0x0000001FL 917 #define MP1_SMN_ACTIVE_FCN_ID__VF_MASK 0x80000000L 918 //MP1_SMN_IH_CREDIT 919 #define MP1_SMN_IH_CREDIT__CREDIT_VALUE__SHIFT 0x0 920 #define MP1_SMN_IH_CREDIT__CLIENT_ID__SHIFT 0x10 921 #define MP1_SMN_IH_CREDIT__CREDIT_VALUE_MASK 0x00000003L 922 #define MP1_SMN_IH_CREDIT__CLIENT_ID_MASK 0x00FF0000L 923 //MP1_SMN_IH_SW_INT 924 #define MP1_SMN_IH_SW_INT__ID__SHIFT 0x0 925 #define MP1_SMN_IH_SW_INT__VALID__SHIFT 0x8 926 #define MP1_SMN_IH_SW_INT__ID_MASK 0x000000FFL 927 #define MP1_SMN_IH_SW_INT__VALID_MASK 0x00000100L 928 //MP1_SMN_IH_SW_INT_CTRL 929 #define MP1_SMN_IH_SW_INT_CTRL__INT_MASK__SHIFT 0x0 930 #define MP1_SMN_IH_SW_INT_CTRL__INT_ACK__SHIFT 0x8 931 #define MP1_SMN_IH_SW_INT_CTRL__INT_MASK_MASK 0x00000001L 932 #define MP1_SMN_IH_SW_INT_CTRL__INT_ACK_MASK 0x00000100L 933 //MP1_SMN_FPS_CNT 934 #define MP1_SMN_FPS_CNT__COUNT__SHIFT 0x0 935 #define MP1_SMN_FPS_CNT__COUNT_MASK 0xFFFFFFFFL 936 //MP1_SMN_PUB_CTRL 937 #define MP1_SMN_PUB_CTRL__RESET__SHIFT 0x0 938 #define MP1_SMN_PUB_CTRL__RESET_MASK 0x00000001L 939 //MP1_SMN_EXT_SCRATCH0 940 #define MP1_SMN_EXT_SCRATCH0__DATA__SHIFT 0x0 941 #define MP1_SMN_EXT_SCRATCH0__DATA_MASK 0xFFFFFFFFL 942 //MP1_SMN_EXT_SCRATCH1 943 #define MP1_SMN_EXT_SCRATCH1__DATA__SHIFT 0x0 944 #define MP1_SMN_EXT_SCRATCH1__DATA_MASK 0xFFFFFFFFL 945 //MP1_SMN_EXT_SCRATCH2 946 #define MP1_SMN_EXT_SCRATCH2__DATA__SHIFT 0x0 947 #define MP1_SMN_EXT_SCRATCH2__DATA_MASK 0xFFFFFFFFL 948 //MP1_SMN_EXT_SCRATCH3 949 #define MP1_SMN_EXT_SCRATCH3__DATA__SHIFT 0x0 950 #define MP1_SMN_EXT_SCRATCH3__DATA_MASK 0xFFFFFFFFL 951 //MP1_SMN_EXT_SCRATCH4 952 #define MP1_SMN_EXT_SCRATCH4__DATA__SHIFT 0x0 953 #define MP1_SMN_EXT_SCRATCH4__DATA_MASK 0xFFFFFFFFL 954 //MP1_SMN_EXT_SCRATCH5 955 #define MP1_SMN_EXT_SCRATCH5__DATA__SHIFT 0x0 956 #define MP1_SMN_EXT_SCRATCH5__DATA_MASK 0xFFFFFFFFL 957 //MP1_SMN_EXT_SCRATCH6 958 #define MP1_SMN_EXT_SCRATCH6__DATA__SHIFT 0x0 959 #define MP1_SMN_EXT_SCRATCH6__DATA_MASK 0xFFFFFFFFL 960 //MP1_SMN_EXT_SCRATCH7 961 #define MP1_SMN_EXT_SCRATCH7__DATA__SHIFT 0x0 962 #define MP1_SMN_EXT_SCRATCH7__DATA_MASK 0xFFFFFFFFL 963 964 965 #endif 966