1 #ifndef __SYSTEM_H__ 2 #define __SYSTEM_H__ 3 4 /** 5 * Detected CPU Vendors - returned by GetCPUCaps(CPU_VENDOR_STRING); 6 */ 7 typedef enum CPU_VENDORS 8 { 9 VENDOR_UNKNOWN, 10 VENDOR_AMD, 11 VENDOR_INTEL, 12 VENDOR_CYRIX, 13 VENDOR_CENTAUR 14 } CPU_VENDORS; 15 16 /** 17 * Detected CPU models - returned by GetCPUCaps(CPU_TYPE); 18 */ 19 typedef enum CPU_TYPES 20 { 21 UNKNOWN, 22 AMD_Am486, 23 AMD_K5, 24 AMD_K6, 25 AMD_K6_MMX, 26 AMD_K6_2, 27 AMD_K6_3, 28 AMD_K7, 29 AMD_ATHLON, 30 31 INTEL_486DX, 32 INTEL_486SX, 33 INTEL_486DX2, 34 INTEL_486SL, 35 INTEL_486SX2, 36 INTEL_486DX2E, 37 INTEL_486DX4, 38 INTEL_Pentium, 39 INTEL_Pentium_MMX, 40 INTEL_Pentium_Pro, 41 INTEL_Pentium_II, 42 INTEL_Celeron, 43 INTEL_Pentium_III, 44 } CPU_TYPES; 45 46 47 /** 48 * Detected CPU capabilities - used as input to the GetCPUCaps() function. 49 */ 50 typedef enum CPUCAPS 51 { 52 // Synthesized values 53 CPU_VENDOR, /**< Manufacturer (returns enum CPU_VENDORS) */ 54 CPU_TYPE, /**< CPU type (return enum CPU_TYPES) */ 55 CPU_VENDOR_STRING, /**< CPU vendor name string (return const char *) */ 56 CPU_NAME_STRING, /**< CPU Processor string (extended functions 0x80000002 - 0x80000004, return const char *) */ 57 CPU_MFG, /**< Manufacturer (returns enum CPU_MFGS) */ 58 59 // Processor Features - returned as boolean values 60 HAS_CPUID, /**< Supports CPUID instruction */ 61 HAS_FPU, /**< FPU present */ 62 HAS_VME, /**< Virtual Mode Extensions */ 63 HAS_DEBUG, /**< Debug extensions */ 64 HAS_PSE, /**< Page Size Extensions */ 65 HAS_TSC, /**< Time Stamp Counter */ 66 HAS_MSR, /**< Model Specific Registers */ 67 HAS_PAE, /**< Page Address Extensions */ 68 HAS_MCE, /**< Machine Check Extensions */ 69 HAS_CMPXCHG8, /**< CMPXCHG8 instruction */ 70 HAS_APIC, /**< APIC */ 71 HAS_SYSENTER, /**< SYSENTER/SYSEXIT instruction */ 72 HAS_MTRR, /**< Memory Type Range Registers */ 73 HAS_GPE, /**< Global Paging Extensions */ 74 HAS_MCA, /**< Machine Check Architecture */ 75 HAS_CMOV, /**< CMOV instruction */ 76 HAS_PAT, /**< Page Attribue Table */ 77 HAS_PSE36, /**< PSE36 (Page Size Extensions) */ 78 79 HAS_MMX_EXT, /**< MMX Extensions */ 80 HAS_MMX, /**< MMX support */ 81 HAS_FXSAVE, /**< FXSAVE/FXRSTOR instruction */ 82 83 HAS_3DNOW_EXT, /**< Extended 3DNow! support */ 84 HAS_3DNOW, /**< 3DNow! support */ 85 86 HAS_SSE_MMX, /**< SSE MMX support (same as HAS_MMXEXT) */ 87 HAS_SSE, /**< SSE */ 88 HAS_SSE_FP, /**< SSE FP support */ 89 90 // Cache parameters (not all values apply to all cpus) 91 CPU_L1_DTLB_ASSOC, /**< L1 Data Cache TLB Associativity */ 92 CPU_L1_DTLB_ENTRIES, /**< L1 Data Cache TLB Entries */ 93 CPU_L1_ITLB_ASSOC, /**< L1 Instruction Cache TLB Associativity (0xff = full associativity) */ 94 CPU_L1_ITLB_ENTRIES, /**< L1 Instruction Cache TLB Entries */ 95 96 CPU_L1_EDTLB_ASSOC, /**< Extended (2/4 Mbyte) L1 Data Cache TLB Associativity (0xff = full associativity) */ 97 CPU_L1_EDTLB_ENTRIES, /**< Extended (2/4 Mbyte) L1 Data Cache TLB Entries */ 98 CPU_L1_EITLB_ASSOC, /**< Extended (2/4 Mbyte) L1 Instruction Cache TLB Associativity */ 99 CPU_L1_EITLB_ENTRIES, /**< Extended (2/4 Mbyte) L1 Instruction Cache TLB Entries */ 100 101 CPU_L1_DCACHE_SIZE, /**< L1 Data Cache Size (kbytes) */ 102 CPU_L1_DCACHE_ASSOC, /**< L1 Data Cache Associativity (0xff = full associativity) */ 103 CPU_L1_DCACHE_LINES, /**< L1 Data Cache Lines */ 104 CPU_L1_DCACHE_LSIZE, /**< L1 Data Cache Line Size (bytes) */ 105 106 CPU_L1_ICACHE_SIZE, /**< L1 Instruction Cache Size (kbytes) */ 107 CPU_L1_ICACHE_ASSOC, /**< L1 Instruction Cache Associativity (0xff = full associativity) */ 108 CPU_L1_ICACHE_LINES, /**< L1 Instruction Cache Lines */ 109 CPU_L1_ICACHE_LSIZE, /**< L1 Instruction Cache Line Size (bytes) */ 110 111 CPU_L2_CACHE_SIZE, /**< L2 Unified Cache Size (Kbytes) */ 112 CPU_L2_CACHE_ASSOC, /**< L2 Unified Cache Associativity (0xf = full associativity) */ 113 CPU_L2_CACHE_LINES, /**< L2 Unified Cache Lines (lines per tag) */ 114 CPU_L2_CACHE_LSIZE, /**< L2 Unified Cache Line Size (bytes) */ 115 116 CPU_L2_DTLB_ASSOC, /**< L2 Data Cache TLB Associativity */ 117 CPU_L2_DTLB_ENTRIES, /**< L2 Data Cache TLB Entries */ 118 CPU_L2_UTLB_ASSOC, /**< L2 Instruction or Unified Cache TLB Associativity (0xf = full associativity) */ 119 CPU_L2_UTLB_ENTRIES, /**< L2 Instruction or Unified Cache TLB Entries */ 120 121 CPU_L2_EDTLB_ASSOC, /**< Extended (2/4 Mbyte) L2 Data Cache TLB Associativity (0xf = full associativity) */ 122 CPU_L2_EDTLB_ENTRIES, /**< Extended (2/4 Mbyte) L2 Data Cache TLB Entries */ 123 CPU_L2_EUTLB_ASSOC, /**< Extended (2/4 Mbyte) L2 Instruction or Unified Cache TLB Associativity */ 124 CPU_L2_EUTLB_ENTRIES, /**< Extended (2/4 Mbyte) L2 Instruction or Unified Cache TLB Entries */ 125 126 } CPUCAPS; 127 128 /** 129 * Detected CPU Manufacturers - returned by GetCPUCaps(CPU_MFG) 130 */ 131 typedef enum CPU_MFGS 132 { 133 MFG_UNKNOWN, 134 MFG_AMD, 135 MFG_INTEL, 136 MFG_CYRIX, 137 MFG_CENTAUR 138 } CPU_MFGS; 139 140 /** 141 * Get the CPU vendor name. The function is specially written for AMD 142 * processors and may return incorrect values with other CPUs. 143 * @return a 48 byte char table that contains 144 */ 145 unsigned char* GetVendorString(void); 146 147 /** 148 * Get the CPU cache size. The function is specially written for AMD 149 * processors and may return incorrect values with other CPUs. 150 * @return the CPU cache size 151 */ 152 int GetCacheInfo(void); 153 154 /** 155 * Get the CPU speed. The function is specially written for AMD 156 * processors and may return incorrect values with other CPUs. 157 * @return the CPU speed 158 */ 159 unsigned int GetCpuSpeed(void); 160 161 /** 162 * Looks for a CPU caps. 163 */ 164 DWORD GetCPUCaps(CPUCAPS); 165 166 /** 167 * Get an argument in a string 168 */ 169 void GetArg(const char* command, int i, char *dest); 170 171 /** 172 * Gets the number of arguments of a string. 173 */ 174 int GetNArgs(const char* command); 175 176 //----------------------------------------------------------------------------- 177 // Exceptions 178 //----------------------------------------------------------------------------- 179 180 typedef enum 181 { 182 NO_EXCEPTION = 0, 183 DEFAULT_EXCEPTION = 1, 184 ALLOCATION_ERROR = 2, 185 OVERFLOW_ERROR = 3, 186 OUT_OF_BOUNDS_VALUE = 4, 187 NULL_POINTER = 5, 188 DIVISION_BY_ZERO = 6, 189 ERROR_OPENING_FILE = 7, 190 FATAL_ERROR = 8 191 } CakeException; 192 193 /** 194 * Return a string containing the exception description 195 * @param val The exception number. 196 * @return The exception description. 197 */ 198 const char *GetExceptionDescription(CakeException val); 199 200 /** 201 * Throws an exception and stops the application. 202 * @param val The exception number. 203 * @param msg An eventual message 204 */ 205 void ThrowException(CakeException val, const char *msg = NULL); 206 207 #endif 208