1# $NetBSD: Makefile.inc,v 1.41 2022/10/05 10:28:19 nia Exp $ 2 3COMPILER_RT_DIR= ${NETBSDSRCDIR}/sys/external/bsd/compiler_rt 4COMPILER_RT_SRCDIR= ${COMPILER_RT_DIR}/dist 5 6.if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 7COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 8COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/ppc 9.else 10COMPILER_RT_CPU_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_CPU} 11COMPILER_RT_ARCH_DIR= ${COMPILER_RT_SRCDIR}/lib/builtins/${LIBC_MACHINE_ARCH} 12.endif 13 14.PATH: ${COMPILER_RT_CPU_DIR} 15.PATH: ${COMPILER_RT_ARCH_DIR} 16.PATH: ${COMPILER_RT_SRCDIR}/lib/builtins 17.PATH: ${COMPILER_RT_SRCDIR}/lib/profile 18 19# Complex support needs parts of libm 20#GENERIC_SRCS+= 21# mulxc3.c \ 22# mulsc3.c \ 23# divxc3.c \ 24# divdc3.c \ 25# divsc3.c 26 27# Implemented on top of our atomic interface. 28#GENERIC_SRCS+= atomic.c 29 30.if ${HAVE_LIBGCC_EH} == "no" 31GENERIC_SRCS+= \ 32 gcc_personality_v0.c 33.endif 34 35GENERIC_SRCS+= \ 36 absvsi2.c \ 37 absvti2.c \ 38 addvsi3.c \ 39 addvti3.c \ 40 ashlti3.c \ 41 ashrti3.c \ 42 clzti2.c \ 43 cmpti2.c \ 44 ctzti2.c \ 45 divti3.c \ 46 ffsti2.c \ 47 fixsfdi.c \ 48 fixdfdi.c \ 49 fixunsdfdi.c \ 50 fixunsdfsi.c \ 51 fixunssfdi.c \ 52 fixunssfsi.c \ 53 fixunsxfdi.c \ 54 fixunsxfsi.c \ 55 int_util.c \ 56 lshrti3.c \ 57 modti3.c \ 58 muldc3.c \ 59 mulosi4.c \ 60 muloti4.c \ 61 multi3.c \ 62 mulvsi3.c \ 63 mulvti3.c \ 64 negti2.c \ 65 negvsi2.c \ 66 negvti2.c \ 67 paritysi2.c \ 68 parityti2.c \ 69 popcountsi2.c \ 70 popcountti2.c \ 71 subvsi3.c \ 72 subvti3.c \ 73 ucmpti2.c \ 74 udivmodti4.c \ 75 udivti3.c \ 76 umodti3.c 77 78# only used for machines using IEEE 754 floating point formats 79.if ${MACHINE_ARCH} != "vax" 80 81.if 0 82# Conflicts with soft-float 83GENERIC_SRCS+= \ 84 comparedf2.c \ 85 comparesf2.c \ 86 adddf3.c \ 87 addsf3.c \ 88 addtf3.c \ 89 divdf3.c \ 90 divsf3.c \ 91 divtf3.c \ 92 extendsfdf2.c \ 93 extendsftf2.c \ 94 extenddftf2.c \ 95 fixdfsi.c \ 96 fixdfti.c \ 97 fixsfsi.c \ 98 fixsfti.c \ 99 floatsidf.c \ 100 floatsisf.c \ 101 floatunsidf.c \ 102 floatunsisf.c \ 103 muldf3.c \ 104 mulsf3.c \ 105 multf3.c \ 106 subdf3.c \ 107 subsf3.c \ 108 subtf3.c \ 109 truncdfsf2.c \ 110 trunctfdf2.c \ 111 trunctfsf2.c 112.endif 113 114GENERIC_SRCS+= \ 115 floatdidf.c \ 116 floatdisf.c \ 117 floatdixf.c \ 118 floatundidf.c \ 119 floatundisf.c \ 120 floatundixf.c \ 121 negdf2.c \ 122 negsf2.c \ 123 powidf2.c \ 124 powisf2.c \ 125 powitf2.c \ 126 powixf2.c 127 128.endif # IEEE 754 only machines 129 130.if ${MACHINE_ARCH} != "m68k" 131GENERIC_SRCS+= \ 132 fixxfdi.c 133.endif 134 135 136.if ${MACHINE_CPU} == "aarch64" 137GENERIC_SRCS+= \ 138 comparetf2.c 139.endif 140 141GENERIC_SRCS+= \ 142 fixunsdfti.c \ 143 fixunssfti.c \ 144 fixunsxfti.c \ 145 fixxfti.c \ 146 floattidf.c \ 147 floattisf.c \ 148 floattixf.c \ 149 floatuntidf.c \ 150 floatuntisf.c \ 151 floatuntixf.c 152 153# These have h/w instructions which are always used. 154.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "aarch64" \ 155 && ${LIBC_MACHINE_CPU} != "powerpc" && ${LIBC_MACHINE_CPU} != "or1k" 156GENERIC_SRCS+= \ 157 clzsi2.c 158.endif 159 160# These have h/w instructions which are always used. 161.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_ARCH} != "vax" \ 162 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_CPU} != "powerpc" \ 163 && ${LIBC_MACHINE_CPU} != "or1k" 164GENERIC_SRCS+= \ 165 ctzsi2.c 166.endif 167 168# These have h/w instructions which are always used. 169.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc" \ 170 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_ARCH} != "vax" 171GENERIC_SRCS+= \ 172 divmodsi4.c \ 173 divsi3.c \ 174 modsi3.c \ 175 udivmodsi4.c \ 176 umodsi3.c 177 178. if ${LIBC_MACHINE_CPU} != "sh3" 179# On sh3 __udivsi3 is gcc "millicode" with special calling convention 180# (less registers clobbered than usual). Each DSO that needs it gets 181# its own hidden copy from libgcc.a. 182GENERIC_SRCS+= \ 183 udivsi3.c 184. endif 185.endif 186 187 188GENERIC_SRCS+= \ 189 absvdi2.c \ 190 addvdi3.c \ 191 mulodi4.c \ 192 mulvdi3.c \ 193 negvdi2.c \ 194 paritydi2.c \ 195 popcountdi2.c \ 196 subvdi3.c 197 198# These have h/w instructions which are always used. 199.if ${LIBC_MACHINE_ARCH} != "alpha" && ${LIBC_MACHINE_CPU} != "powerpc64" \ 200 && ${LIBC_MACHINE_CPU} != "aarch64" && ${LIBC_MACHINE_CPU} != "or1k" 201GENERIC_SRCS+= \ 202 clzdi2.c \ 203 ctzdi2.c \ 204 ffsdi2.c 205.endif 206 207# Don't need these on 64-bit machines. 208.if empty(LIBC_MACHINE_ARCH:M*64*) && ${LIBC_MACHINE_ARCH} != "alpha" 209GENERIC_SRCS+= \ 210 cmpdi2.c \ 211 ashldi3.c \ 212 ashrdi3.c \ 213 divdi3.c \ 214 divmoddi4.c \ 215 lshrdi3.c \ 216 moddi3.c \ 217 muldi3.c \ 218 negdi2.c \ 219 ucmpdi2.c \ 220 udivdi3.c \ 221 udivmoddi4.c \ 222 umoddi3.c 223.endif 224 225GENERIC_SRCS+= \ 226 GCDAProfiling.c \ 227 InstrProfiling.c \ 228 InstrProfilingBuffer.c \ 229 InstrProfilingFile.c \ 230 InstrProfilingPlatformLinux.c \ 231 InstrProfilingUtil.c \ 232 InstrProfilingValue.c \ 233 InstrProfilingWriter.c 234 235.if ${MKPROFILE} != "no" 236POBJS+= InstrProfilingRuntime.po 237.endif 238 239.if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 240GENERIC_SRCS+= \ 241 fixtfdi.c \ 242 fixunstfdi.c \ 243 floatditf.c \ 244 floatunditf.c \ 245 gcc_qadd.c \ 246 gcc_qdiv.c \ 247 gcc_qmul.c \ 248 gcc_qsub.c 249.endif 250 251.if ${LIBC_MACHINE_CPU} == "aarch64" 252GENERIC_SRCS+= \ 253 clear_cache.c \ 254 addtf3.c \ 255 divtf3.c \ 256 multf3.c \ 257 subtf3.c \ 258 trunctfsf2.c \ 259 trunctfdf2.c \ 260 fixdfti.c \ 261 fixtfsi.c \ 262 fixtfdi.c \ 263 extendsftf2.c \ 264 extenddftf2.c \ 265 floatunsitf.c \ 266 floatunditf.c \ 267 floatsitf.c \ 268 floatditf.c 269.endif 270 271.if ${LIBC_MACHINE_ARCH} == "powerpc" || ${LIBC_MACHINE_ARCH} == "powerpc64" 272GENERIC_SRCS+= \ 273 clear_cache.c 274.endif 275 276.if ${LIBC_MACHINE_ARCH} == "sparc" || ${LIBC_MACHINE_ARCH} == "sparc64" 277GENERIC_SRCS+= \ 278 clear_cache.c 279.endif 280 281.if ${LIBC_MACHINE_CPU} == "arm" 282.if !empty(LIBC_MACHINE_ARCH:Mearm*) 283GENERIC_SRCS+= \ 284 aeabi_idivmod.S \ 285 aeabi_ldivmod.S \ 286 aeabi_uidivmod.S \ 287 aeabi_uldivmod.S 288.endif 289GENERIC_SRCS+= \ 290 clear_cache.c 291# Not yet, overlaps with softfloat 292# aeabi_dcmp.S \ 293# aeabi_fcmp.S 294# Not yet, requires ARMv6 295#GENERIC_SRCS+= \ 296# bswapdi2.S \ 297# bswapsi2.S 298.endif 299 300.for src in ${GENERIC_SRCS} 301. if exists(${COMPILER_RT_CPU_DIR}/${src:R}.S) || \ 302 exists(${COMPILER_RT_ARCH_DIR}/${src:R}.S) 303SRCS+= ${src:R}.S 304. else 305SRCS+= ${src} 306. if ${src:E} != "cc" 307COPTS.${src}+= -Wno-missing-prototypes \ 308 -Wno-old-style-definition \ 309 -Wno-strict-prototypes \ 310 -Wno-uninitialized \ 311 -Wno-cast-qual 312. endif 313. endif 314.if ${MKSOFTFLOAT:Uno} != "no" 315COPTS.${src}+= -D__SOFT_FP__ 316.endif 317.endfor 318 319.include "${COMPILER_RT_DIR}/abi.mk" 320