1######################################################################## 2# Copyright(c) 2020 Arm Corporation All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions 6# are met: 7# * Redistributions of source code must retain the above copyright 8# notice, this list of conditions and the following disclaimer. 9# * Redistributions in binary form must reproduce the above copyright 10# notice, this list of conditions and the following disclaimer in 11# the documentation and/or other materials provided with the 12# distribution. 13# * Neither the name of Arm Corporation nor the names of its 14# contributors may be used to endorse or promote products derived 15# from this software without specific prior written permission. 16# 17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28######################################################################### 29#include "crc32_aarch64_common.h" 30 .text 31 .align 6 32 .arch armv8-a+crc+crypto 33.macro crc32_u64 dst,src,data 34 crc32x \dst,\src,\data 35.endm 36.macro crc32_u32 dst,src,data 37 crc32w \dst,\src,\data 38.endm 39.macro crc32_u16 dst,src,data 40 crc32h \dst,\src,\data 41.endm 42.macro crc32_u8 dst,src,data 43 crc32b \dst,\src,\data 44.endm 45.macro declare_var_vector_reg name:req,reg:req 46 q\name .req q\reg 47 v\name .req v\reg 48 s\name .req s\reg 49 d\name .req d\reg 50.endm 51 52 BUF .req x1 53 ptr_crc0 .req x1 54 LEN .req x2 55 wCRC .req w0 56 crc0 .req w0 57 xcrc0 .req x0 58 59 crc1 .req w3 60 crc2 .req w4 61 xcrc1 .req x3 62 const_adr .req x3 63 ptr_crc1 .req x6 64 ptr_crc2 .req x7 65 crc0_data0 .req x9 66 crc0_data1 .req x10 67 crc1_data0 .req x11 68 crc1_data1 .req x12 69 crc2_data0 .req x13 70 crc2_data1 .req x14 71 72 wdata .req w3 73 data0 .req x3 74 data1 .req x4 75 data2 .req x5 76 data3 .req x6 77 78 declare_var_vector_reg tmp0,0 79 declare_var_vector_reg tmp1,1 80 declare_var_vector_reg const0,2 81 declare_var_vector_reg const1,3 82 83/** 84 uint32_t crc32_gzip_refl( 85 uint32_t wCRC, 86 const unsigned char *BUF, 87 uint64_t LEN 88 ); 89*/ 90 91 .global crc32_gzip_refl_3crc_fold 92 .type crc32_gzip_refl_3crc_fold, %function 93crc32_gzip_refl_3crc_fold: 94 crc32_3crc_fold crc32 95 .size crc32_gzip_refl_3crc_fold, .-crc32_gzip_refl_3crc_fold 96