xref: /netbsd/sys/arch/evbmips/alchemy/dbau1500.c (revision fce9b928)
1 /* $NetBSD: dbau1500.c,v 1.8 2015/06/09 22:49:55 matt Exp $ */
2 
3 /*-
4  * Copyright (c) 2006 Itronix Inc.
5  * All rights reserved.
6  *
7  * Written by Garrett D'Amore for Itronix Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. The name of Itronix Inc. may not be used to endorse
18  *    or promote products derived from this software without specific
19  *    prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY ITRONIX INC. ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ITRONIX INC. BE LIABLE FOR ANY
25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
26  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28  * ON ANY THEORY OF LIABILITY, WHETHER IN
29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: dbau1500.c,v 1.8 2015/06/09 22:49:55 matt Exp $");
36 
37 #include <sys/param.h>
38 #include <sys/bus.h>
39 #include <sys/cpu.h>
40 
41 #include <mips/locore.h>
42 
43 #include <evbmips/alchemy/obiovar.h>
44 #include <evbmips/alchemy/board.h>
45 #include <evbmips/alchemy/dbau1500reg.h>
46 
47 #define	GET16(x)	\
48 	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)))
49 #define	PUT16(x, v)	\
50 	(*((volatile uint16_t *)MIPS_PHYS_TO_KSEG1(x)) = (v))
51 
52 static void dbau1500_init(void);
53 static int dbau1500_pci_intr_map(const struct pci_attach_args *,
54 				 pci_intr_handle_t *);
55 static void dbau1500_reboot(void);
56 
57 static const struct obiodev dbau1500_devices[] = {
58 #if 0
59 	{ "aupcmcia", -1, -1 },
60 	{ "auaudio", -1, -1 },
61 #endif
62 	{ NULL },
63 };
64 
65 static struct alchemy_board dbau1500_info = {
66 	"AMD Alchemy DBAu1500",
67 	dbau1500_devices,
68 	dbau1500_init,
69 	dbau1500_pci_intr_map,
70 	dbau1500_reboot,
71 	NULL,	/* poweroff */
72 };
73 
74 const struct alchemy_board *
board_info(void)75 board_info(void)
76 {
77 
78 	return &dbau1500_info;
79 }
80 
81 void
dbau1500_init(void)82 dbau1500_init(void)
83 {
84 	uint32_t	whoami;
85 
86 	if (MIPS_PRID_COPTS(mips_options.mips_cpu_id) != MIPS_AU1500)
87 		panic("dbau1500: CPU not an AU1500!");
88 
89 	/* check the whoami register for a match */
90 	whoami = *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1(DBAU1500_WHOAMI));
91 
92 	if (DBAU1500_WHOAMI_BOARD(whoami) != DBAU1500_WHOAMI_DBAU1500)
93 		panic("dbau1500: WHOAMI (%x) not DBAu1500!", whoami);
94 
95 	printf("DBAu1500 (zinfandel), CPLDv%d, ",
96 	    DBAU1500_WHOAMI_CPLD(whoami));
97 
98 	if (DBAU1500_WHOAMI_DAUGHTER(whoami) != 0xf)
99 		printf("daughtercard 0x%x\n",
100 		    DBAU1500_WHOAMI_DAUGHTER(whoami));
101 	else
102 		printf("no daughtercard\n");
103 
104 	/* leave console and clocks alone -- YAMON should have got it right! */
105 }
106 
107 int
dbau1500_pci_intr_map(const struct pci_attach_args * pa,pci_intr_handle_t * ihp)108 dbau1500_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
109 {
110 	/*
111 	 * This platform has PCI slot and IDE interrupts mapped
112 	 * identically.  So we just need to look at which of the four
113 	 * PCI interrupts it is.
114 	 */
115 
116 	switch (pa->pa_intrpin) {
117 	case 0:
118 		/* not used */
119 		return 1;
120 	case 1:
121 		*ihp = 1;
122 		break;
123 	case 2:
124 		*ihp = 2;
125 		break;
126 	case 3:
127 		*ihp = 4;
128 		break;
129 	case 4:
130 		*ihp = 5;
131 		break;
132 	default:
133 		printf("pci: bad interrupt pin %d\n", pa->pa_intrpin);
134 		return 1;
135 	}
136 	return 0;
137 }
138 
139 void
dbau1500_reboot(void)140 dbau1500_reboot(void)
141 {
142 	PUT16(DBAU1500_SOFTWARE_RESET, 0);
143 	delay(100000);	/* 100 msec */
144 }
145