1 /*
2 * Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
3 * Copyright (c) 2002-2006 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD$
18 */
19 #include "opt_ah.h"
20
21 #include "ah.h"
22 #include "ah_internal.h"
23
24 #include "ar5211/ar5211.h"
25 #include "ar5211/ar5211reg.h"
26 #include "ar5211/ar5211desc.h"
27
28 /*
29 * Routines used to initialize and generated beacons for the AR5211/AR5311.
30 */
31
32 /*
33 * Return the hardware NextTBTT in TSF
34 */
35 uint64_t
ar5211GetNextTBTT(struct ath_hal * ah)36 ar5211GetNextTBTT(struct ath_hal *ah)
37 {
38 #define TU_TO_TSF(_tu) (((uint64_t)(_tu)) << 10)
39 return TU_TO_TSF(OS_REG_READ(ah, AR_TIMER0));
40 #undef TU_TO_TSF
41 }
42
43 /*
44 * Initialize all of the hardware registers used to send beacons.
45 */
46 void
ar5211SetBeaconTimers(struct ath_hal * ah,const HAL_BEACON_TIMERS * bt)47 ar5211SetBeaconTimers(struct ath_hal *ah, const HAL_BEACON_TIMERS *bt)
48 {
49
50 OS_REG_WRITE(ah, AR_TIMER0, bt->bt_nexttbtt);
51 OS_REG_WRITE(ah, AR_TIMER1, bt->bt_nextdba);
52 OS_REG_WRITE(ah, AR_TIMER2, bt->bt_nextswba);
53 OS_REG_WRITE(ah, AR_TIMER3, bt->bt_nextatim);
54 /*
55 * Set the Beacon register after setting all timers.
56 */
57 OS_REG_WRITE(ah, AR_BEACON, bt->bt_intval);
58 }
59
60 /*
61 * Legacy api to initialize all of the beacon registers.
62 */
63 void
ar5211BeaconInit(struct ath_hal * ah,uint32_t next_beacon,uint32_t beacon_period)64 ar5211BeaconInit(struct ath_hal *ah,
65 uint32_t next_beacon, uint32_t beacon_period)
66 {
67 HAL_BEACON_TIMERS bt;
68
69 bzero(&bt, sizeof(bt));
70 bt.bt_nexttbtt = next_beacon;
71 /*
72 * TIMER1: in AP/adhoc mode this controls the DMA beacon
73 * alert timer; otherwise it controls the next wakeup time.
74 * TIMER2: in AP mode, it controls the SBA beacon alert
75 * interrupt; otherwise it sets the start of the next CFP.
76 */
77 switch (AH_PRIVATE(ah)->ah_opmode) {
78 case HAL_M_STA:
79 case HAL_M_MONITOR:
80 bt.bt_nextdba = 0xffff;
81 bt.bt_nextswba = 0x7ffff;
82 break;
83 case HAL_M_IBSS:
84 case HAL_M_HOSTAP:
85 bt.bt_nextdba = (next_beacon -
86 ah->ah_config.ah_dma_beacon_response_time) << 3; /* 1/8 TU */
87 bt.bt_nextswba = (next_beacon -
88 ah->ah_config.ah_sw_beacon_response_time) << 3; /* 1/8 TU */
89 break;
90 }
91 /*
92 * Set the ATIM window
93 * Our hardware does not support an ATIM window of 0
94 * (beacons will not work). If the ATIM windows is 0,
95 * force it to 1.
96 */
97 bt.bt_nextatim = next_beacon + 1;
98 bt.bt_intval = beacon_period &
99 (AR_BEACON_PERIOD | AR_BEACON_RESET_TSF | AR_BEACON_EN);
100 ar5211SetBeaconTimers(ah, &bt);
101 }
102
103 void
ar5211ResetStaBeaconTimers(struct ath_hal * ah)104 ar5211ResetStaBeaconTimers(struct ath_hal *ah)
105 {
106 uint32_t val;
107
108 OS_REG_WRITE(ah, AR_TIMER0, 0); /* no beacons */
109 val = OS_REG_READ(ah, AR_STA_ID1);
110 val |= AR_STA_ID1_PWR_SAV; /* XXX */
111 /* tell the h/w that the associated AP is not PCF capable */
112 OS_REG_WRITE(ah, AR_STA_ID1,
113 val & ~(AR_STA_ID1_DEFAULT_ANTENNA | AR_STA_ID1_PCF));
114 OS_REG_WRITE(ah, AR_BEACON, AR_BEACON_PERIOD);
115 }
116
117 /*
118 * Set all the beacon related bits on the h/w for stations
119 * i.e. initializes the corresponding h/w timers;
120 * also tells the h/w whether to anticipate PCF beacons
121 */
122 void
ar5211SetStaBeaconTimers(struct ath_hal * ah,const HAL_BEACON_STATE * bs)123 ar5211SetStaBeaconTimers(struct ath_hal *ah, const HAL_BEACON_STATE *bs)
124 {
125 struct ath_hal_5211 *ahp = AH5211(ah);
126
127 HALDEBUG(ah, HAL_DEBUG_BEACON, "%s: setting beacon timers\n", __func__);
128
129 HALASSERT(bs->bs_intval != 0);
130 /* if the AP will do PCF */
131 if (bs->bs_cfpmaxduration != 0) {
132 /* tell the h/w that the associated AP is PCF capable */
133 OS_REG_WRITE(ah, AR_STA_ID1,
134 OS_REG_READ(ah, AR_STA_ID1) | AR_STA_ID1_PCF);
135
136 /* set CFP_PERIOD(1.024ms) register */
137 OS_REG_WRITE(ah, AR_CFP_PERIOD, bs->bs_cfpperiod);
138
139 /* set CFP_DUR(1.024ms) register to max cfp duration */
140 OS_REG_WRITE(ah, AR_CFP_DUR, bs->bs_cfpmaxduration);
141
142 /* set TIMER2(128us) to anticipated time of next CFP */
143 OS_REG_WRITE(ah, AR_TIMER2, bs->bs_cfpnext << 3);
144 } else {
145 /* tell the h/w that the associated AP is not PCF capable */
146 OS_REG_WRITE(ah, AR_STA_ID1,
147 OS_REG_READ(ah, AR_STA_ID1) &~ AR_STA_ID1_PCF);
148 }
149
150 /*
151 * Set TIMER0(1.024ms) to the anticipated time of the next beacon.
152 */
153 OS_REG_WRITE(ah, AR_TIMER0, bs->bs_nexttbtt);
154
155 /*
156 * Start the beacon timers by setting the BEACON register
157 * to the beacon interval; also write the tim offset which
158 * we should know by now. The code, in ar5211WriteAssocid,
159 * also sets the tim offset once the AID is known which can
160 * be left as such for now.
161 */
162 OS_REG_WRITE(ah, AR_BEACON,
163 (OS_REG_READ(ah, AR_BEACON) &~ (AR_BEACON_PERIOD|AR_BEACON_TIM))
164 | SM(bs->bs_intval, AR_BEACON_PERIOD)
165 | SM(bs->bs_timoffset ? bs->bs_timoffset + 4 : 0, AR_BEACON_TIM)
166 );
167
168 /*
169 * Configure the BMISS interrupt. Note that we
170 * assume the caller blocks interrupts while enabling
171 * the threshold.
172 */
173 HALASSERT(bs->bs_bmissthreshold <= MS(0xffffffff, AR_RSSI_THR_BM_THR));
174 ahp->ah_rssiThr = (ahp->ah_rssiThr &~ AR_RSSI_THR_BM_THR)
175 | SM(bs->bs_bmissthreshold, AR_RSSI_THR_BM_THR);
176 OS_REG_WRITE(ah, AR_RSSI_THR, ahp->ah_rssiThr);
177
178 /*
179 * Set the sleep duration in 1/8 TU's.
180 */
181 #define SLEEP_SLOP 3
182 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLDUR,
183 (bs->bs_sleepduration - SLEEP_SLOP) << 3);
184 #undef SLEEP_SLOP
185 }
186