1 /* $NetBSD: cy82c693reg.h,v 1.2 2008/04/28 20:23:54 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef _DEV_PCI_CY82C693REG_H_ 33 #define _DEV_PCI_CY82C693REG_H_ 34 35 /* 36 * Register definitions for the Cypress 82c693 hyperCache(tm) Stand-Alone 37 * PCI Peripheral Controller with USB. 38 */ 39 40 #define CYHC_CONFIG_ADDR 0x22 /* Chipset Configuration Address */ 41 #define CYHC_CONFIG_DATA 0x23 /* Chipset Configuration Data */ 42 43 #define CONFIG_PERIPH1 0x01 /* Peripheral Control #1 */ 44 45 #define CONFIG_PERIPH2 0x02 /* Peripheral Control #2 */ 46 47 #define CONFIG_ELCR1 0x03 /* Edge/Level Control #1 */ 48 49 #define CONFIG_ELCR2 0x04 /* Edge/Level Control #2 */ 50 51 #define CONFIG_RTC 0x05 /* RTC Configuration */ 52 53 #endif /* _DEV_PCI_CY82C693REG_H_ */ 54