1 /* $OpenBSD: uhci_pci.c,v 1.36 2024/05/24 06:02:58 jsg Exp $ */
2 /* $NetBSD: uhci_pci.c,v 1.24 2002/10/02 16:51:58 thorpej Exp $ */
3
4 /*
5 * Copyright (c) 1998 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Lennart Augustsson (lennart@augustsson.net) at
10 * Carlstedt Research & Technology.
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in the
19 * documentation and/or other materials provided with the distribution.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/device.h>
37 #include <sys/timeout.h>
38 #include <sys/queue.h>
39
40 #include <machine/bus.h>
41
42 #include <dev/pci/pcivar.h>
43
44 #include <dev/usb/usb.h>
45 #include <dev/usb/usbdi.h>
46 #include <dev/usb/usbdivar.h>
47
48 #include <dev/usb/uhcireg.h>
49 #include <dev/usb/uhcivar.h>
50
51 int uhci_pci_match(struct device *, void *, void *);
52 void uhci_pci_attach(struct device *, struct device *, void *);
53 void uhci_pci_attach_deferred(struct device *);
54 int uhci_pci_detach(struct device *, int);
55 int uhci_pci_activate(struct device *, int);
56
57 struct uhci_pci_softc {
58 struct uhci_softc sc;
59 pci_chipset_tag_t sc_pc;
60 pcitag_t sc_tag;
61 void *sc_ih; /* interrupt vectoring */
62 };
63
64 const struct cfattach uhci_pci_ca = {
65 sizeof(struct uhci_pci_softc), uhci_pci_match, uhci_pci_attach,
66 uhci_pci_detach, uhci_pci_activate
67 };
68
69 int
uhci_pci_match(struct device * parent,void * match,void * aux)70 uhci_pci_match(struct device *parent, void *match, void *aux)
71 {
72 struct pci_attach_args *pa = (struct pci_attach_args *) aux;
73
74 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS &&
75 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB &&
76 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_UHCI)
77 return (1);
78
79 return (0);
80 }
81
82 int
uhci_pci_activate(struct device * self,int act)83 uhci_pci_activate(struct device *self, int act)
84 {
85 struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self;
86
87 if (sc->sc.sc_size == 0)
88 return 0;
89
90 /* On resume, set legacy support attribute and enable intrs */
91 switch (act) {
92 case DVACT_RESUME:
93 pci_conf_write(sc->sc_pc, sc->sc_tag,
94 PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN);
95 bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
96 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
97 bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
98 break;
99 }
100
101 return uhci_activate(self, act);
102 }
103
104 void
uhci_pci_attach(struct device * parent,struct device * self,void * aux)105 uhci_pci_attach(struct device *parent, struct device *self, void *aux)
106 {
107 struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self;
108 struct pci_attach_args *pa = (struct pci_attach_args *)aux;
109 pci_chipset_tag_t pc = pa->pa_pc;
110 pcitag_t tag = pa->pa_tag;
111 char const *intrstr;
112 pci_intr_handle_t ih;
113 const char *vendor;
114 char *devname = sc->sc.sc_bus.bdev.dv_xname;
115 int s;
116
117 /* Map I/O registers */
118 if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
119 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size, 0)) {
120 printf(": can't map i/o space\n");
121 return;
122 }
123
124
125 /* Disable interrupts, so we don't get any spurious ones. */
126 s = splhardusb();
127 bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
128
129 sc->sc_pc = pc;
130 sc->sc_tag = tag;
131 sc->sc.sc_bus.dmatag = pa->pa_dmat;
132
133 /* Map and establish the interrupt. */
134 if (pci_intr_map(pa, &ih)) {
135 printf(": couldn't map interrupt\n");
136 goto unmap_ret;
137 }
138 intrstr = pci_intr_string(pc, ih);
139 sc->sc_ih = pci_intr_establish(pc, ih, IPL_USB, uhci_intr, sc,
140 devname);
141 if (sc->sc_ih == NULL) {
142 printf(": couldn't establish interrupt");
143 if (intrstr != NULL)
144 printf(" at %s", intrstr);
145 printf("\n");
146 goto unmap_ret;
147 }
148 printf(": %s\n", intrstr);
149
150 /* Set LEGSUP register to its default value. */
151 pci_conf_write(pc, tag, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN);
152
153 switch(pci_conf_read(pc, tag, PCI_USBREV) & PCI_USBREV_MASK) {
154 case PCI_USBREV_PRE_1_0:
155 sc->sc.sc_bus.usbrev = USBREV_PRE_1_0;
156 break;
157 case PCI_USBREV_1_0:
158 sc->sc.sc_bus.usbrev = USBREV_1_0;
159 break;
160 case PCI_USBREV_1_1:
161 sc->sc.sc_bus.usbrev = USBREV_1_1;
162 break;
163 default:
164 sc->sc.sc_bus.usbrev = USBREV_UNKNOWN;
165 break;
166 }
167
168 uhci_run(&sc->sc, 0); /* stop the controller */
169 /* disable interrupts */
170 bus_space_barrier(sc->sc.iot, sc->sc.ioh, 0, sc->sc.sc_size,
171 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
172 bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0);
173
174 /* Figure out vendor for root hub descriptor. */
175 vendor = pci_findvendor(pa->pa_id);
176 sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id);
177 if (vendor)
178 strlcpy(sc->sc.sc_vendor, vendor, sizeof (sc->sc.sc_vendor));
179 else
180 snprintf(sc->sc.sc_vendor, sizeof (sc->sc.sc_vendor),
181 "vendor 0x%04x", PCI_VENDOR(pa->pa_id));
182
183 config_defer(self, uhci_pci_attach_deferred);
184
185 /* Ignore interrupts for now */
186 sc->sc.sc_bus.dying = 1;
187
188 splx(s);
189
190 return;
191
192 unmap_ret:
193 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
194 sc->sc.sc_size = 0;
195 splx(s);
196 }
197
198 void
uhci_pci_attach_deferred(struct device * self)199 uhci_pci_attach_deferred(struct device *self)
200 {
201 struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self;
202 char *devname = sc->sc.sc_bus.bdev.dv_xname;
203 usbd_status r;
204 int s;
205
206 s = splhardusb();
207
208 sc->sc.sc_bus.dying = 0;
209 r = uhci_init(&sc->sc);
210 if (r != USBD_NORMAL_COMPLETION) {
211 printf("%s: init failed, error=%d\n", devname, r);
212 goto unmap_ret;
213 }
214 splx(s);
215
216 /* Attach usb device. */
217 config_found(self, &sc->sc.sc_bus, usbctlprint);
218 return;
219
220 unmap_ret:
221 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
222 pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
223 sc->sc.sc_size = 0;
224 splx(s);
225 }
226
227 int
uhci_pci_detach(struct device * self,int flags)228 uhci_pci_detach(struct device *self, int flags)
229 {
230 struct uhci_pci_softc *sc = (struct uhci_pci_softc *)self;
231 int rv;
232
233 rv = uhci_detach(self, flags);
234 if (rv)
235 return (rv);
236 if (sc->sc_ih != NULL) {
237 pci_intr_disestablish(sc->sc_pc, sc->sc_ih);
238 sc->sc_ih = NULL;
239 }
240 if (sc->sc.sc_size) {
241 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
242 sc->sc.sc_size = 0;
243 }
244
245 return (0);
246 }
247