xref: /freebsd/sys/dev/psci/smccc.h (revision 95ee2897)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2018 Andrew Turner
5  *
6  * This software was developed by SRI International and the University of
7  * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
8  * ("CTSRD"), as part of the DARPA CRASH research programme.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29  * SUCH DAMAGE.
30  */
31 
32 #ifndef	_PSCI_SMCCC_H_
33 #define	_PSCI_SMCCC_H_
34 
35 #define	SMCCC_VERSION_MAJOR(ver)	(((ver) >> 16) & 0x7fff)
36 #define	SMCCC_VERSION_MINOR(ver)	((ver) & 0xffff)
37 
38 #define	SMCCC_FUNC_ID(type, call_conv, range, func)	\
39 	(((type) << 31) |				\
40 	 ((call_conv) << 30) |				\
41 	 (((range) & 0x3f) << 24) |				\
42 	 ((func) & 0xffff))
43 
44 #define	SMCCC_YIELDING_CALL	0
45 #define	SMCCC_FAST_CALL		1
46 
47 #define	SMCCC_32BIT_CALL	0
48 #define	SMCCC_64BIT_CALL	1
49 
50 #define	SMCCC_ARM_ARCH_CALLS		0
51 #define	SMCCC_CPU_SERVICE_CALLS		1
52 #define	SMCCC_SIP_SERVICE_CALLS		2
53 #define	SMCCC_OEM_SERVICE_CALLS		3
54 #define	SMCCC_STD_SECURE_SERVICE_CALLS	4
55 #define	SMCCC_STD_HYP_SERVICE_CALLS	5
56 #define	SMCCC_VENDOR_HYP_SERVICE_CALLS	6
57 
58 struct arm_smccc_res {
59 	register_t a0;
60 	register_t a1;
61 	register_t a2;
62 	register_t a3;
63 };
64 
65 /*
66  * Arm Architecture Calls.
67  * These are documented in the document ARM DEN 0070A.
68  */
69 #define	SMCCC_VERSION							\
70     SMCCC_FUNC_ID(SMCCC_FAST_CALL, SMCCC_32BIT_CALL, 0, 0)
71 #define	SMCCC_ARCH_FEATURES						\
72     SMCCC_FUNC_ID(SMCCC_FAST_CALL, SMCCC_32BIT_CALL, 0, 1)
73 #define	SMCCC_ARCH_WORKAROUND_1						\
74     SMCCC_FUNC_ID(SMCCC_FAST_CALL, SMCCC_32BIT_CALL, 0, 0x8000)
75 #define	SMCCC_ARCH_WORKAROUND_2						\
76     SMCCC_FUNC_ID(SMCCC_FAST_CALL, SMCCC_32BIT_CALL, 0, 0x7fff)
77 
78 /* The return values from ARM DEN 0070A. */
79 #define	SMCCC_RET_SUCCESS		0
80 #define	SMCCC_RET_NOT_SUPPORTED		-1
81 #define	SMCCC_RET_NOT_REQUIRED		-2
82 
83 void smccc_init(void);
84 uint32_t smccc_get_version(void);
85 int32_t smccc_arch_features(uint32_t);
86 int smccc_arch_workaround_1(void);
87 int smccc_arch_workaround_2(int);
88 
89 int arm_smccc_smc(register_t, register_t, register_t, register_t, register_t,
90     register_t, register_t, register_t, struct arm_smccc_res *res);
91 int arm_smccc_hvc(register_t, register_t, register_t, register_t, register_t,
92     register_t, register_t, register_t, struct arm_smccc_res *res);
93 
94 struct arm_smccc_1_2_regs {
95 	register_t a0;
96 	register_t a1;
97 	register_t a2;
98 	register_t a3;
99 	register_t a4;
100 	register_t a5;
101 	register_t a6;
102 	register_t a7;
103 	register_t a8;
104 	register_t a9;
105 	register_t a10;
106 	register_t a11;
107 	register_t a12;
108 	register_t a13;
109 	register_t a14;
110 	register_t a15;
111 	register_t a16;
112 	register_t a17;
113 };
114 
115 int arm_smccc_1_2_hvc(const struct arm_smccc_1_2_regs *args,
116     struct arm_smccc_1_2_regs *res);
117 int arm_smccc_1_2_smc(const struct arm_smccc_1_2_regs *args,
118     struct arm_smccc_1_2_regs *res);
119 #endif /* _PSCI_SMCCC_H_ */
120