1// 2// Copyright 2011 Ettus Research LLC 3// 4// This program is free software: you can redistribute it and/or modify 5// it under the terms of the GNU General Public License as published by 6// the Free Software Foundation, either version 3 of the License, or 7// (at your option) any later version. 8// 9// This program is distributed in the hope that it will be useful, 10// but WITHOUT ANY WARRANTY; without even the implied warranty of 11// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12// GNU General Public License for more details. 13// 14// You should have received a copy of the GNU General Public License 15// along with this program. If not, see <http://www.gnu.org/licenses/>. 16// 17 18 19 20module time_sender 21 (input clk, input rst, 22 input [63:0] vita_time, 23 input send_sync, 24 output reg exp_time_out); 25 26 reg [7:0] datain; 27 reg k; 28 wire [9:0] dataout; 29 reg [9:0] dataout_reg; 30 reg disp_reg; 31 wire disp, new_word; 32 reg [4:0] state; 33 reg [3:0] bit_count; 34 35 encode_8b10b encode_8b10b 36 (.datain({k,datain}),.dispin(disp_reg), 37 .dataout(dataout),.dispout(disp)); 38 39 always @(posedge clk) 40 if(rst) 41 disp_reg <= 0; 42 else if(new_word) 43 disp_reg <= disp; 44 45 always @(posedge clk) 46 if(rst) 47 dataout_reg <= 0; 48 else if(new_word) 49 dataout_reg <= dataout; 50 else 51 dataout_reg <= {1'b0,dataout_reg[9:1]}; 52 53 always @(posedge clk) 54 exp_time_out <= dataout_reg[0]; 55 56 assign new_word = (bit_count == 9); 57 58 always @(posedge clk) 59 if(rst) 60 bit_count <= 0; 61 else if(new_word | send_sync) 62 bit_count <= 0; 63 else 64 bit_count <= bit_count + 1; 65 66 localparam SEND_IDLE = 0; 67 localparam SEND_HEAD = 1; 68 localparam SEND_T0 = 2; 69 localparam SEND_T1 = 3; 70 localparam SEND_T2 = 4; 71 localparam SEND_T3 = 5; 72 localparam SEND_T4 = 6; 73 localparam SEND_T5 = 7; 74 localparam SEND_T6 = 8; 75 localparam SEND_T7 = 9; 76 localparam SEND_TAIL = 10; 77 78 localparam COMMA = 8'hBC; 79 localparam HEAD = 8'h3C; 80 localparam TAIL = 8'hF7; 81 82 reg [63:0] vita_time_reg; 83 84 always @(posedge clk) 85 if(rst) 86 vita_time_reg <= 0; 87 else if(send_sync) 88 vita_time_reg <= vita_time; 89 90 always @(posedge clk) 91 if(rst) 92 begin 93 {k,datain} <= 0; 94 state <= SEND_IDLE; 95 end 96 else 97 if(send_sync) 98 state <= SEND_HEAD; 99 else if(new_word) 100 case(state) 101 SEND_IDLE : 102 {k,datain} <= {1'b1,COMMA}; 103 SEND_HEAD : 104 begin 105 {k,datain} <= {1'b1, HEAD}; 106 state <= SEND_T0; 107 end 108 SEND_T0 : 109 begin 110 {k,datain} <= {1'b0, vita_time_reg[63:56] }; 111 state <= SEND_T1; 112 end 113 SEND_T1 : 114 begin 115 {k,datain} <= {1'b0, vita_time_reg[55:48]}; 116 state <= SEND_T2; 117 end 118 SEND_T2 : 119 begin 120 {k,datain} <= {1'b0, vita_time_reg[47:40]}; 121 state <= SEND_T3; 122 end 123 SEND_T3 : 124 begin 125 {k,datain} <= {1'b0, vita_time_reg[39:32]}; 126 state <= SEND_T4; 127 end 128 SEND_T4 : 129 begin 130 {k,datain} <= {1'b0, vita_time_reg[31:24]}; 131 state <= SEND_T5; 132 end 133 SEND_T5 : 134 begin 135 {k,datain} <= {1'b0, vita_time_reg[23:16]}; 136 state <= SEND_T6; 137 end 138 SEND_T6 : 139 begin 140 {k,datain} <= {1'b0, vita_time_reg[15:8]}; 141 state <= SEND_T7; 142 end 143 SEND_T7 : 144 begin 145 {k,datain} <= {1'b0, vita_time_reg[7:0]}; 146 state <= SEND_TAIL; 147 end 148 SEND_TAIL : 149 begin 150 {k,datain} <= {1'b1, TAIL}; 151 state <= SEND_IDLE; 152 end 153 default : 154 state <= SEND_IDLE; 155 endcase // case(state) 156 157endmodule // time_sender 158