1 /* Target dependent code for GDB on TI C6x systems.
2
3 Copyright (C) 2010-2013 Free Software Foundation, Inc.
4 Contributed by Andrew Jenner <andrew@codesourcery.com>
5 Contributed by Yao Qi <yao@codesourcery.com>
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "server.h"
23 #include "linux-low.h"
24
25 #include <sys/ptrace.h>
26 #include <endian.h>
27
28 #include "gdb_proc_service.h"
29
30 #ifndef PTRACE_GET_THREAD_AREA
31 #define PTRACE_GET_THREAD_AREA 25
32 #endif
33
34 /* There are at most 69 registers accessible in ptrace. */
35 #define TIC6X_NUM_REGS 69
36
37 #include <asm/ptrace.h>
38
39 /* Defined in auto-generated file tic6x-c64xp-linux.c. */
40 void init_registers_tic6x_c64xp_linux (void);
41 /* Defined in auto-generated file tic6x-c64x-linux.c. */
42 void init_registers_tic6x_c64x_linux (void);
43 /* Defined in auto-generated file tic62x-c6xp-linux.c. */
44 void init_registers_tic6x_c62x_linux (void);
45
46 union tic6x_register
47 {
48 unsigned char buf[4];
49
50 int reg32;
51 };
52
53 /* Return the ptrace ``address'' of register REGNO. */
54
55 #if __BYTE_ORDER == __BIG_ENDIAN
56 static int tic6x_regmap_c64xp[] = {
57 /* A0 - A15 */
58 53, 52, 55, 54, 57, 56, 59, 58,
59 61, 60, 63, 62, 65, 64, 67, 66,
60 /* B0 - B15 */
61 23, 22, 25, 24, 27, 26, 29, 28,
62 31, 30, 33, 32, 35, 34, 69, 68,
63 /* CSR PC */
64 5, 4,
65 /* A16 - A31 */
66 37, 36, 39, 38, 41, 40, 43, 42,
67 45, 44, 47, 46, 49, 48, 51, 50,
68 /* B16 - B31 */
69 7, 6, 9, 8, 11, 10, 13, 12,
70 15, 14, 17, 16, 19, 18, 21, 20,
71 /* TSR, ILC, RILC */
72 1, 2, 3
73 };
74
75 static int tic6x_regmap_c64x[] = {
76 /* A0 - A15 */
77 51, 50, 53, 52, 55, 54, 57, 56,
78 59, 58, 61, 60, 63, 62, 65, 64,
79 /* B0 - B15 */
80 21, 20, 23, 22, 25, 24, 27, 26,
81 29, 28, 31, 30, 33, 32, 67, 66,
82 /* CSR PC */
83 3, 2,
84 /* A16 - A31 */
85 35, 34, 37, 36, 39, 38, 41, 40,
86 43, 42, 45, 44, 47, 46, 49, 48,
87 /* B16 - B31 */
88 5, 4, 7, 6, 9, 8, 11, 10,
89 13, 12, 15, 14, 17, 16, 19, 18,
90 -1, -1, -1
91 };
92
93 static int tic6x_regmap_c62x[] = {
94 /* A0 - A15 */
95 19, 18, 21, 20, 23, 22, 25, 24,
96 27, 26, 29, 28, 31, 30, 33, 32,
97 /* B0 - B15 */
98 5, 4, 7, 6, 9, 8, 11, 10,
99 13, 12, 15, 14, 17, 16, 35, 34,
100 /* CSR, PC */
101 3, 2,
102 -1, -1, -1, -1, -1, -1, -1, -1,
103 -1, -1, -1, -1, -1, -1, -1, -1,
104 -1, -1, -1, -1, -1, -1, -1, -1,
105 -1, -1, -1, -1, -1, -1, -1, -1,
106 -1, -1, -1
107 };
108
109 #else
110 static int tic6x_regmap_c64xp[] = {
111 /* A0 - A15 */
112 52, 53, 54, 55, 56, 57, 58, 59,
113 60, 61, 62, 63, 64, 65, 66, 67,
114 /* B0 - B15 */
115 22, 23, 24, 25, 26, 27, 28, 29,
116 30, 31, 32, 33, 34, 35, 68, 69,
117 /* CSR PC */
118 4, 5,
119 /* A16 - A31 */
120 36, 37, 38, 39, 40, 41, 42, 43,
121 44, 45, 46, 47, 48, 49, 50, 51,
122 /* B16 -B31 */
123 6, 7, 8, 9, 10, 11, 12, 13,
124 14, 15, 16, 17, 18, 19, 20, 31,
125 /* TSR, ILC, RILC */
126 0, 3, 2
127 };
128
129 static int tic6x_regmap_c64x[] = {
130 /* A0 - A15 */
131 50, 51, 52, 53, 54, 55, 56, 57,
132 58, 59, 60, 61, 62, 63, 64, 65,
133 /* B0 - B15 */
134 20, 21, 22, 23, 24, 25, 26, 27,
135 28, 29, 30, 31, 32, 33, 66, 67,
136 /* CSR PC */
137 2, 3,
138 /* A16 - A31 */
139 34, 35, 36, 37, 38, 39, 40, 41,
140 42, 43, 44, 45, 46, 47, 48, 49,
141 /* B16 - B31 */
142 4, 5, 6, 7, 8, 9, 10, 11,
143 12, 13, 14, 15, 16, 17, 18, 19,
144 -1, -1, -1
145 };
146
147 static int tic6x_regmap_c62x[] = {
148 /* A0 - A15 */
149 18, 19, 20, 21, 22, 23, 24, 25,
150 26, 27, 28, 29, 30, 31, 32, 33,
151 /* B0 - B15 */
152 4, 5, 6, 7, 8, 9, 10, 11,
153 12, 13, 14, 15, 16, 17, 34, 35,
154 /* CSR PC */
155 2, 3,
156 -1, -1, -1, -1, -1, -1, -1, -1,
157 -1, -1, -1, -1, -1, -1, -1, -1,
158 -1, -1, -1, -1, -1, -1, -1, -1,
159 -1, -1, -1, -1, -1, -1, -1, -1,
160 -1, -1, -1
161 };
162
163 #endif
164
165 extern struct linux_target_ops the_low_target;
166
167 static int *tic6x_regmap;
168 static unsigned int tic6x_breakpoint;
169
170 static void
tic6x_arch_setup(void)171 tic6x_arch_setup (void)
172 {
173 register unsigned int csr asm ("B2");
174 unsigned int cpuid;
175
176 /* Determine the CPU we're running on to find the register order. */
177 __asm__ ("MVC .S2 CSR,%0" : "=r" (csr) :);
178 cpuid = csr >> 24;
179 switch (cpuid)
180 {
181 case 0x00: /* C62x */
182 case 0x02: /* C67x */
183 tic6x_regmap = tic6x_regmap_c62x;
184 tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
185 init_registers_tic6x_c62x_linux ();
186 break;
187 case 0x03: /* C67x+ */
188 tic6x_regmap = tic6x_regmap_c64x;
189 tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
190 init_registers_tic6x_c64x_linux ();
191 break;
192 case 0x0c: /* C64x */
193 tic6x_regmap = tic6x_regmap_c64x;
194 tic6x_breakpoint = 0x0000a122; /* BNOP .S2 0,5 */
195 init_registers_tic6x_c64x_linux ();
196 break;
197 case 0x10: /* C64x+ */
198 case 0x14: /* C674x */
199 case 0x15: /* C66x */
200 tic6x_regmap = tic6x_regmap_c64xp;
201 tic6x_breakpoint = 0x56454314; /* illegal opcode */
202 init_registers_tic6x_c64xp_linux ();
203 break;
204 default:
205 error ("Unknown CPU ID 0x%02x", cpuid);
206 }
207 the_low_target.regmap = tic6x_regmap;
208 }
209
210 static int
tic6x_cannot_fetch_register(int regno)211 tic6x_cannot_fetch_register (int regno)
212 {
213 return (tic6x_regmap[regno] == -1);
214 }
215
216 static int
tic6x_cannot_store_register(int regno)217 tic6x_cannot_store_register (int regno)
218 {
219 return (tic6x_regmap[regno] == -1);
220 }
221
222 static CORE_ADDR
tic6x_get_pc(struct regcache * regcache)223 tic6x_get_pc (struct regcache *regcache)
224 {
225 union tic6x_register pc;
226
227 collect_register_by_name (regcache, "PC", pc.buf);
228 return pc.reg32;
229 }
230
231 static void
tic6x_set_pc(struct regcache * regcache,CORE_ADDR pc)232 tic6x_set_pc (struct regcache *regcache, CORE_ADDR pc)
233 {
234 union tic6x_register newpc;
235
236 newpc.reg32 = pc;
237 supply_register_by_name (regcache, "PC", newpc.buf);
238 }
239
240 #define tic6x_breakpoint_len 4
241
242 static int
tic6x_breakpoint_at(CORE_ADDR where)243 tic6x_breakpoint_at (CORE_ADDR where)
244 {
245 unsigned int insn;
246
247 (*the_target->read_memory) (where, (unsigned char *) &insn, 4);
248 if (insn == tic6x_breakpoint)
249 return 1;
250
251 /* If necessary, recognize more trap instructions here. GDB only uses the
252 one. */
253 return 0;
254 }
255
256 /* Fetch the thread-local storage pointer for libthread_db. */
257
258 ps_err_e
ps_get_thread_area(const struct ps_prochandle * ph,lwpid_t lwpid,int idx,void ** base)259 ps_get_thread_area (const struct ps_prochandle *ph,
260 lwpid_t lwpid, int idx, void **base)
261 {
262 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
263 return PS_ERR;
264
265 /* IDX is the bias from the thread pointer to the beginning of the
266 thread descriptor. It has to be subtracted due to implementation
267 quirks in libthread_db. */
268 *base = (void *) ((char *) *base - idx);
269
270 return PS_OK;
271 }
272
273 static void
tic6x_collect_register(struct regcache * regcache,int regno,union tic6x_register * reg)274 tic6x_collect_register (struct regcache *regcache, int regno,
275 union tic6x_register *reg)
276 {
277 union tic6x_register tmp_reg;
278
279 collect_register (regcache, regno, &tmp_reg.reg32);
280 reg->reg32 = tmp_reg.reg32;
281 }
282
283 static void
tic6x_supply_register(struct regcache * regcache,int regno,const union tic6x_register * reg)284 tic6x_supply_register (struct regcache *regcache, int regno,
285 const union tic6x_register *reg)
286 {
287 int offset = 0;
288
289 supply_register (regcache, regno, reg->buf + offset);
290 }
291
292 static void
tic6x_fill_gregset(struct regcache * regcache,void * buf)293 tic6x_fill_gregset (struct regcache *regcache, void *buf)
294 {
295 union tic6x_register *regset = buf;
296 int i;
297
298 for (i = 0; i < TIC6X_NUM_REGS; i++)
299 if (tic6x_regmap[i] != -1)
300 tic6x_collect_register (regcache, i, regset + tic6x_regmap[i]);
301 }
302
303 static void
tic6x_store_gregset(struct regcache * regcache,const void * buf)304 tic6x_store_gregset (struct regcache *regcache, const void *buf)
305 {
306 const union tic6x_register *regset = buf;
307 int i;
308
309 for (i = 0; i < TIC6X_NUM_REGS; i++)
310 if (tic6x_regmap[i] != -1)
311 tic6x_supply_register (regcache, i, regset + tic6x_regmap[i]);
312 }
313
314 struct regset_info target_regsets[] = {
315 { PTRACE_GETREGS, PTRACE_SETREGS, 0, TIC6X_NUM_REGS * 4, GENERAL_REGS,
316 tic6x_fill_gregset, tic6x_store_gregset },
317 { 0, 0, 0, -1, -1, NULL, NULL }
318 };
319
320 struct linux_target_ops the_low_target = {
321 tic6x_arch_setup,
322 TIC6X_NUM_REGS,
323 0,
324 NULL,
325 tic6x_cannot_fetch_register,
326 tic6x_cannot_store_register,
327 NULL, /* fetch_register */
328 tic6x_get_pc,
329 tic6x_set_pc,
330 (const unsigned char *) &tic6x_breakpoint,
331 tic6x_breakpoint_len,
332 NULL,
333 0,
334 tic6x_breakpoint_at,
335 };
336