1//
2// Copyright 2011 Ettus Research LLC
3//
4// This program is free software: you can redistribute it and/or modify
5// it under the terms of the GNU General Public License as published by
6// the Free Software Foundation, either version 3 of the License, or
7// (at your option) any later version.
8//
9// This program is distributed in the hope that it will be useful,
10// but WITHOUT ANY WARRANTY; without even the implied warranty of
11// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12// GNU General Public License for more details.
13//
14// You should have received a copy of the GNU General Public License
15// along with this program.  If not, see <http://www.gnu.org/licenses/>.
16//
17
18module integrate
19  #(parameter INPUTW = 16,
20    parameter ACCUMW = 32,
21    parameter OUTPUTW = 16)
22
23   (input clk_i,
24    input rst_i,
25    input ena_i,
26
27    input dump_i,
28    input [INPUTW-1:0] data_i,
29
30    output reg stb_o,
31    output reg [OUTPUTW-1:0] integ_o
32   );
33
34   wire [ACCUMW-1:0] data_ext = {{ACCUMW-INPUTW{data_i[INPUTW-1]}},data_i};
35   reg  [ACCUMW-1:0] accum;
36
37   always @(posedge clk_i)
38     if (rst_i | ~ena_i)
39       begin
40	  accum <= 0;
41	  integ_o <= 0;
42       end
43     else
44       if (dump_i)
45	 begin
46	    integ_o <= accum[ACCUMW-1:ACCUMW-OUTPUTW];
47	    accum <= data_ext;
48	 end
49       else
50	 accum <= accum + data_ext;
51
52   always @(posedge clk_i)
53     stb_o <= dump_i;
54
55endmodule // integrate
56