1 #ifndef __MACH64_REGS_H__ 2 #define __MACH64_REGS_H__ 3 4 /* LCD Panel registers */ 5 #define CONFIG_PANEL 0x00 6 #define LCD_GEN_CTRL 0x01 7 #define DSTN_CONTROL 0x02 8 #define HFB_PITCH_ADDR 0x03 9 #define HORZ_STRETCHING 0x04 10 #define VERT_STRETCHING 0x05 11 #define EXT_VERT_STRETCH 0x06 12 #define LT_GIO 0x07 13 #define POWER_MANAGEMENT 0x08 14 #define ZVGPIO 0x09 15 #define ICON_CLR0 0x0A 16 #define ICON_CLR1 0x0B 17 #define ICON_OFFSET 0x0C 18 #define ICON_HORZ_VERT_POSN 0x0D 19 #define ICON_HORZ_VERT_OFF 0x0E 20 #define ICON2_CLR0 0x0F 21 #define ICON2_CLR1 0x10 22 #define ICON2_OFFSET 0x11 23 #define ICON2_HORZ_VERT_POSN 0x12 24 #define ICON2_HORZ_VERT_OFF 0x13 25 #define LCD_MISC_CNTL 0x14 26 #define TMDS_CNTL 0x15 27 #define SCRATCH_PAD_4 0x15 28 #define TMDS_SYNC_CHAR_SETA 0x16 29 #define SCRATCH_PAD_5 0x16 30 #define TMDS_SYNC_CHAR_SETB 0x17 31 #define SCRATCH_PAD_6 0x17 32 #define TMDS_CRC 0x18 33 #define SCRATCH_PAD_7 0x18 34 #define PLTSTBLK_GEN_SEED 0x19 35 #define SCRATCH_PAD_8 0x19 36 #define SYNC_GEN_CNTL 0x1A 37 #define PATTERN_GEN_SEED 0x1B 38 #define APC_CNTL 0x1C 39 #define POWER_MANAGEMENT_2 0x1D 40 #define PRI_ERR_PATTERN 0x1E 41 #define CUR_ERR_PATTERN 0x1F 42 #define PLTSTBLK_RPT 0x20 43 #define SYNC_RPT 0x21 44 #define CRC_PATTERN_RPT 0x22 45 #define PL_TRANSMITTER_CNTL 0x23 46 #define PL_PLL_CNTL 0x24 47 #define ALPHA_BLENDING 0x25 48 #define PORTRAIT_GEN_CNTL 0x26 49 #define APC_CTRL_IO 0x27 50 #define TEST_IO 0x28 51 #define TEST_OUTPUTS 0x29 52 #define DP1_MEM_ACCESS 0x2A 53 #define DP0_MEM_ACCESS 0x2B 54 #define DP0_DEBUG_A 0x2C 55 #define DP0_DEBUG_B 0x2D 56 #define DP1_DEBUG_A 0x2E 57 #define DP1_DEBUG_B 0x2F 58 #define DPCTRL_DEBUG_A 0x30 59 #define DPCTRL_DEBUG_B 0x31 60 #define MEMBLK_DEBUG 0x32 61 /* #define SCRATCH_PAD_4 0x33 */ 62 #define APC_LUT_AB 0x33 63 /* #define SCRATCH_PAD_5 0x34 */ 64 #define APC_LUT_CD 0x34 65 /* #define SCRATCH_PAD_6 0x35 */ 66 #define APC_LUT_EF 0x25 67 /* #define SCRATCH_PAD_7 0x36 */ 68 #define APC_LUT_GH 0x36 69 /* #define SCRATCH_PAD_8 0x37 */ 70 #define APC_LUT_IJ 0x37 71 #define APC_LUT_KL 0x38 72 #define APC_LUT_MN 0x39 73 #define APC_LUT_OP 0x3A 74 75 /* LCD_GEN_CTRL */ 76 #define LCD_ON 0x00000002 77 78 /* VERT_STRETCHING */ 79 #define VERT_STRETCH_RATIO0 0x000003FF 80 #define VERT_STRETCH_EN 0x80000000 81 82 83 /* PLL registers */ 84 #define MPLL_CNTL 0x00 85 #define VPLL_CNTL 0x01 86 #define PLL_REF_DIV 0x02 87 #define PLL_GEN_CNTL 0x03 88 #define MCLK_FB_DIV 0x04 89 #define PLL_VCLK_CNTL 0x05 90 #define VCLK_POST_DIV 0x06 91 #define VCLK0_FB_DIV 0x07 92 #define VCLK1_FB_DIV 0x08 93 #define VCLK2_FB_DIV 0x09 94 #define VCLK3_FB_DIV 0x0A 95 #define PLL_EXT_CNTL 0x0B 96 #define DLL_CNTL 0x0C 97 #define DLL1_CNTL 0x0C 98 #define VFC_CNTL 0x0D 99 #define PLL_TEST_CNTL 0x0E 100 #define PLL_TEST_COUNT 0x0F 101 #define LVDSPLL_CNTL0 0x10 102 #define LVDS_CNTL0 0x10 103 #define LVDSPLL_CNTL1 0x11 104 #define LVDS_CNTL1 0x11 105 #define AGP1_CNTL 0x12 106 #define AGP2_CNTL 0x13 107 #define DLL2_CNTL 0x14 108 #define SCLK_FB_DIV 0x15 109 #define SPLL_CNTL1 0x16 110 #define SPLL_CNTL2 0x17 111 #define APLL_STRAPS 0x18 112 #define EXT_VPLL_CNTL 0x19 113 #define EXT_VPLL_REF_DIV 0x1A 114 #define EXT_VPLL_FB_DIV 0x1B 115 #define EXT_VPLL_MSB 0x1C 116 #define HTOTAL_CNTL 0x1D 117 #define BYTE_CLK_CNTL 0x1E 118 #define TV_PLL_CNTL1 0x1F 119 #define TV_PLL_CNTL2 0x20 120 #define TV_PLL_CNTL 0x21 121 #define EXT_TV_PLL 0x22 122 #define V2PLL_CNTL 0x23 123 #define PLL_V2CLK_CNTL 0x24 124 #define EXT_V2PLL_REF_DIV 0x25 125 #define EXT_V2PLL_FB_DIV 0x26 126 #define EXT_V2PLL_MSB 0x27 127 #define HTOTAL2_CNTL 0x28 128 #define PLL_YCLK_CNTL 0x29 129 #define PM_DYN_CLK_CNTL 0x2A 130 131 /* PLL_VCLK_CNTL */ 132 #define ECP_DIV 0x30 133 134 135 /* TV Out registers */ 136 /* 0x00 - 0x0F */ 137 #define TV_MASTER_CNTL 0x10 138 /* 0x11 */ 139 #define TV_RGB_CNTL 0x12 140 /* 0x13 */ 141 #define TV_SYNC_CNTL 0x14 142 /* 0x15 - 1F */ 143 #define TV_HTOTAL 0x20 144 #define TV_HDISP 0x21 145 #define TV_HSIZE 0x22 146 #define TV_HSTART 0x23 147 #define TV_HCOUNT 0x24 148 #define TV_VTOTAL 0x25 149 #define TV_VDISP 0x26 150 #define TV_VCOUNT 0x27 151 #define TV_FTOTAL 0x28 152 #define TV_FCOUNT 0x29 153 #define TV_FRESTART 0x2A 154 #define TV_HRESTART 0x2B 155 #define TV_VRESTART 0x2C 156 /* 0x2D - 0x5F */ 157 #define TV_HOST_READ_DATA 0x60 158 #define TV_HOST_WRITE_DATA 0x61 159 #define TV_HOST_RD_WT_CNTL 0x62 160 /* 0x63 - 0x6F */ 161 #define TV_VSCALER_CNTL 0x70 162 #define TV_TIMING_CNTL 0x71 163 #define TV_GAMMA_CNTL 0x72 164 #define TV_Y_FALL_CNTL 0x73 165 #define TV_Y_RISE_CNTL 0x74 166 #define TV_Y_SAW_TOOTH_CNTL 0x75 167 /* 0x76 - 0x7F */ 168 #define TV_MODULATOR_CNTL1 0x80 169 #define TV_MODULATOR_CNTL2 0x81 170 /* 0x82 - 0x8F */ 171 #define TV_PRE_DAC_MUX_CNTL 0x90 172 /* 0x91 - 0x9F */ 173 #define TV_DAC_CNTL 0xA0 174 /* 0xA1 - 0xAF */ 175 #define TV_CRC_CNTL 0xB0 176 #define TV_VIDEO_PORT_SIG 0xB1 177 /* 0xB2 - 0xB7 */ 178 #define TV_VBI_CC_CNTL 0xB8 179 #define TV_VBI_EDS_CNTL 0xB9 180 #define TV_VBI_20BIT_CNTL 0xBA 181 /* 0xBB - 0xBC */ 182 #define TV_VBI_DTO_CNTL 0xBD 183 #define TV_VBI_LEVEL_CNTL 0xBE 184 /* 0xBF */ 185 #define TV_UV_ADR 0xC0 186 #define TV_FIFO_TEST_CNTL 0xC1 187 /* 0xC2 - 0xFF */ 188 189 190 /* Main registers */ 191 #define CRTC_H_TOTAL_DISP 0x000 192 #define CRTC2_H_TOTAL_DISP 0x000 193 #define CRTC_H_SYNC_STRT_WID 0x004 194 #define CRTC2_H_SYNC_STRT_WID 0x004 195 #define CRTC_V_TOTAL_DISP 0x008 196 #define CRTC2_V_TOTAL_DISP 0x008 197 #define CRTC_V_SYNC_STRT_WID 0x00C 198 #define CRTC2_V_SYNC_STRT_WID 0x00C 199 #define CRTC_VLINE_CRNT_VLINE 0x010 200 #define CRTC2_VLINE_CRNT_VLINE 0x010 201 #define CRTC_OFF_PITCH 0x014 202 #define CRTC_INT_CNTL 0x018 203 #define CRTC_GEN_CNTL 0x01C 204 #define TV_OUT_INDEX 0x01D 205 #define DSP_CONFIG 0x020 206 #define PM_DSP_CONFIG 0x020 207 #define DSP_ON_OFF 0x024 208 #define PM_DSP_ON_OFF 0x024 209 #define TV_OUT_DATA 0x01D 210 #define TIMER_CONFIG 0x028 211 #define MEM_BUF_CNTL 0x02C 212 #define SHARED_CNTL 0x030 213 #define SHARED_MEM_CONFIG 0x034 214 #define MEM_ADDR_CONFIG 0x034 215 #define CRT_TRAP 0x038 216 #define I2C_CNTL_0 0x03C 217 #define DSTN_CONTROL_LT 0x03C 218 #define OVR_CLR 0x040 219 #define OVR2_CLR 0x040 220 #define OVR_WID_LEFT_RIGHT 0x044 221 #define OVR2_WID_LEFT_RIGHT 0x044 222 #define OVR_WID_TOP_BOTTOM 0x048 223 #define OVR2_WID_TOP_BOTTOM 0x048 224 #define VGA_DSP_CONFIG 0x04C 225 #define PM_VGA_DSP_CONFIG 0x04C 226 #define VGA_DSP_ON_OFF 0x050 227 #define PM_VGA_DSP_ON_OFF 0x050 228 #define DSP2_CONFIG 0x054 229 #define PM_DSP2_CONFIG 0x054 230 #define DSP2_ON_OFF 0x058 231 #define PM_DSP2_ON_OFF 0x058 232 #define CRTC2_OFF_PITCH 0x05C 233 #define CUR_CLR0 0x060 234 #define CUR2_CLR0 0x060 235 #define CUR_CLR1 0x064 236 #define CUR2_CLR1 0x064 237 #define CUR_OFFSET 0x068 238 #define CUR2_OFFSET 0x068 239 #define CUR_HORZ_VERT_POSN 0x06C 240 #define CUR2_HORZ_VERT_POSN 0x06C 241 #define CUR_HORZ_VERT_OFF 0x070 242 #define CUR2_HORZ_VERT_OFF 0x070 243 #define CONFIG_PANEL_LT 0x074 244 #define GP_IO 0x078 245 #define HW_DEBUG 0x07C 246 #define SCRATCH_REG0 0x080 247 #define SCRATCH_REG1 0x084 248 #define SCRATCH_REG2 0x088 249 #define SCRATCH_REG3 0x08C 250 #define CLOCK_CNTL 0x090 251 #define CLOCK_CNTL0 0x090 252 #define CLOCK_CNTL1 0x091 253 #define CLOCK_CNTL2 0x092 254 #define CLOCK_CNTL3 0x093 255 #define CONFIG_STAT1 0x094 256 #define CONFIG_STAT2 0x098 257 /* 0x09C */ 258 #define BUS_CNTL 0x0A0 259 #define LCD_INDEX 0x0A4 260 #define LCD_DATA 0x0A8 261 #define HFB_PITCH_ADDR_LT 0x0A8 262 #define EXT_MEM_CNTL 0x0AC 263 #define MEM_CNTL 0x0B0 264 #define MEM_VGA_WP_SEL 0x0B4 265 #define MEM_VGA_RP_SEL 0x0B8 266 #define I2C_CNTL_1 0x0BC 267 #define LT_GIO_LT 0x0BC 268 #define DAC_REGS 0x0C0 269 #define DAC_CNTL 0x0C4 270 #define EXT_DAC_REGS 0x0C8 271 #define HORZ_STRETCHING_LT 0x0C8 272 #define VERT_STRETCHING_LT 0x0CC 273 #define GEN_TEST_CNTL 0x0D0 274 #define CUSTOM_MACRO_CNTL 0x0D4 275 #define LCD_GEN_CTRL_LT 0x0D4 276 #define POWER_MANAGEMENT_LT 0x0D8 277 #define CONFIG_CNTL 0x0DC 278 #define CONFIG_CHIP_ID 0x0E0 279 #define CONFIG_STAT0 0x0E4 280 #define CRC_SIG 0x0E8 281 #define CRC2_SIG 0x0E8 282 /* 0x0EC - 0x0FC */ 283 #define DST_OFF_PITCH 0x100 284 #define DST_X 0x104 285 #define DST_Y 0x108 286 #define DST_Y_X 0x10C 287 #define DST_WIDTH 0x110 288 #define DST_HEIGHT 0x114 289 #define DST_HEIGHT_WIDTH 0x118 290 #define DST_X_WIDTH 0x11C 291 #define DST_BRES_LNTH 0x120 292 /* #define LEAD_BRES_LNTH 0x120 */ 293 #define DST_BRES_ERR 0x124 294 #define LEAD_BRES_ERR 0x124 295 #define DST_BRES_INC 0x128 296 #define LEAD_BRES_INC 0x128 297 #define DST_BRES_DEC 0x12C 298 #define LEAD_BRES_DEC 0x12C 299 #define DST_CNTL 0x130 300 /* #define DST_Y_X 0x134 */ 301 #define TRAIL_BRES_ERR 0x138 302 #define TRAIL_BRES_INC 0x13C 303 #define TRAIL_BRES_DEC 0x140 304 #define LEAD_BRES_LNTH 0x144 305 #define Z_OFF_PITCH 0x148 306 #define Z_CNTL 0x14C 307 #define ALPHA_TST_CNTL 0x150 308 /* 0x154 */ 309 #define SECONDARY_STW_EXP 0x158 310 #define SECONDARY_S_X_INC 0x15C 311 #define SECONDARY_S_Y_INC 0x160 312 #define SECONDARY_S_START 0x164 313 #define SECONDARY_W_X_INC 0x168 314 #define SECONDARY_W_Y_INC 0x16C 315 #define SECONDARY_W_START 0x170 316 #define SECONDARY_T_X_INC 0x174 317 #define SECONDARY_T_Y_INC 0x178 318 #define SECONDARY_T_START 0x17C 319 #define SRC_OFF_PITCH 0x180 320 #define SRC_X 0x184 321 #define SRC_Y 0x188 322 #define SRC_Y_X 0x18C 323 #define SRC_WIDTH1 0x190 324 #define SRC_HEIGHT1 0x194 325 #define SRC_HEIGHT1_WIDTH1 0x198 326 #define SRC_X_START 0x19C 327 #define SRC_Y_START 0x1A0 328 #define SRC_Y_X_START 0x1A4 329 #define SRC_WIDTH2 0x1A8 330 #define SRC_HEIGHT2 0x1AC 331 #define SRC_HEIGHT2_WIDTH2 0x1B0 332 #define SRC_CNTL 0x1B4 333 /* 0x1B8 - 0x1BC */ 334 #define SCALE_Y_OFF 0x1C0 335 #define SCALE_OFF 0x1C0 336 #define TEX_0_OFF 0x1C0 337 #define SECONDARY_SCALE_OFF 0x1C4 338 #define TEX_1_OFF 0x1C4 339 #define TEX_2_OFF 0x1C8 340 #define TEX_3_OFF 0x1CC 341 #define TEX_4_OFF 0x1D0 342 #define TEX_5_OFF 0x1D4 343 #define TEX_6_OFF 0x1D8 344 #define SCALE_WIDTH 0x1DC 345 #define TEX_7_OFF 0x1DC 346 #define SCALE_HEIGHT 0x1E0 347 #define TEX_8_OFF 0x1E0 348 #define TEX_9_OFF 0x1E4 349 #define TEX_10_OFF 0x1E8 350 #define SCALE_Y_PITCH 0x1EC 351 #define SCALE_PITCH 0x1EC 352 /* #define S_Y_INC 0x1EC */ 353 #define SCALE_X_INC 0x1F0 354 /* #define RED_X_INC 0x1F0 */ 355 #define SCALE_Y_INC 0x1F4 356 /* #define GREEN_X_INC 0x1F4 */ 357 #define SCALE_VACC 0x1F8 358 #define SCALE_3D_CNTL 0x1FC 359 #define HOST_DATA0 0x200 360 #define HOST_DATA1 0x204 361 #define HOST_DATA2 0x208 362 #define HOST_DATA3 0x20C 363 #define HOST_DATA4 0x210 364 #define HOST_DATA5 0x214 365 #define HOST_DATA6 0x218 366 #define HOST_DATA7 0x21C 367 #define HOST_DATA8 0x220 368 #define HOST_DATA9 0x224 369 #define HOST_DATAA 0x228 370 #define HOST_DATAB 0x22C 371 #define HOST_DATAC 0x230 372 #define HOST_DATAD 0x234 373 #define HOST_DATAE 0x238 374 #define HOST_DATAF 0x23C 375 #define HOST_CNTL 0x240 376 #define BM_HOSTDATA 0x244 377 #define BM_ADDR 0x248 378 #define BM_DATA 0x248 379 #define BM_GUI_TABLE_CMD 0x24C 380 /* 0x250 - 0x27C */ 381 #define PAT_REG0 0x280 382 #define PAT_REG1 0x284 383 #define PAT_CNTL 0x288 384 /* 0x28C - 0x29C */ 385 #define SC_LEFT 0x2A0 386 #define SC_RIGHT 0x2A4 387 #define SC_LEFT_RIGHT 0x2A8 388 #define SC_TOP 0x2AC 389 #define SC_BOTTOM 0x2B0 390 #define SC_TOP_BOTTOM 0x2B4 391 #define USR1_DST_OFF_PITCH 0x2B8 392 #define USR2_DST_OFF_PITCH 0x2BC 393 #define DP_BKGD_CLR 0x2C0 394 #define DP_FRGD_CLR 0x2C4 395 #define DP_FOG_CLR 0x2C4 396 #define DP_WRITE_MSK 0x2C8 397 #define DP_CHAIN_MSK 0x2CC 398 #define DP_PIX_WIDTH 0x2D0 399 #define DP_MIX 0x2D4 400 #define DP_SRC 0x2D8 401 #define DP_FRGD_CLR_MIX 0x2DC 402 #define DP_FRGD_BKGD_CLR 0x2E0 403 /* 0x2E4 */ 404 #define DST_X_Y 0x2E8 405 #define DST_WIDTH_HEIGHT 0x2EC 406 #define USR_DST_PITCH 0x2F0 407 /* 0x2F4 */ 408 #define DP_SET_GUI_ENGINE2 0x2F8 409 #define DP_SET_GUI_ENGINE 0x2FC 410 #define CLR_CMP_CLR 0x300 411 #define CLR_CMP_MSK 0x304 412 #define CLR_CMP_CNTL 0x308 413 /* 0x30C */ 414 #define FIFO_STAT 0x310 415 /* 0x314 - 0x31C */ 416 #define CONTEXT_MSK 0x320 417 /* 0x324 */ 418 /* 0x328 */ 419 #define CONTEXT_LOAD_CNTL 0x32C 420 #define GUI_TRAJ_CNTL 0x330 421 /* 0x334 */ 422 #define GUI_STAT 0x338 423 /* 0x33C */ 424 #define S_X_INC2 0x340 425 #define TEX_PALETTE_INDEX 0x340 426 #define S_Y_INC2 0x344 427 #define STW_EXP 0x344 428 #define S_XY_INC2 0x348 429 #define LOG_MAX_INC 0x348 430 #define S_X_INC_START 0x34C 431 #define S_X_INC 0x34C 432 #define S_Y_INC 0x350 433 /* #define SCALE_Y_PITCH 0x350 */ 434 /* #define SCALE_PITCH 0x350 */ 435 #define S_START 0x354 436 #define T_X_INC2 0x358 437 #define W_X_INC 0x358 438 #define T_Y_INC2 0x35C 439 #define W_Y_INC 0x35C 440 #define T_XY_INC2 0x360 441 #define W_START 0x360 442 #define T_X_INC_START 0x364 443 #define T_X_INC 0x364 444 #define SECONDARY_SCALE_PITCH 0x368 445 #define T_Y_INC 0x368 446 #define T_START 0x36C 447 #define TEX_SIZE_PITCH 0x370 448 #define TEX_CNTL 0x374 449 #define SECONDARY_TEX_OFFSET 0x378 450 #define TEX_PAL_WR 0x37C 451 #define TEX_PALETTE 0x37C 452 #define SCALE_PITCH_BOTH 0x380 453 #define SECONDARY_SCALE_OFF_ACC 0x384 454 #define SCALE_OFF_ACC 0x388 455 #define SCALE_DST_Y_X 0x38C 456 /* 0x390 - 0x394 */ 457 #define COMPOSITE_SHADOW_ID 0x398 458 #define SECONDARY_SCALE_X_INC 0x39C 459 #define SPECULAR_RED_X_INC 0x39C 460 #define SPECULAR_RED_Y_INC 0x3A0 461 #define SECONDARY_SCALE_HACC 0x3A4 462 #define SPECULAR_RED_START 0x3A4 463 #define SPECULAR_GREEN_X_INC 0x3A8 464 #define SPECULAR_GREEN_Y_INC 0x3AC 465 #define SPECULAR_GREEN_START 0x3B0 466 #define SPECULAR_BLUE_X_INC 0x3B4 467 #define SPECULAR_BLUE_Y_INC 0x3B8 468 #define SPECULAR_BLUE_START 0x3BC 469 /* #define SCALE_X_INC 0x3C0 */ 470 #define RED_X_INC 0x3C0 471 #define RED_Y_INC 0x3C4 472 #define SCALE_HACC 0x3C8 473 #define RED_START 0x3C8 474 /* #define SCALE_Y_INC 0x3CC */ 475 #define GREEN_X_INC 0x3CC 476 #define SECONDARY_SCALE_Y_INC 0x3D0 477 #define GREEN_Y_INC 0x3D0 478 #define SECONDARY_SCALE_VACC 0x3D4 479 #define GREEN_START 0x3D4 480 #define SCALE_XUV_INC 0x3D8 481 #define BLUE_X_INC 0x3D8 482 #define BLUE_Y_INC 0x3DC 483 #define SCALE_UV_HACC 0x3E0 484 #define BLUE_START 0x3E0 485 #define Z_X_INC 0x3E4 486 #define Z_Y_INC 0x3E8 487 #define Z_START 0x3EC 488 #define ALPHA_X_INC 0x3F0 489 #define FOG_X_INC 0x3F0 490 #define ALPHA_Y_INC 0x3F4 491 #define FOG_Y_INC 0x3F4 492 #define ALPHA_START 0x3F8 493 #define FOG_START 0x3F8 494 /* 0x3FC */ 495 #define OVERLAY_Y_X_START 0x400 496 #define OVERLAY_Y_X_END 0x404 497 #define OVERLAY_VIDEO_KEY_CLR 0x408 498 #define OVERLAY_VIDEO_KEY_MSK 0x40C 499 #define OVERLAY_GRAPHICS_KEY_CLR 0x410 500 #define OVERLAY_GRAPHICS_KEY_MSK 0x414 501 #define OVERLAY_KEY_CNTL 0x418 502 /* 0x41C */ 503 #define OVERLAY_SCALE_INC 0x420 504 #define OVERLAY_SCALE_CNTL 0x424 505 #define SCALER_HEIGHT_WIDTH 0x428 506 #define SCALER_TEST 0x42C 507 /* 0x430 */ 508 #define SCALER_BUF0_OFFSET 0x434 509 #define SCALER_BUF1_OFFSET 0x438 510 #define SCALER_BUF_PITCH 0x43C 511 #define CAPTURE_START_END 0x440 512 #define CAPTURE_X_WIDTH 0x444 513 #define VIDEO_FORMAT 0x448 514 #define VBI_START_END 0x44C 515 #define CAPTURE_CONFIG 0x450 516 #define TRIG_CNTL 0x454 517 #define OVERLAY_EXCLUSIVE_HORZ 0x458 518 #define OVERLAY_EXCLUSIVE_VERT 0x45C 519 #define VBI_WIDTH 0x460 520 #define CAPTURE_DEBUG 0x464 521 #define VIDEO_SYNC_TEST 0x468 522 /* 0x46C */ 523 #define SNAPSHOT_VH_COUNTS 0x470 524 #define SNAPSHOT_F_COUNT 0x474 525 #define N_VIF_COUNT 0x478 526 #define SNAPSHOT_VIF_COUNT 0x47C 527 #define BUF0_OFFSET 0x480 528 #define CAPTURE_BUF0_OFFSET 0x480 529 #define CAPTURE_BUF1_OFFSET 0x484 530 #define ONESHOT_BUF_OFFSET 0x488 531 #define CAPTURE_BUF_PITCH 0x488 532 #define BUF0_PITCH 0x48C 533 /* 0x490 - 0x494 */ 534 #define BUF1_OFFSET 0x498 535 /* 0x49C - 0x4A0 */ 536 #define BUF1_PITCH 0x4A4 537 /* 0x4A8 */ 538 #define BUF0_CAP_OFFSET 0x4AC 539 #define BUF1_CAP_OFFSET 0x4B0 540 #define SNAPSHOT2_VH_COUNTS 0x4B0 541 #define SNAPSHOT2_F_COUNT 0x4B4 542 #define N_VIF2_COUNT 0x4B8 543 #define SNAPSHOT2_VIF_COUNT 0x4BC 544 #define MPP_CONFIG 0x4C0 545 #define MPP_STROBE_SEQ 0x4C4 546 #define MPP_ADDR 0x4C8 547 #define MPP_DATA 0x4CC 548 #define TVO_CNTL 0x500 549 /* 0x504 - 0x540 */ 550 #define CRT_HORZ_VERT_LOAD 0x544 551 #define AGP_BASE 0x548 552 #define AGP_CNTL 0x54C 553 #define SCALER_COLOUR_CNTL 0x550 554 #define SCALER_H_COEFF0 0x554 555 #define SCALER_H_COEFF1 0x558 556 #define SCALER_H_COEFF2 0x55C 557 #define SCALER_H_COEFF3 0x560 558 #define SCALER_H_COEFF4 0x564 559 /* 0x568 - 0x56C */ 560 #define GUI_CMDFIFO_DEBUG 0x570 561 #define GUI_CMDFIFO_DATA 0x574 562 #define GUI_CNTL 0x578 563 /* 0x57C */ 564 #define BM_FRAME_BUF_OFFSET 0x580 565 #define BM_SYSTEM_MEM_ADDR 0x584 566 #define BM_COMMAND 0x588 567 #define BM_STATUS 0x58C 568 /* 0x590 - 0x5B4 */ 569 #define BM_GUI_TABLE 0x5B8 570 #define BM_SYSTEM_TABLE 0x5BC 571 /* 0x5D0 */ 572 #define SCALER_BUF0_OFFSET_U 0x5D4 573 #define SCALER_BUF0_OFFSET_V 0x5D8 574 #define SCALER_BUF1_OFFSET_U 0x5DC 575 #define SCALER_BUF1_OFFSET_V 0x5E0 576 /* 0x5E4 - 0x63C */ 577 #define VERTEX_1_S 0x640 578 #define VERTEX_1_T 0x644 579 #define VERTEX_1_W 0x648 580 #define VERTEX_1_SPEC_ARGB 0x64C 581 #define VERTEX_1_Z 0x650 582 #define VERTEX_1_ARGB 0x654 583 #define VERTEX_1_X_Y 0x658 584 /* #define ONE_OVER_AREA 0x65C */ 585 #define VERTEX_2_S 0x660 586 #define VERTEX_2_T 0x664 587 #define VERTEX_2_W 0x668 588 #define VERTEX_2_SPEC_ARGB 0x66C 589 #define VERTEX_2_Z 0x670 590 #define VERTEX_2_ARGB 0x674 591 #define VERTEX_2_X_Y 0x678 592 /* #define ONE_OVER_AREA 0x67C */ 593 #define VERTEX_3_S 0x680 594 #define VERTEX_3_T 0x684 595 #define VERTEX_3_W 0x688 596 #define VERTEX_3_SPEC_ARGB 0x68C 597 #define VERTEX_3_Z 0x690 598 #define VERTEX_3_ARGB 0x694 599 #define VERTEX_3_X_Y 0x698 600 #define ONE_OVER_AREA 0x69C 601 #define VERTEX_3_SECONDARY_S 0x6A0 602 #define VERTEX_3_SECONDARY_T 0x6A4 603 #define VERTEX_3_SECONDARY_W 0x6A8 604 /* #define VERTEX_1_S 0x6AC */ 605 /* #define VERTEX_1_T 0x6B0 */ 606 /* #define VERTEX_1_W 0x6B4 */ 607 /* #define VERTEX_2_S 0x6B8 */ 608 /* #define VERTEX_2_T 0x6BC */ 609 /* #define VERTEX_2_W 0x6C0 */ 610 /* #define VERTEX_3_S 0x6C4 */ 611 /* #define VERTEX_3_T 0x6C8 */ 612 /* #define VERTEX_3_W 0x6CC */ 613 /* #define VERTEX_1_SPEC_ARGB 0x6D0 */ 614 /* #define VERTEX_2_SPEC_ARGB 0x6D4 */ 615 /* #define VERTEX_3_SPEC_ARGB 0x6D8 */ 616 /* #define VERTEX_1_Z 0x6DC */ 617 /* #define VERTEX_2_Z 0x6E0 */ 618 /* #define VERTEX_3_Z 0x6E4 */ 619 /* #define VERTEX_1_ARGB 0x6E8 */ 620 /* #define VERTEX_2_ARGB 0x6EC */ 621 /* #define VERTEX_3_ARGB 0x6F0 */ 622 /* #define VERTEX_1_X_Y 0x6F4 */ 623 /* #define VERTEX_2_X_Y 0x6F8 */ 624 /* #define VERTEX_3_X_Y 0x6FC */ 625 #define ONE_OVER_AREA_UC 0x700 626 #define SETUP_CNTL 0x704 627 /* 0x708 - 0x724 */ 628 #define VERTEX_1_SECONDARY_S 0x728 629 #define VERTEX_1_SECONDARY_T 0x72C 630 #define VERTEX_1_SECONDARY_W 0x730 631 #define VERTEX_2_SECONDARY_S 0x734 632 #define VERTEX_2_SECONDARY_T 0x738 633 #define VERTEX_2_SECONDARY_W 0x73C 634 /* 0x740 - 0x7FC */ 635 636 637 /* HW_DEBUG */ 638 #define INTER_PRIM_DIS 0x00000040 639 #define AUTO_BLKWRT_COLOR_DIS 0x00000100 640 #define AUTO_FF_DIS 0x00001000 641 #define AUTO_BLKWRT_DIS 0x00002000 642 643 /* CLOCK_CNTL1 */ 644 #define PLL_WR_EN 0x02 645 646 /* CONFIG_CHIP_ID */ 647 #define CFG_CHIP_TYPE 0x0000FFFF 648 #define CFG_CHIP_CLASS 0x00FF0000 649 #define CFG_CHIP_MAJOR 0x07000000 650 #define CFG_CHIP_FND_ID 0x38000000 651 #define CFG_CHIP_MINOR 0xC0000000 652 653 /* CONFIG_STAT0 */ 654 #define CFG_MEM_TYPE 0x00000007 655 #define CFG_MEM_TYPE_SGRAM 0x00000005 656 #define CFG_MEM_TYPE_WRAM 0x00000006 657 658 /* DST_BRES_LNTH */ 659 #define DRAW_TRAP 0x00008000 660 #define LINE_DIS 0x80000000 661 662 /* DST_CNTL */ 663 #define DST_X_DIR 0x00000001 664 #define DST_Y_DIR 0x00000002 665 #define DST_Y_MAJOR 0x00000004 666 #define DST_X_TILE 0x00000008 667 #define DST_Y_TILE 0x00000010 668 #define DST_LAST_PEL 0x00000020 669 #define DST_POLYGON_EN 0x00000040 670 #define DST_24_ROTATION_EN 0x00000080 671 #define TRAIL_X_DIR 0x00002000 672 #define TRAP_FILL_DIR 0x00004000 673 674 /* ALPHA_TST_CNTL */ 675 #define ALPHA_DST_SEL_ZERO 0x00000000 676 #define ALPHA_DST_SEL_ONE 0x00000100 677 #define ALPHA_DST_SEL_SRCALPHA 0x00000400 678 #define ALPHA_DST_SEL_INVSRCALPHA 0x00000500 679 #define ALPHA_DST_SEL_DSTALPHA 0x00000600 680 #define ALPHA_DST_SEL_INVDSTALPHA 0x00000700 681 682 /* SRC_CNTL */ 683 #define SRC_PATTERN_EN 0x00000001 684 #define SRC_ROTATION_EN 0x00000002 685 #define SRC_LINEAR_EN 0x00000004 686 #define SRC_BYTE_ALIGN 0x00000008 687 #define SRC_LINE_X_DIR 0x00000010 688 #define FAST_FILL_EN 0x00000040 689 #define COLOR_REG_WRITE_EN 0x00002000 690 #define BLOCK_WRITE_EN 0x00004000 691 692 /* DP_PIX_WIDTH (GT) */ 693 #define DST_PIX_WIDTH_MONO 0x00000000 694 #define DST_PIX_WIDTH_CI8 0x00000002 695 #define DST_PIX_WIDTH_ARGB1555 0x00000003 696 #define DST_PIX_WIDTH_RGB565 0x00000004 697 #define DST_PIX_WIDTH_RGB888 0x00000005 698 #define DST_PIX_WIDTH_ARGB8888 0x00000006 699 #define DST_PIX_WIDTH_RGB332 0x00000007 700 #define DST_PIX_WIDTH_Y8 0x00000008 701 #define DST_PIX_WIDTH_RGB8 0x00000009 702 #define DST_PIX_WIDTH_VYUY 0x0000000B 703 #define DST_PIX_WIDTH_YVYU 0x0000000C 704 #define DST_PIX_WIDTH_AYUV8888 0x0000000E 705 #define DST_PIX_WIDTH_ARGB4444 0x0000000F 706 #define SRC_PIX_WIDTH_MONO 0x00000000 707 #define SRC_PIX_WIDTH_CI8 0x00000200 708 #define SRC_PIX_WIDTH_ARGB1555 0x00000300 709 #define SRC_PIX_WIDTH_RGB565 0x00000400 710 #define SRC_PIX_WIDTH_ARGB8888 0x00000600 711 #define SRC_PIX_WIDTH_RGB332 0x00000700 712 #define SRC_PIX_WIDTH_Y8 0x00000800 713 #define SRC_PIX_WIDTH_VYUY 0x00000B00 714 #define SRC_PIX_WIDTH_YVYU 0x00000C00 715 #define SRC_PIX_WIDTH_AYUV8888 0x00000E00 716 #define SRC_PIX_WIDTH_ARGB4444 0x00000F00 717 #define SCALE_PIX_WIDTH_CI8 0x20000000 718 #define SCALE_PIX_WIDTH_ARGB1555 0x30000000 719 #define SCALE_PIX_WIDTH_RGB565 0x40000000 720 #define SCALE_PIX_WIDTH_ARGB8888 0x60000000 721 #define SCALE_PIX_WIDTH_RGB332 0x70000000 722 #define SCALE_PIX_WIDTH_Y8 0x80000000 723 #define SCALE_PIX_WIDTH_RGB8 0x90000000 724 #define SCALE_PIX_WIDTH_VYUY 0xB0000000 725 #define SCALE_PIX_WIDTH_YVYU 0xC0000000 726 #define SCALE_PIX_WIDTH_AYUV8888 0xE0000000 727 #define SCALE_PIX_WIDTH_ARGB4444 0xF0000000 728 729 /* DP_PIX_WIDTH (GX/CT/VT) */ 730 #define DST_PIX_WIDTH_8BPP 0x00000002 731 #define DST_PIX_WIDTH_15BPP 0x00000003 732 #define DST_PIX_WIDTH_16BPP 0x00000004 733 #define DST_PIX_WIDTH_32BPP 0x00000006 734 #define SRC_PIX_WIDTH_8BPP 0x00000200 735 #define SRC_PIX_WIDTH_15BPP 0x00000300 736 #define SRC_PIX_WIDTH_16BPP 0x00000400 737 #define SRC_PIX_WIDTH_32BPP 0x00000600 738 739 /* DP_PIX_WIDTH masks */ 740 #define DST_PIX_WIDTH 0x0000000F 741 #define SRC_PIX_WIDTH 0x00000F00 742 #define SCALE_PIX_WIDTH 0xF0000000 743 744 /* DP_MIX */ 745 #define BKGD_MIX_DST 0x00000003 746 #define BKGD_MIX_SRC 0x00000007 747 #define FRGD_MIX_DST 0x00030000 748 #define FRGD_MIX_SRC 0x00070000 749 750 /* DP_SRC */ 751 #define BKGD_SRC_BKGD_CLR 0x00000000 752 #define BKGD_SRC_FRGD_CLR 0x00000001 753 #define BKGD_SRC_HOST 0x00000002 754 #define BKGD_SRC_BLIT 0x00000003 755 #define BKGD_SRC_PATTERN 0x00000004 756 #define BKGD_SRC_SCALE 0x00000005 757 #define FRGD_SRC_BKGD_CLR 0x00000000 758 #define FRGD_SRC_FRGD_CLR 0x00000100 759 #define FRGD_SRC_HOST 0x00000200 760 #define FRGD_SRC_BLIT 0x00000300 761 #define FRGD_SRC_PATTERN 0x00000400 762 #define FRGD_SRC_SCALE 0x00000500 763 #define MONO_SRC_ONE 0x00000000 764 #define MONO_SRC_PATTERN 0x00010000 765 #define MONO_SRC_HOST 0x00020000 766 #define MONO_SRC_BLIT 0x00030000 767 768 /* CLR_CMP_CNTL */ 769 #define CLR_CMP_FN_FALSE 0x00000000 770 #define CLR_CMP_FN_TRUE 0x00000001 771 #define CLR_CMP_FN_NOT_EQUAL 0x00000004 772 #define CLR_CMP_FN_EQUAL 0x00000005 773 #define CLR_CMP_SRC_DEST 0x00000000 774 #define CLR_CMP_SRC_2D 0x01000000 775 #define CLR_CMP_SRC_SCALE 0x02000000 776 777 /* GUI_STAT */ 778 #define GUI_ACTIVE 0x00000001 779 780 /* SCALE_3D_CNTL */ 781 #define SCALE_PIX_EXPAND 0x00000001 782 #define SCALE_DITHER 0x00000002 783 #define DITHER_EN 0x00000004 784 #define DITHER_INIT 0x00000008 785 #define ROUND_EN 0x00000010 786 #define TEX_CACHE_DIS 0x00000020 787 #define SCALE_3D_FCN_NOP 0x00000000 788 #define SCALE_3D_FCN_SCALE 0x00000040 789 #define SCALE_3D_FCN_TEXTURE 0x00000080 790 #define SCALE_3D_FCN_SHADE 0x000000C0 791 #define SCALE_PIX_REP 0x00000100 792 #define NEAREST_TEX_VIS 0x00000200 793 #define TEX_CACHE_SPLIT 0x00000200 794 #define APPLE_YUV_MODE 0x00000400 795 #define ALPHA_FOG_EN_DIS 0x00000000 796 #define ALPHA_FOG_EN_ALPHA 0x00000800 797 #define ALPHA_FOG_EN_FOG 0x00001000 798 #define COLOR_OVERRIDE 0x00002000 799 #define ALPHA_BLND_SAT 0x00002000 800 #define RED_DITHER_MAX 0x00004000 801 #define SIGNED_DST_CLAMP 0x00008000 802 #define ALPHA_BLND_SRC_ZERO 0x00000000 803 #define ALPHA_BLND_SRC_ONE 0x00010000 804 #define ALPHA_BLND_SRC_DSTCOLOR 0x00020000 805 #define ALPHA_BLND_SRC_INVDSTCOLOR 0x00030000 806 #define ALPHA_BLND_SRC_SRCALPHA 0x00040000 807 #define ALPHA_BLND_SRC_INVSRCALPHA 0x00050000 808 #define ALPHA_BLND_SRC_DSTALPHA 0x00060000 809 #define ALPHA_BLND_SRC_INVDSTALPHA 0x00070000 810 #define ALPHA_BLND_DST_ZERO 0x00000000 811 #define ALPHA_BLND_DST_ONE 0x00080000 812 #define ALPHA_BLND_DST_SRCCOLOR 0x00100000 813 #define ALPHA_BLND_DST_INVSRCCOLOR 0x00180000 814 #define ALPHA_BLND_DST_SRCALPHA 0x00200000 815 #define ALPHA_BLND_DST_INVSRCALPHA 0x00280000 816 #define ALPHA_BLND_DST_DSTALPHA 0x00300000 817 #define ALPHA_BLND_DST_INVDSTALPHA 0x00380000 818 #define TEX_LIGHT_FCN_REPLACE 0x00000000 819 #define TEX_LIGHT_FCN_MODULATE 0x00400000 820 #define TEX_LIGHT_FCN_ALPHA_DECAL 0x00800000 821 #define MIP_MAP_DISABLE 0x01000000 822 #define BILINEAR_TEX_EN 0x02000000 823 #define TEX_BLEND_FCN_NEAREST_MIPMAP_NEAREST 0x00000000 824 #define TEX_BLEND_FCN_NEAREST_MIPMAP_LINEAR 0x04000000 825 #define TEX_BLEND_FCN_LINEAR_MIPMAP_NEAREST 0x08000000 826 #define TEX_BLEND_FCN_LINEAR_MIPMAP_LINEAR 0x0C000000 827 #define TEX_AMASK_AEN 0x10000000 828 #define TEX_AMASK_MODE 0x20000000 829 #define TEX_MAP_AEN 0x40000000 830 #define SRC_3D_SEL 0x80000000 831 832 /* TEX_CNTL */ 833 #define TEX_CACHE_FLUSH 0x00800000 834 835 /* OVERLAY_Y_X_START */ 836 #define OVERLAY_LOCK_START 0x80000000 837 838 /* OVERLAY_Y_X_END */ 839 #define OVERLAY_LOCK_END 0x80000000 840 841 /* OVERLAY_KEY_CNTL */ 842 #define VIDEO_KEY_FN_FALSE 0x00000000 843 #define VIDEO_KEY_FN_TRUE 0x00000001 844 #define VIDEO_KEY_FN_NOT_EQUAL 0x00000004 845 #define VIDEO_KEY_FN_EQUAL 0x00000005 846 #define GRAPHICS_KEY_FN_FALSE 0x00000000 847 #define GRAPHICS_KEY_FN_TRUE 0x00000010 848 #define GRAPHICS_KEY_FN_NOT_EQUAL 0x00000040 849 #define GRAPHICS_KEY_FN_EQUAL 0x00000050 850 #define OVERLAY_CMP_MIX_OR 0x00000000 851 #define OVERLAY_CMP_MIX_AND 0x00000100 852 853 /* OVERLAY_SCALE_CNTL */ 854 /* #define SCALE_PIX_EXPAND 0x00000001 */ 855 #define SCALE_Y2R_TEMP 0x00000002 856 #define SCALE_HORZ_MODE 0x00000004 857 #define SCALE_VERT_MODE 0x00000008 858 #define SCALE_SIGNED_UV 0x00000010 859 #define SCALE_GAMMA_SEL 0x00000060 860 #define SCALE_BANDWITH 0x04000000 861 #define SCALE_DIS_LIMIT 0x08000000 862 #define SCALE_CLK_FORCE_ON 0x20000000 863 #define OVERLAY_EN 0x40000000 864 #define SCALE_EN 0x80000000 865 866 /* VIDEO_FORMAT */ 867 #define VIDEO_IN_VYUY422 0x0000000B 868 #define VIDEO_IN_YVYU422 0x0000000C 869 #define VIDEO_SIGNED_UV 0x00000010 870 #define SCALER_IN_RGB15 0x00030000 871 #define SCALER_IN_RGB16 0x00040000 872 #define SCALER_IN_RGB32 0x00060000 873 #define SCALER_IN_YUV9 0x00090000 874 #define SCALER_IN_YUV12 0x000A0000 875 #define SCALER_IN_VYUY422 0x000B0000 876 #define SCALER_IN_YVYU422 0x000C0000 877 878 /* CAPTURE_CONFIG */ 879 #define OVL_BUF_MODE_SINGLE 0x00000000 880 #define OVL_BUF_MODE_DOUBLE 0x10000000 881 #define OVL_BUF_NEXT_BUF0 0x00000000 882 #define OVL_BUF_NEXT_BUF1 0x20000000 883 884 #endif 885