1 /* $OpenBSD: i2sreg.h,v 1.3 2011/06/07 16:29:51 mpi Exp $ */ 2 /*- 3 * Copyright (c) 2002 Tsubai Masanari. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. The name of the author may not be used to endorse or promote products 14 * derived from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* I2S registers */ 29 #define I2S_INT 0x00 30 #define I2S_FORMAT 0x10 31 #define I2S_FRAMECOUNT 0x40 32 #define I2S_FRAMEMATCH 0x50 33 #define I2S_WORDSIZE 0x60 34 35 /* I2S_INT register definitions */ 36 #define I2SClockOffset 0x3c 37 #define I2S_INT_CLKSTOPPEND 0x01000000 38 39 #define I2S_SELECT_SPEAKER 1 << 0 40 #define I2S_SELECT_HEADPHONE 1 << 1 41 #define I2S_SELECT_LINEOUT 1 << 2 42 43 /* FCR(0x3c) bits */ 44 #define I2S0CLKEN 0x1000 45 #define I2S0EN 0x2000 46 #define I2S1CLKEN 0x080000 47 #define I2S1EN 0x100000 48 49 50 #define CLKSRC_49MHz 0x80000000 /* Use 49152000Hz Osc. */ 51 #define CLKSRC_45MHz 0x40000000 /* Use 45158400Hz Osc. */ 52 #define CLKSRC_18MHz 0x00000000 /* Use 18432000Hz Osc. */ 53 #define CLKSRC_VS 0x01fa0000 /* Magic value of xserve vu-meter */ 54 #define MCLK_DIV 0x1f000000 /* MCLK = SRC / DIV */ 55 #define MCLK_DIV1 0x14000000 /* MCLK = SRC */ 56 #define MCLK_DIV3 0x13000000 /* MCLK = SRC / 3 */ 57 #define MCLK_DIV5 0x12000000 /* MCLK = SRC / 5 */ 58 #define SCLK_DIV 0x00f00000 /* SCLK = MCLK / DIV */ 59 #define SCLK_DIV1 0x00800000 60 #define SCLK_DIV3 0x00900000 61 #define SCLK_MASTER 0x00080000 /* Master mode */ 62 #define SCLK_SLAVE 0x00000000 /* Slave mode */ 63 #define SERIAL_FORMAT 0x00070000 64 #define SERIAL_SONY 0x00000000 65 #define SERIAL_64x 0x00010000 66 #define SERIAL_32x 0x00020000 67 #define SERIAL_DAV 0x00040000 68 #define SERIAL_SILICON 0x00050000 69