xref: /netbsd/sys/arch/pmax/pmax/memc_3min.c (revision f9f3963e)
1 /*	$NetBSD: memc_3min.c,v 1.15 2019/08/21 04:17:41 msaitoh Exp $	*/
2 
3 /*
4  * Copyright (c) 1988 University of Utah.
5  * Copyright (c) 1992, 1993
6  *	The Regents of the University of California.  All rights reserved.
7  *
8  * This code is derived from software contributed to Berkeley by
9  * the Systems Programming Group of the University of Utah Computer
10  * Science Department and Ralph Campbell.
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  * 3. Neither the name of the University nor the names of its contributors
21  *    may be used to endorse or promote products derived from this software
22  *    without specific prior written permission.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  *
36  * from: Utah Hdr: trap.c 1.32 91/04/06
37  *
38  *	@(#)trap.c	8.5 (Berkeley) 1/11/94
39  */
40 
41 #include <sys/cdefs.h>
42 __KERNEL_RCSID(0, "$NetBSD: memc_3min.c,v 1.15 2019/08/21 04:17:41 msaitoh Exp $");
43 
44 /*
45  * Motherboard memory error controller used in both
46  * 3min (kn02ba) and maxine (kn02ca).
47  */
48 
49 #include <sys/types.h>
50 #include <sys/systm.h>
51 
52 #include <mips/cpuregs.h>
53 
54 #include <pmax/pmax/kmin.h>
55 #include <pmax/pmax/memc.h>
56 
57 /*
58  * Handle error
59  * All we can do with parity is panic.
60  * XXX check for clean user pages, replace frame,  and reload ?
61  */
62 void
kn02ba_errintr(void)63 kn02ba_errintr(void)
64 {
65 	paddr_t err, adr;
66 	size_t siz;
67 	uint32_t mer;
68 	static unsigned int errintr_cnt = 0;
69 
70 	siz = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_MSR);
71 	mer = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_MER);
72 	adr = *(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_AER);
73 
74 	/* clear interrupt bit */
75 	*(volatile uint32_t *)MIPS_PHYS_TO_KSEG1(KMIN_REG_TIMEOUT) = 0;
76 
77 	err = 0;	/* XXX gcc */
78 	switch (mer & KMIN_MER_LASTBYTE) {
79 	case KMIN_LASTB31:
80 		err = 3; break;
81 	case KMIN_LASTB23:
82 		err = 2; break;
83 	case KMIN_LASTB15:
84 		err = 1; break;
85 	case KMIN_LASTB07:
86 		err = 0; break;
87 	}
88 	err |= (adr & KMIN_AER_ADDR_MASK);
89 
90 	errintr_cnt++;
91 	printf("(%u)Bad memory chip at phys %#"PRIxPADDR
92 	    " [%x %zx %#"PRIxPADDR"]\n",
93 	    errintr_cnt, err, mer, siz, adr);
94 }
95