1 /* nova_pt.c: NOVA paper tape read/punch simulator
2 
3    Copyright (c) 1993-2008, Robert M. Supnik
4 
5    Permission is hereby granted, free of charge, to any person obtaining a
6    copy of this software and associated documentation files (the "Software"),
7    to deal in the Software without restriction, including without limitation
8    the rights to use, copy, modify, merge, publish, distribute, sublicense,
9    and/or sell copies of the Software, and to permit persons to whom the
10    Software is furnished to do so, subject to the following conditions:
11 
12    The above copyright notice and this permission notice shall be included in
13    all copies or substantial portions of the Software.
14 
15    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18    ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 
22    Except as contained in this notice, the name of Robert M Supnik shall not be
23    used in advertising or otherwise to promote the sale, use or other dealings
24    in this Software without prior written authorization from Robert M Supnik.
25 
26    ptr          paper tape reader
27    ptp          paper tape punch
28 
29    04-Jul-07    BKR     added PTR and PTP device DISABLE capability,
30                         added 7B/8B support PTR and PTP (default is 8B),
31                         DEV_SET/CLR macros now used,
32                         PTR and PTP can now be DISABLED
33    25-Apr-03    RMS     Revised for extended file support
34    03-Oct-02    RMS     Added DIBs
35    30-May-02    RMS     Widened POS to 32b
36    29-Nov-01    RMS     Added read only unit support
37 
38 
39 Notes:
40     - data masked to 7- or 8- bits, based on 7B or 8B, default is 8-bits
41     - register TIME is the delay between character read or write operations
42     - register POS show the number of characters read from or sent to the PTR or PTP
43     - register STOP_IOE determines return value issued if output to unattached PTR or PTP is attempted
44 */
45 
46 #include "nova_defs.h"
47 
48 extern	int32	int_req, dev_busy, dev_done, dev_disable ;
49 extern	int32	SR ;
50 
51 extern	t_stat  cpu_boot(int32 unitno, DEVICE * dptr ) ;
52 
53 
54 int32 ptr_stopioe = 0, ptp_stopioe = 0;                 /* stop on error */
55 
56 int32 ptr (int32 pulse, int32 code, int32 AC);
57 int32 ptp (int32 pulse, int32 code, int32 AC);
58 t_stat ptr_svc (UNIT *uptr);
59 t_stat ptp_svc (UNIT *uptr);
60 t_stat ptr_reset (DEVICE *dptr);
61 t_stat ptp_reset (DEVICE *dptr);
62 t_stat ptr_boot (int32 unitno, DEVICE *dptr);
63 
64 
65 	/*  7 or 8 bit data mask support for either device  */
66 
67 #define UNIT_V_8B   (UNIT_V_UF + 0)                     /* 8b output */
68 #define UNIT_8B     (1 << UNIT_V_8B)
69 
70 
71 /* PTR data structures
72 
73    ptr_dev      PTR device descriptor
74    ptr_unit     PTR unit descriptor
75    ptr_reg      PTR register list
76 */
77 
78 DIB ptr_dib = { DEV_PTR, INT_PTR, PI_PTR, &ptr };
79 
80 UNIT ptr_unit = {   /* 2007-May-30, bkr */
81     UDATA (&ptr_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_ROABLE+UNIT_8B, 0),
82             SERIAL_IN_WAIT
83     };
84 
85 REG ptr_reg[] = {
86     { ORDATA (BUF, ptr_unit.buf, 8) },
87     { FLDATA (BUSY, dev_busy, INT_V_PTR) },
88     { FLDATA (DONE, dev_done, INT_V_PTR) },
89     { FLDATA (DISABLE, dev_disable, INT_V_PTR) },
90     { FLDATA (INT, int_req, INT_V_PTR) },
91     { DRDATA (POS, ptr_unit.pos, T_ADDR_W), PV_LEFT },
92     { DRDATA (TIME, ptr_unit.wait, 24), PV_LEFT },
93     { FLDATA (STOP_IOE, ptr_stopioe, 0) },
94     { NULL }
95     };
96 
97 MTAB ptr_mod[] =    /* 2007-May-30, bkr */
98     {
99     { UNIT_8B,       0, "7b", "7B", NULL },
100     { UNIT_8B, UNIT_8B, "8b", "8B", NULL },
101     {       0,       0, NULL, NULL, NULL }
102     } ;
103 
104 DEVICE ptr_dev = {
105     "PTR", &ptr_unit, ptr_reg, ptr_mod /* 2007-May-30, bkr */,
106     1, 10, 31, 1, 8, 8,
107     NULL, NULL, &ptr_reset,
108     &ptr_boot, NULL, NULL,
109     &ptr_dib, DEV_DISABLE   /* 2007-May-30, bkr */
110     };
111 
112 /* PTP data structures
113 
114    ptp_dev      PTP device descriptor
115    ptp_unit     PTP unit descriptor
116    ptp_reg      PTP register list
117 */
118 
119 DIB ptp_dib = { DEV_PTP, INT_PTP, PI_PTP, &ptp };
120 
121 UNIT ptp_unit =
122     {
123     UDATA (&ptp_svc, UNIT_SEQ+UNIT_ATTABLE+UNIT_8B, 0), SERIAL_OUT_WAIT
124     };
125 
126 REG ptp_reg[] = {
127     { ORDATA (BUF, ptp_unit.buf, 8) },
128     { FLDATA (BUSY, dev_busy, INT_V_PTP) },
129     { FLDATA (DONE, dev_done, INT_V_PTP) },
130     { FLDATA (DISABLE, dev_disable, INT_V_PTP) },
131     { FLDATA (INT, int_req, INT_V_PTP) },
132     { DRDATA (POS, ptp_unit.pos, T_ADDR_W), PV_LEFT },
133     { DRDATA (TIME, ptp_unit.wait, 24), PV_LEFT },
134     { FLDATA (STOP_IOE, ptp_stopioe, 0) },
135     { NULL }
136     };
137 
138 MTAB ptp_mod[] =
139     {
140     { UNIT_8B,       0, "7b", "7B", NULL },
141     { UNIT_8B, UNIT_8B, "8b", "8B", NULL },
142     {       0,       0, NULL, NULL, NULL }
143     } ;
144 
145 DEVICE ptp_dev =
146     {
147     "PTP", &ptp_unit, ptp_reg, ptp_mod /* 2007-May-30, bkr */,
148     1, 10, 31, 1, 8, 8,
149     NULL, NULL, &ptp_reset,
150     NULL, NULL, NULL,
151     &ptp_dib, DEV_DISABLE   /* 2007-May-30, bkr */
152     };
153 
154 
155 /* Paper tape reader: IOT routine */
156 
ptr(int32 pulse,int32 code,int32 AC)157 int32 ptr (int32 pulse, int32 code, int32 AC)
158 {
159 int32   iodata;
160 
161 iodata = (code == ioDIA)?
162               ptr_unit.buf & 0377
163             : 0;
164 switch (pulse)
165     {                                                   /* decode IR<8:9> */
166   case iopS:                                            /* start */
167     DEV_SET_BUSY( INT_PTR ) ;
168     DEV_CLR_DONE( INT_PTR ) ;
169     DEV_UPDATE_INTR ;
170     sim_activate (&ptr_unit, ptr_unit.wait);            /* activate unit */
171     break;
172 
173   case iopC:                                            /* clear */
174     DEV_CLR_BUSY( INT_PTR ) ;
175     DEV_CLR_DONE( INT_PTR ) ;
176     DEV_UPDATE_INTR ;
177     sim_cancel (&ptr_unit);                             /* deactivate unit */
178     break;
179     }                                                   /* end switch */
180 
181 return iodata;
182 }
183 
184 
185 /* Unit service */
186 
ptr_svc(UNIT * uptr)187 t_stat ptr_svc (UNIT *uptr)
188 {
189 int32   temp;
190 
191 if ((ptr_unit.flags & UNIT_ATT) == 0)                   /* attached? */
192     return IORETURN (ptr_stopioe, SCPE_UNATT);
193 if ((temp = getc (ptr_unit.fileref)) == EOF) {          /* end of file? */
194     if (feof (ptr_unit.fileref)) {
195         if (ptr_stopioe)
196             printf ("PTR end of file\n");
197         else return SCPE_OK;
198         }
199     else perror ("PTR I/O error");
200     clearerr (ptr_unit.fileref);
201     return SCPE_IOERR;
202     }
203 
204 DEV_CLR_BUSY( INT_PTR ) ;
205 DEV_SET_DONE( INT_PTR ) ;
206 DEV_UPDATE_INTR ;
207 ptr_unit.buf = temp & ((ptr_unit.flags & UNIT_8B)? 0377: 0177);
208 ++(ptr_unit.pos);
209 return SCPE_OK;
210 }
211 
212 
213 /* Reset routine */
214 
ptr_reset(DEVICE * dptr)215 t_stat ptr_reset (DEVICE *dptr)
216 {
217 ptr_unit.buf = 0;                                       /* <not DG compatible> */
218 DEV_CLR_BUSY( INT_PTR ) ;
219 DEV_CLR_DONE( INT_PTR ) ;
220 DEV_UPDATE_INTR ;
221 sim_cancel (&ptr_unit);                                 /* deactivate unit */
222 return SCPE_OK;
223 }
224 
225 
226 /* Boot routine */
227 
ptr_boot(int32 unitno,DEVICE * dptr)228 t_stat ptr_boot (int32 unitno, DEVICE *dptr)
229 {
230 ptr_reset( dptr ) ;
231 /*  set position to 0?  */
232 cpu_boot( unitno, dptr ) ;
233 SR = /* low-speed: no high-order bit set */ DEV_PTR ;
234 return ( SCPE_OK );
235 }    /*  end of 'ptr_boot'  */
236 
237 
238 
239 
240 
241 /* Paper tape punch: IOT routine */
242 
ptp(int32 pulse,int32 code,int32 AC)243 int32 ptp (int32 pulse, int32 code, int32 AC)
244 {
245 if (code == ioDOA)
246     ptp_unit.buf = AC & 0377;
247 
248 switch (pulse)
249     {                                                   /* decode IR<8:9> */
250   case iopS:                                            /* start */
251     DEV_SET_BUSY( INT_PTP ) ;
252     DEV_CLR_DONE( INT_PTP ) ;
253     DEV_UPDATE_INTR ;
254     sim_activate (&ptp_unit, ptp_unit.wait);            /* activate unit */
255     break;
256 
257   case iopC:                                            /* clear */
258     DEV_CLR_BUSY( INT_PTP ) ;
259     DEV_CLR_DONE( INT_PTP ) ;
260     DEV_UPDATE_INTR ;
261     sim_cancel (&ptp_unit);                             /* deactivate unit */
262     break;
263     }                                                   /* end switch */
264 
265 return 0;
266 }
267 
268 
269 /* Unit service */
270 
ptp_svc(UNIT * uptr)271 t_stat ptp_svc (UNIT *uptr)
272 {
273 DEV_CLR_BUSY( INT_PTP ) ;
274 DEV_SET_DONE( INT_PTP ) ;
275 DEV_UPDATE_INTR ;
276 if ((ptp_unit.flags & UNIT_ATT) == 0)                   /* attached? */
277     return IORETURN (ptp_stopioe, SCPE_UNATT);
278 if (putc ((ptp_unit.buf & ((ptp_unit.flags & UNIT_8B)? 0377: 0177)), ptp_unit.fileref) == EOF) {
279     perror ("PTP I/O error");
280     clearerr (ptp_unit.fileref);
281     return SCPE_IOERR;
282     }
283 ++(ptp_unit.pos);
284 return SCPE_OK;
285 }
286 
287 
288 /* Reset routine */
289 
ptp_reset(DEVICE * dptr)290 t_stat ptp_reset (DEVICE *dptr)
291 {
292 ptp_unit.buf = 0;                                       /* <not DG compatible> */
293 DEV_CLR_BUSY( INT_PTP ) ;
294 DEV_CLR_DONE( INT_PTP ) ;
295 DEV_UPDATE_INTR ;
296 sim_cancel (&ptp_unit);                                 /* deactivate unit */
297 return SCPE_OK;
298 }
299