1 /* 2 * This declarations of the PIC16LF84 MCU. 3 * 4 * This file is part of the GNU PIC library for SDCC, originally 5 * created by Molnar Karoly <molnarkaroly@users.sf.net> 2016. 6 * 7 * This file is generated automatically by the cinc2h.pl, 2016-04-13 17:22:55 UTC. 8 * 9 * SDCC is licensed under the GNU Public license (GPL) v2. Note that 10 * this license covers the code to the compiler and other executables, 11 * but explicitly does not cover any code or objects generated by sdcc. 12 * 13 * For pic device libraries and header files which are derived from 14 * Microchip header (.inc) and linker script (.lkr) files Microchip 15 * requires that "The header files should state that they are only to be 16 * used with authentic Microchip devices" which makes them incompatible 17 * with the GPL. Pic device libraries and header files are located at 18 * non-free/lib and non-free/include directories respectively. 19 * Sdcc should be run with the --use-non-free command line option in 20 * order to include non-free header files and libraries. 21 * 22 * See http://sdcc.sourceforge.net/ for the latest information on sdcc. 23 */ 24 25 #ifndef __PIC16LF84_H__ 26 #define __PIC16LF84_H__ 27 28 //============================================================================== 29 // 30 // Register Addresses 31 // 32 //============================================================================== 33 34 #ifndef NO_ADDR_DEFINES 35 36 #define INDF_ADDR 0x0000 37 #define TMR0_ADDR 0x0001 38 #define PCL_ADDR 0x0002 39 #define STATUS_ADDR 0x0003 40 #define FSR_ADDR 0x0004 41 #define PORTA_ADDR 0x0005 42 #define PORTB_ADDR 0x0006 43 #define EEDATA_ADDR 0x0008 44 #define EEADR_ADDR 0x0009 45 #define PCLATH_ADDR 0x000A 46 #define INTCON_ADDR 0x000B 47 #define OPTION_REG_ADDR 0x0081 48 #define TRISA_ADDR 0x0085 49 #define TRISB_ADDR 0x0086 50 #define EECON1_ADDR 0x0088 51 #define EECON2_ADDR 0x0089 52 53 #endif // #ifndef NO_ADDR_DEFINES 54 55 //============================================================================== 56 // 57 // Register Definitions 58 // 59 //============================================================================== 60 61 extern __at(0x0000) __sfr INDF; 62 extern __at(0x0001) __sfr TMR0; 63 extern __at(0x0002) __sfr PCL; 64 65 //============================================================================== 66 // STATUS Bits 67 68 extern __at(0x0003) __sfr STATUS; 69 70 typedef union 71 { 72 struct 73 { 74 unsigned C : 1; 75 unsigned DC : 1; 76 unsigned Z : 1; 77 unsigned NOT_PD : 1; 78 unsigned NOT_TO : 1; 79 unsigned RP0 : 1; 80 unsigned RP1 : 1; 81 unsigned IRP : 1; 82 }; 83 84 struct 85 { 86 unsigned : 5; 87 unsigned RP : 2; 88 unsigned : 1; 89 }; 90 } __STATUSbits_t; 91 92 extern __at(0x0003) volatile __STATUSbits_t STATUSbits; 93 94 #define _C 0x01 95 #define _DC 0x02 96 #define _Z 0x04 97 #define _NOT_PD 0x08 98 #define _NOT_TO 0x10 99 #define _RP0 0x20 100 #define _RP1 0x40 101 #define _IRP 0x80 102 103 //============================================================================== 104 105 extern __at(0x0004) __sfr FSR; 106 107 //============================================================================== 108 // PORTA Bits 109 110 extern __at(0x0005) __sfr PORTA; 111 112 typedef union 113 { 114 struct 115 { 116 unsigned RA0 : 1; 117 unsigned RA1 : 1; 118 unsigned RA2 : 1; 119 unsigned RA3 : 1; 120 unsigned RA4 : 1; 121 unsigned : 1; 122 unsigned : 1; 123 unsigned : 1; 124 }; 125 126 struct 127 { 128 unsigned RA : 5; 129 unsigned : 3; 130 }; 131 } __PORTAbits_t; 132 133 extern __at(0x0005) volatile __PORTAbits_t PORTAbits; 134 135 #define _RA0 0x01 136 #define _RA1 0x02 137 #define _RA2 0x04 138 #define _RA3 0x08 139 #define _RA4 0x10 140 141 //============================================================================== 142 143 144 //============================================================================== 145 // PORTB Bits 146 147 extern __at(0x0006) __sfr PORTB; 148 149 typedef struct 150 { 151 unsigned RB0 : 1; 152 unsigned RB1 : 1; 153 unsigned RB2 : 1; 154 unsigned RB3 : 1; 155 unsigned RB4 : 1; 156 unsigned RB5 : 1; 157 unsigned RB6 : 1; 158 unsigned RB7 : 1; 159 } __PORTBbits_t; 160 161 extern __at(0x0006) volatile __PORTBbits_t PORTBbits; 162 163 #define _RB0 0x01 164 #define _RB1 0x02 165 #define _RB2 0x04 166 #define _RB3 0x08 167 #define _RB4 0x10 168 #define _RB5 0x20 169 #define _RB6 0x40 170 #define _RB7 0x80 171 172 //============================================================================== 173 174 extern __at(0x0008) __sfr EEDATA; 175 extern __at(0x0009) __sfr EEADR; 176 extern __at(0x000A) __sfr PCLATH; 177 178 //============================================================================== 179 // INTCON Bits 180 181 extern __at(0x000B) __sfr INTCON; 182 183 typedef union 184 { 185 struct 186 { 187 unsigned RBIF : 1; 188 unsigned INTF : 1; 189 unsigned T0IF : 1; 190 unsigned RBIE : 1; 191 unsigned INTE : 1; 192 unsigned T0IE : 1; 193 unsigned EEIE : 1; 194 unsigned GIE : 1; 195 }; 196 197 struct 198 { 199 unsigned : 1; 200 unsigned : 1; 201 unsigned TMR0IF : 1; 202 unsigned : 1; 203 unsigned : 1; 204 unsigned TMR0IE : 1; 205 unsigned : 1; 206 unsigned : 1; 207 }; 208 } __INTCONbits_t; 209 210 extern __at(0x000B) volatile __INTCONbits_t INTCONbits; 211 212 #define _RBIF 0x01 213 #define _INTF 0x02 214 #define _T0IF 0x04 215 #define _TMR0IF 0x04 216 #define _RBIE 0x08 217 #define _INTE 0x10 218 #define _T0IE 0x20 219 #define _TMR0IE 0x20 220 #define _EEIE 0x40 221 #define _GIE 0x80 222 223 //============================================================================== 224 225 226 //============================================================================== 227 // OPTION_REG Bits 228 229 extern __at(0x0081) __sfr OPTION_REG; 230 231 typedef union 232 { 233 struct 234 { 235 unsigned PS0 : 1; 236 unsigned PS1 : 1; 237 unsigned PS2 : 1; 238 unsigned PSA : 1; 239 unsigned T0SE : 1; 240 unsigned T0CS : 1; 241 unsigned INTEDG : 1; 242 unsigned NOT_RBPU : 1; 243 }; 244 245 struct 246 { 247 unsigned PS : 3; 248 unsigned : 5; 249 }; 250 } __OPTION_REGbits_t; 251 252 extern __at(0x0081) volatile __OPTION_REGbits_t OPTION_REGbits; 253 254 #define _PS0 0x01 255 #define _PS1 0x02 256 #define _PS2 0x04 257 #define _PSA 0x08 258 #define _T0SE 0x10 259 #define _T0CS 0x20 260 #define _INTEDG 0x40 261 #define _NOT_RBPU 0x80 262 263 //============================================================================== 264 265 266 //============================================================================== 267 // TRISA Bits 268 269 extern __at(0x0085) __sfr TRISA; 270 271 typedef union 272 { 273 struct 274 { 275 unsigned TRISA0 : 1; 276 unsigned TRISA1 : 1; 277 unsigned TRISA2 : 1; 278 unsigned TRISA3 : 1; 279 unsigned TRISA4 : 1; 280 unsigned : 1; 281 unsigned : 1; 282 unsigned : 1; 283 }; 284 285 struct 286 { 287 unsigned TRISA : 5; 288 unsigned : 3; 289 }; 290 } __TRISAbits_t; 291 292 extern __at(0x0085) volatile __TRISAbits_t TRISAbits; 293 294 #define _TRISA0 0x01 295 #define _TRISA1 0x02 296 #define _TRISA2 0x04 297 #define _TRISA3 0x08 298 #define _TRISA4 0x10 299 300 //============================================================================== 301 302 303 //============================================================================== 304 // TRISB Bits 305 306 extern __at(0x0086) __sfr TRISB; 307 308 typedef struct 309 { 310 unsigned TRISB0 : 1; 311 unsigned TRISB1 : 1; 312 unsigned TRISB2 : 1; 313 unsigned TRISB3 : 1; 314 unsigned TRISB4 : 1; 315 unsigned TRISB5 : 1; 316 unsigned TRISB6 : 1; 317 unsigned TRISB7 : 1; 318 } __TRISBbits_t; 319 320 extern __at(0x0086) volatile __TRISBbits_t TRISBbits; 321 322 #define _TRISB0 0x01 323 #define _TRISB1 0x02 324 #define _TRISB2 0x04 325 #define _TRISB3 0x08 326 #define _TRISB4 0x10 327 #define _TRISB5 0x20 328 #define _TRISB6 0x40 329 #define _TRISB7 0x80 330 331 //============================================================================== 332 333 334 //============================================================================== 335 // EECON1 Bits 336 337 extern __at(0x0088) __sfr EECON1; 338 339 typedef struct 340 { 341 unsigned RD : 1; 342 unsigned WR : 1; 343 unsigned WREN : 1; 344 unsigned WRERR : 1; 345 unsigned EEIF : 1; 346 unsigned : 1; 347 unsigned : 1; 348 unsigned : 1; 349 } __EECON1bits_t; 350 351 extern __at(0x0088) volatile __EECON1bits_t EECON1bits; 352 353 #define _RD 0x01 354 #define _WR 0x02 355 #define _WREN 0x04 356 #define _WRERR 0x08 357 #define _EEIF 0x10 358 359 //============================================================================== 360 361 extern __at(0x0089) __sfr EECON2; 362 363 //============================================================================== 364 // 365 // Configuration Bits 366 // 367 //============================================================================== 368 369 #define _CONFIG 0x2007 370 371 //----------------------------- CONFIG Options ------------------------------- 372 373 #define _FOSC_LP 0x3FFC // LP oscillator. 374 #define _LP_OSC 0x3FFC // LP oscillator. 375 #define _FOSC_XT 0x3FFD // XT oscillator. 376 #define _XT_OSC 0x3FFD // XT oscillator. 377 #define _FOSC_HS 0x3FFE // HS oscillator. 378 #define _HS_OSC 0x3FFE // HS oscillator. 379 #define _FOSC_EXTRC 0x3FFF // RC oscillator. 380 #define _RC_OSC 0x3FFF // RC oscillator. 381 #define _WDTE_OFF 0x3FFB // WDT disabled. 382 #define _WDT_OFF 0x3FFB // WDT disabled. 383 #define _WDTE_ON 0x3FFF // WDT enabled. 384 #define _WDT_ON 0x3FFF // WDT enabled. 385 #define _PWRTE_ON 0x3FF7 // Power-up Timer is enabled. 386 #define _PWRTE_OFF 0x3FFF // Power-up Timer is disabled. 387 #define _CP_ON 0x000F // All program memory is code protected. 388 #define _CP_OFF 0x3FFF // Code protection disabled. 389 390 //============================================================================== 391 392 #define _IDLOC0 0x2000 393 #define _IDLOC1 0x2001 394 #define _IDLOC2 0x2002 395 #define _IDLOC3 0x2003 396 397 //============================================================================== 398 399 #ifndef NO_BIT_DEFINES 400 401 #define RD EECON1bits.RD // bit 0 402 #define WR EECON1bits.WR // bit 1 403 #define WREN EECON1bits.WREN // bit 2 404 #define WRERR EECON1bits.WRERR // bit 3 405 #define EEIF EECON1bits.EEIF // bit 4 406 407 #define RBIF INTCONbits.RBIF // bit 0 408 #define INTF INTCONbits.INTF // bit 1 409 #define T0IF INTCONbits.T0IF // bit 2, shadows bit in INTCONbits 410 #define TMR0IF INTCONbits.TMR0IF // bit 2, shadows bit in INTCONbits 411 #define RBIE INTCONbits.RBIE // bit 3 412 #define INTE INTCONbits.INTE // bit 4 413 #define T0IE INTCONbits.T0IE // bit 5, shadows bit in INTCONbits 414 #define TMR0IE INTCONbits.TMR0IE // bit 5, shadows bit in INTCONbits 415 #define EEIE INTCONbits.EEIE // bit 6 416 #define GIE INTCONbits.GIE // bit 7 417 418 #define PS0 OPTION_REGbits.PS0 // bit 0 419 #define PS1 OPTION_REGbits.PS1 // bit 1 420 #define PS2 OPTION_REGbits.PS2 // bit 2 421 #define PSA OPTION_REGbits.PSA // bit 3 422 #define T0SE OPTION_REGbits.T0SE // bit 4 423 #define T0CS OPTION_REGbits.T0CS // bit 5 424 #define INTEDG OPTION_REGbits.INTEDG // bit 6 425 #define NOT_RBPU OPTION_REGbits.NOT_RBPU // bit 7 426 427 #define RA0 PORTAbits.RA0 // bit 0 428 #define RA1 PORTAbits.RA1 // bit 1 429 #define RA2 PORTAbits.RA2 // bit 2 430 #define RA3 PORTAbits.RA3 // bit 3 431 #define RA4 PORTAbits.RA4 // bit 4 432 433 #define RB0 PORTBbits.RB0 // bit 0 434 #define RB1 PORTBbits.RB1 // bit 1 435 #define RB2 PORTBbits.RB2 // bit 2 436 #define RB3 PORTBbits.RB3 // bit 3 437 #define RB4 PORTBbits.RB4 // bit 4 438 #define RB5 PORTBbits.RB5 // bit 5 439 #define RB6 PORTBbits.RB6 // bit 6 440 #define RB7 PORTBbits.RB7 // bit 7 441 442 #define C STATUSbits.C // bit 0 443 #define DC STATUSbits.DC // bit 1 444 #define Z STATUSbits.Z // bit 2 445 #define NOT_PD STATUSbits.NOT_PD // bit 3 446 #define NOT_TO STATUSbits.NOT_TO // bit 4 447 #define RP0 STATUSbits.RP0 // bit 5 448 #define RP1 STATUSbits.RP1 // bit 6 449 #define IRP STATUSbits.IRP // bit 7 450 451 #define TRISA0 TRISAbits.TRISA0 // bit 0 452 #define TRISA1 TRISAbits.TRISA1 // bit 1 453 #define TRISA2 TRISAbits.TRISA2 // bit 2 454 #define TRISA3 TRISAbits.TRISA3 // bit 3 455 #define TRISA4 TRISAbits.TRISA4 // bit 4 456 457 #define TRISB0 TRISBbits.TRISB0 // bit 0 458 #define TRISB1 TRISBbits.TRISB1 // bit 1 459 #define TRISB2 TRISBbits.TRISB2 // bit 2 460 #define TRISB3 TRISBbits.TRISB3 // bit 3 461 #define TRISB4 TRISBbits.TRISB4 // bit 4 462 #define TRISB5 TRISBbits.TRISB5 // bit 5 463 #define TRISB6 TRISBbits.TRISB6 // bit 6 464 #define TRISB7 TRISBbits.TRISB7 // bit 7 465 466 #endif // #ifndef NO_BIT_DEFINES 467 468 #endif // #ifndef __PIC16LF84_H__ 469