xref: /freebsd/sys/dev/qlxgbe/ql_tmplt.h (revision 95ee2897)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2013-2016 Qlogic Corporation
5  * All rights reserved.
6  *
7  *  Redistribution and use in source and binary forms, with or without
8  *  modification, are permitted provided that the following conditions
9  *  are met:
10  *
11  *  1. Redistributions of source code must retain the above copyright
12  *     notice, this list of conditions and the following disclaimer.
13  *  2. Redistributions in binary form must reproduce the above copyright
14  *     notice, this list of conditions and the following disclaimer in the
15  *     documentation and/or other materials provided with the distribution.
16  *
17  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
21  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27  *  POSSIBILITY OF SUCH DAMAGE.
28  */
29 /*
30  * File: ql_tmplt.h
31  * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
32  */
33 #ifndef _QL_TMPLT_H_
34 #define _QL_TMPLT_H_
35 
36 typedef struct _q8_tmplt_hdr {
37 	uint16_t	version;
38 	uint16_t	signature;
39 	uint16_t	size;
40 	uint16_t	nentries;
41 	uint16_t	stop_seq_off;
42 	uint16_t	csum;
43 	uint16_t	init_seq_off;
44 	uint16_t	start_seq_off;
45 } __packed q8_tmplt_hdr_t;
46 
47 typedef struct _q8_ce_hdr {
48 	uint16_t	opcode;
49 	uint16_t	size;
50 	uint16_t	opcount;
51 	uint16_t	delay_to;
52 } __packed q8_ce_hdr_t;
53 
54 /*
55  * Values for opcode field in q8_ce_hdr_t
56  */
57 #define Q8_CE_OPCODE_NOP		0x000
58 #define Q8_CE_OPCODE_WRITE_LIST		0x001
59 #define Q8_CE_OPCODE_READ_WRITE_LIST	0x002
60 #define Q8_CE_OPCODE_POLL_LIST		0x004
61 #define Q8_CE_OPCODE_POLL_WRITE_LIST	0x008
62 #define Q8_CE_OPCODE_READ_MODIFY_WRITE	0x010
63 #define Q8_CE_OPCODE_SEQ_PAUSE		0x020
64 #define Q8_CE_OPCODE_SEQ_END		0x040
65 #define Q8_CE_OPCODE_TMPLT_END		0x080
66 #define Q8_CE_OPCODE_POLL_RD_LIST	0x100
67 
68 /*
69  * structure for Q8_CE_OPCODE_WRITE_LIST
70  */
71 typedef struct _q8_wrl_e {
72 	uint32_t	addr;
73 	uint32_t	value;
74 } __packed q8_wrl_e_t;
75 
76 /*
77  * structure for Q8_CE_OPCODE_READ_WRITE_LIST
78  */
79 typedef struct _q8_rdwrl_e {
80 	uint32_t	rd_addr;
81 	uint32_t	wr_addr;
82 } __packed q8_rdwrl_e_t;
83 
84 /*
85  * common for
86  *	Q8_CE_OPCODE_POLL_LIST
87  *	Q8_CE_OPCODE_POLL_WRITE_LIST
88  *	Q8_CE_OPCODE_POLL_RD_LIST
89  */
90 typedef struct _q8_poll_hdr {
91 	uint32_t	tmask;
92 	uint32_t	tvalue;
93 } q8_poll_hdr_t;
94 
95 /*
96  * structure for Q8_CE_OPCODE_POLL_LIST
97  */
98 typedef struct _q8_poll_e {
99 	uint32_t	addr;
100 	uint32_t	to_addr;
101 } q8_poll_e_t;
102 
103 /*
104  * structure for Q8_CE_OPCODE_POLL_WRITE_LIST
105  */
106 typedef struct _q8_poll_wr_e {
107 	uint32_t	dr_addr;
108 	uint32_t	dr_value;
109 	uint32_t	ar_addr;
110 	uint32_t	ar_value;
111 } q8_poll_wr_e_t;
112 
113 /*
114  * structure for Q8_CE_OPCODE_POLL_RD_LIST
115  */
116 typedef struct _q8_poll_rd_e {
117 	uint32_t	ar_addr;
118 	uint32_t	ar_value;
119 	uint32_t	dr_addr;
120 	uint32_t	rsrvd;
121 } q8_poll_rd_e_t;
122 
123 /*
124  * structure for Q8_CE_OPCODE_READ_MODIFY_WRITE
125  */
126 typedef struct _q8_rdmwr_hdr {
127 	uint32_t	and_value;
128 	uint32_t	xor_value;
129 	uint32_t	or_value;
130 	uint8_t		shl;
131 	uint8_t		shr;
132 	uint8_t		index_a;
133 	uint8_t		rsrvd;
134 } q8_rdmwr_hdr_t;
135 
136 typedef struct _q8_rdmwr_e {
137 	uint32_t	rd_addr;
138 	uint32_t	wr_addr;
139 } q8_rdmwr_e_t;
140 
141 #endif /* #ifndef _QL_TMPLT_H_ */
142