1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28 #include <drm/drmP.h>
29 #include <drm/drm_crtc_helper.h>
30 #include <drm/radeon_drm.h>
31 #include "radeon_reg.h"
32 #include "radeon_irq_kms.h"
33 #include "radeon.h"
34 #include "atom.h"
35
36 #include <linux/pm_runtime.h>
37
38 #define RADEON_WAIT_IDLE_TIMEOUT 200
39
40 /**
41 * radeon_driver_irq_handler_kms - irq handler for KMS
42 *
43 * @int irq, void *arg: args
44 *
45 * This is the irq handler for the radeon KMS driver (all asics).
46 * radeon_irq_process is a macro that points to the per-asic
47 * irq handler callback.
48 */
radeon_driver_irq_handler_kms(int irq,void * arg)49 irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg)
50 {
51 struct drm_device *dev = (struct drm_device *) arg;
52 struct radeon_device *rdev = dev->dev_private;
53 irqreturn_t ret;
54
55 ret = radeon_irq_process(rdev);
56 #ifdef PM_TODO
57 if (ret == IRQ_HANDLED)
58 pm_runtime_mark_last_busy(dev->dev);
59 #endif
60 return ret;
61 }
62
63 /*
64 * Handle hotplug events outside the interrupt handler proper.
65 */
66 /**
67 * radeon_hotplug_work_func - display hotplug work handler
68 *
69 * @work: work struct
70 *
71 * This is the hot plug event work handler (all asics).
72 * The work gets scheduled from the irq handler if there
73 * was a hot plug interrupt. It walks the connector table
74 * and calls the hotplug handler for each one, then sends
75 * a drm hotplug event to alert userspace.
76 */
radeon_hotplug_work_func(struct work_struct * work)77 static void radeon_hotplug_work_func(struct work_struct *work)
78 {
79 struct radeon_device *rdev = container_of(work, struct radeon_device,
80 hotplug_work.work);
81 struct drm_device *dev = rdev->ddev;
82 struct drm_mode_config *mode_config = &dev->mode_config;
83 struct drm_connector *connector;
84
85 /* we can race here at startup, some boards seem to trigger
86 * hotplug irqs when they shouldn't. */
87 if (!rdev->mode_info.mode_config_initialized)
88 return;
89
90 mutex_lock(&mode_config->mutex);
91 list_for_each_entry(connector, &mode_config->connector_list, head)
92 radeon_connector_hotplug(connector);
93 mutex_unlock(&mode_config->mutex);
94 /* Just fire off a uevent and let userspace tell us what to do */
95 drm_helper_hpd_irq_event(dev);
96 }
97
radeon_dp_work_func(struct work_struct * work)98 static void radeon_dp_work_func(struct work_struct *work)
99 {
100 struct radeon_device *rdev = container_of(work, struct radeon_device,
101 dp_work);
102 struct drm_device *dev = rdev->ddev;
103 struct drm_mode_config *mode_config = &dev->mode_config;
104 struct drm_connector *connector;
105
106 /* this should take a mutex */
107 list_for_each_entry(connector, &mode_config->connector_list, head)
108 radeon_connector_hotplug(connector);
109 }
110 /**
111 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
112 *
113 * @dev: drm dev pointer
114 *
115 * Gets the hw ready to enable irqs (all asics).
116 * This function disables all interrupt sources on the GPU.
117 */
radeon_driver_irq_preinstall_kms(struct drm_device * dev)118 void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
119 {
120 struct radeon_device *rdev = dev->dev_private;
121 unsigned long irqflags;
122 unsigned i;
123
124 spin_lock_irqsave(&rdev->irq.lock, irqflags);
125 /* Disable *all* interrupts */
126 for (i = 0; i < RADEON_NUM_RINGS; i++)
127 atomic_set(&rdev->irq.ring_int[i], 0);
128 rdev->irq.dpm_thermal = false;
129 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
130 rdev->irq.hpd[i] = false;
131 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
132 rdev->irq.crtc_vblank_int[i] = false;
133 atomic_set(&rdev->irq.pflip[i], 0);
134 rdev->irq.afmt[i] = false;
135 }
136 radeon_irq_set(rdev);
137 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
138 /* Clear bits */
139 radeon_irq_process(rdev);
140 }
141
142 /**
143 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
144 *
145 * @dev: drm dev pointer
146 *
147 * Handles stuff to be done after enabling irqs (all asics).
148 * Returns 0 on success.
149 */
radeon_driver_irq_postinstall_kms(struct drm_device * dev)150 int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
151 {
152 struct radeon_device *rdev = dev->dev_private;
153
154 if (ASIC_IS_AVIVO(rdev))
155 dev->max_vblank_count = 0x00ffffff;
156 else
157 dev->max_vblank_count = 0x001fffff;
158
159 return 0;
160 }
161
162 /**
163 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
164 *
165 * @dev: drm dev pointer
166 *
167 * This function disables all interrupt sources on the GPU (all asics).
168 */
radeon_driver_irq_uninstall_kms(struct drm_device * dev)169 void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
170 {
171 struct radeon_device *rdev = dev->dev_private;
172 unsigned long irqflags;
173 unsigned i;
174
175 if (rdev == NULL) {
176 return;
177 }
178 spin_lock_irqsave(&rdev->irq.lock, irqflags);
179 /* Disable *all* interrupts */
180 for (i = 0; i < RADEON_NUM_RINGS; i++)
181 atomic_set(&rdev->irq.ring_int[i], 0);
182 rdev->irq.dpm_thermal = false;
183 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
184 rdev->irq.hpd[i] = false;
185 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
186 rdev->irq.crtc_vblank_int[i] = false;
187 atomic_set(&rdev->irq.pflip[i], 0);
188 rdev->irq.afmt[i] = false;
189 }
190 radeon_irq_set(rdev);
191 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
192 }
193
194 #if 0
195 /**
196 * radeon_msi_ok - asic specific msi checks
197 *
198 * @rdev: radeon device pointer
199 *
200 * Handles asic specific MSI checks to determine if
201 * MSIs should be enabled on a particular chip (all asics).
202 * Returns true if MSIs should be enabled, false if MSIs
203 * should not be enabled.
204 */
205 static bool radeon_msi_ok(struct radeon_device *rdev)
206 {
207 /* RV370/RV380 was first asic with MSI support */
208 if (rdev->family < CHIP_RV380)
209 return false;
210
211 /* MSIs don't work on AGP */
212 if (drm_pci_device_is_agp(rdev))
213 return false;
214
215 /*
216 * Older chips have a HW limitation, they can only generate 40 bits
217 * of address for "64-bit" MSIs which breaks on some platforms, notably
218 * IBM POWER servers, so we limit them
219 */
220 if (rdev->family < CHIP_BONAIRE) {
221 dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
222 rdev->pdev->no_64bit_msi = 1;
223 }
224
225 /* force MSI on */
226 if (radeon_msi == 1)
227 return true;
228 else if (radeon_msi == 0)
229 return false;
230
231 /* Quirks */
232 /* HP RS690 only seems to work with MSIs. */
233 if ((rdev->pdev->device == 0x791f) &&
234 (rdev->pdev->subsystem_vendor == 0x103c) &&
235 (rdev->pdev->subsystem_device == 0x30c2))
236 return true;
237
238 /* Dell RS690 only seems to work with MSIs. */
239 if ((rdev->pdev->device == 0x791f) &&
240 (rdev->pdev->subsystem_vendor == 0x1028) &&
241 (rdev->pdev->subsystem_device == 0x01fc))
242 return true;
243
244 /* Dell RS690 only seems to work with MSIs. */
245 if ((rdev->pdev->device == 0x791f) &&
246 (rdev->pdev->subsystem_vendor == 0x1028) &&
247 (rdev->pdev->subsystem_device == 0x01fd))
248 return true;
249
250 /* Gateway RS690 only seems to work with MSIs. */
251 if ((rdev->pdev->device == 0x791f) &&
252 (rdev->pdev->subsystem_vendor == 0x107b) &&
253 (rdev->pdev->subsystem_device == 0x0185))
254 return true;
255
256 /* try and enable MSIs by default on all RS690s */
257 if (rdev->family == CHIP_RS690)
258 return true;
259
260 /* RV515 seems to have MSI issues where it loses
261 * MSI rearms occasionally. This leads to lockups and freezes.
262 * disable it by default.
263 */
264 if (rdev->family == CHIP_RV515)
265 return false;
266 if (rdev->flags & RADEON_IS_IGP) {
267 /* APUs work fine with MSIs */
268 if (rdev->family >= CHIP_PALM)
269 return true;
270 /* lots of IGPs have problems with MSIs */
271 return false;
272 }
273
274 return true;
275 }
276 #endif
277
278 /**
279 * radeon_irq_kms_init - init driver interrupt info
280 *
281 * @rdev: radeon device pointer
282 *
283 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
284 * Returns 0 for success, error for failure.
285 */
radeon_irq_kms_init(struct radeon_device * rdev)286 int radeon_irq_kms_init(struct radeon_device *rdev)
287 {
288 int r = 0;
289
290 lockinit(&rdev->irq.lock, "drdil", 0, 0);
291
292 /* Disable vblank irqs aggressively for power-saving */
293 rdev->ddev->vblank_disable_immediate = true;
294
295 r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
296 if (r) {
297 return r;
298 }
299
300 /* enable msi */
301 rdev->msi_enabled = (rdev->ddev->pdev->_irq_type == PCI_INTR_TYPE_MSI);
302
303 #ifndef __DragonFly__
304 if (radeon_msi_ok(rdev)) {
305 int ret = pci_enable_msi(rdev->pdev);
306 if (!ret) {
307 rdev->msi_enabled = 1;
308 dev_info(rdev->dev, "radeon: using MSI.\n");
309 }
310 }
311 #endif
312
313 INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
314 INIT_WORK(&rdev->dp_work, radeon_dp_work_func);
315 INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
316
317 rdev->irq.installed = true;
318 r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq);
319 if (r) {
320 rdev->irq.installed = false;
321 flush_delayed_work(&rdev->hotplug_work);
322 return r;
323 }
324
325 DRM_INFO("radeon: irq initialized.\n");
326 return 0;
327 }
328
329 /**
330 * radeon_irq_kms_fini - tear down driver interrupt info
331 *
332 * @rdev: radeon device pointer
333 *
334 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
335 */
radeon_irq_kms_fini(struct radeon_device * rdev)336 void radeon_irq_kms_fini(struct radeon_device *rdev)
337 {
338 if (rdev->irq.installed) {
339 drm_irq_uninstall(rdev->ddev);
340 rdev->irq.installed = false;
341 #ifndef __DragonFly__
342 if (rdev->msi_enabled)
343 pci_disable_msi(rdev->pdev);
344 #endif
345 flush_delayed_work(&rdev->hotplug_work);
346 }
347 }
348
349 /**
350 * radeon_irq_kms_sw_irq_get - enable software interrupt
351 *
352 * @rdev: radeon device pointer
353 * @ring: ring whose interrupt you want to enable
354 *
355 * Enables the software interrupt for a specific ring (all asics).
356 * The software interrupt is generally used to signal a fence on
357 * a particular ring.
358 */
radeon_irq_kms_sw_irq_get(struct radeon_device * rdev,int ring)359 void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
360 {
361 unsigned long irqflags;
362
363 if (!rdev->ddev->irq_enabled)
364 return;
365
366 if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
367 spin_lock_irqsave(&rdev->irq.lock, irqflags);
368 radeon_irq_set(rdev);
369 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
370 }
371 }
372
373 /**
374 * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt
375 *
376 * @rdev: radeon device pointer
377 * @ring: ring whose interrupt you want to enable
378 *
379 * Enables the software interrupt for a specific ring (all asics).
380 * The software interrupt is generally used to signal a fence on
381 * a particular ring.
382 */
radeon_irq_kms_sw_irq_get_delayed(struct radeon_device * rdev,int ring)383 bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring)
384 {
385 return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1;
386 }
387
388 /**
389 * radeon_irq_kms_sw_irq_put - disable software interrupt
390 *
391 * @rdev: radeon device pointer
392 * @ring: ring whose interrupt you want to disable
393 *
394 * Disables the software interrupt for a specific ring (all asics).
395 * The software interrupt is generally used to signal a fence on
396 * a particular ring.
397 */
radeon_irq_kms_sw_irq_put(struct radeon_device * rdev,int ring)398 void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
399 {
400 unsigned long irqflags;
401
402 if (!rdev->ddev->irq_enabled)
403 return;
404
405 if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
406 spin_lock_irqsave(&rdev->irq.lock, irqflags);
407 radeon_irq_set(rdev);
408 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
409 }
410 }
411
412 /**
413 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
414 *
415 * @rdev: radeon device pointer
416 * @crtc: crtc whose interrupt you want to enable
417 *
418 * Enables the pageflip interrupt for a specific crtc (all asics).
419 * For pageflips we use the vblank interrupt source.
420 */
radeon_irq_kms_pflip_irq_get(struct radeon_device * rdev,int crtc)421 void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
422 {
423 unsigned long irqflags;
424
425 if (crtc < 0 || crtc >= rdev->num_crtc)
426 return;
427
428 if (!rdev->ddev->irq_enabled)
429 return;
430
431 if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
432 spin_lock_irqsave(&rdev->irq.lock, irqflags);
433 radeon_irq_set(rdev);
434 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
435 }
436 }
437
438 /**
439 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
440 *
441 * @rdev: radeon device pointer
442 * @crtc: crtc whose interrupt you want to disable
443 *
444 * Disables the pageflip interrupt for a specific crtc (all asics).
445 * For pageflips we use the vblank interrupt source.
446 */
radeon_irq_kms_pflip_irq_put(struct radeon_device * rdev,int crtc)447 void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
448 {
449 unsigned long irqflags;
450
451 if (crtc < 0 || crtc >= rdev->num_crtc)
452 return;
453
454 if (!rdev->ddev->irq_enabled)
455 return;
456
457 if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
458 spin_lock_irqsave(&rdev->irq.lock, irqflags);
459 radeon_irq_set(rdev);
460 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
461 }
462 }
463
464 /**
465 * radeon_irq_kms_enable_afmt - enable audio format change interrupt
466 *
467 * @rdev: radeon device pointer
468 * @block: afmt block whose interrupt you want to enable
469 *
470 * Enables the afmt change interrupt for a specific afmt block (all asics).
471 */
radeon_irq_kms_enable_afmt(struct radeon_device * rdev,int block)472 void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
473 {
474 unsigned long irqflags;
475
476 if (!rdev->ddev->irq_enabled)
477 return;
478
479 spin_lock_irqsave(&rdev->irq.lock, irqflags);
480 rdev->irq.afmt[block] = true;
481 radeon_irq_set(rdev);
482 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
483
484 }
485
486 /**
487 * radeon_irq_kms_disable_afmt - disable audio format change interrupt
488 *
489 * @rdev: radeon device pointer
490 * @block: afmt block whose interrupt you want to disable
491 *
492 * Disables the afmt change interrupt for a specific afmt block (all asics).
493 */
radeon_irq_kms_disable_afmt(struct radeon_device * rdev,int block)494 void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
495 {
496 unsigned long irqflags;
497
498 if (!rdev->ddev->irq_enabled)
499 return;
500
501 spin_lock_irqsave(&rdev->irq.lock, irqflags);
502 rdev->irq.afmt[block] = false;
503 radeon_irq_set(rdev);
504 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
505 }
506
507 /**
508 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
509 *
510 * @rdev: radeon device pointer
511 * @hpd_mask: mask of hpd pins you want to enable.
512 *
513 * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
514 */
radeon_irq_kms_enable_hpd(struct radeon_device * rdev,unsigned hpd_mask)515 void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
516 {
517 unsigned long irqflags;
518 int i;
519
520 if (!rdev->ddev->irq_enabled)
521 return;
522
523 spin_lock_irqsave(&rdev->irq.lock, irqflags);
524 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
525 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
526 radeon_irq_set(rdev);
527 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
528 }
529
530 /**
531 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
532 *
533 * @rdev: radeon device pointer
534 * @hpd_mask: mask of hpd pins you want to disable.
535 *
536 * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
537 */
radeon_irq_kms_disable_hpd(struct radeon_device * rdev,unsigned hpd_mask)538 void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
539 {
540 unsigned long irqflags;
541 int i;
542
543 if (!rdev->ddev->irq_enabled)
544 return;
545
546 spin_lock_irqsave(&rdev->irq.lock, irqflags);
547 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
548 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
549 radeon_irq_set(rdev);
550 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
551 }
552
553 /**
554 * radeon_irq_kms_update_int_n - helper for updating interrupt enable registers
555 *
556 * @rdev: radeon device pointer
557 * @reg: the register to write to enable/disable interrupts
558 * @mask: the mask that enables the interrupts
559 * @enable: whether to enable or disable the interrupt register
560 * @name: the name of the interrupt register to print to the kernel log
561 * @num: the number of the interrupt register to print to the kernel log
562 *
563 * Helper for updating the enable state of interrupt registers. Checks whether
564 * or not the interrupt matches the enable state we want. If it doesn't, then
565 * we update it and print a debugging message to the kernel log indicating the
566 * new state of the interrupt register.
567 *
568 * Used for updating sequences of interrupts registers like HPD1, HPD2, etc.
569 */
radeon_irq_kms_set_irq_n_enabled(struct radeon_device * rdev,u32 reg,u32 mask,bool enable,const char * name,unsigned n)570 void radeon_irq_kms_set_irq_n_enabled(struct radeon_device *rdev,
571 u32 reg, u32 mask,
572 bool enable, const char *name, unsigned n)
573 {
574 u32 tmp = RREG32(reg);
575
576 /* Interrupt state didn't change */
577 if (!!(tmp & mask) == enable)
578 return;
579
580 if (enable) {
581 DRM_DEBUG("%s%d interrupts enabled\n", name, n);
582 WREG32(reg, tmp |= mask);
583 } else {
584 DRM_DEBUG("%s%d interrupts disabled\n", name, n);
585 WREG32(reg, tmp & ~mask);
586 }
587 }
588