1 /* $OpenBSD: scireg.h,v 1.1.1.1 2006/10/06 21:02:55 miod Exp $ */ 2 /* $NetBSD: scireg.h,v 1.8 2003/07/01 11:49:37 uwe Exp $ */ 3 4 /*- 5 * Copyright (C) 1999 SAITOH Masanobu. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of the author may not be used to endorse or promote products 16 * derived from this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 /* 31 * Serial Communication Interface (SCI) 32 */ 33 34 #if !defined(SH4) 35 36 /* SH3 definitions */ 37 38 #define SHREG_SCSMR (*(volatile unsigned char *) 0xFFFFFE80) 39 #define SHREG_SCBRR (*(volatile unsigned char *) 0xFFFFFE82) 40 #define SHREG_SCSCR (*(volatile unsigned char *) 0xFFFFFE84) 41 #define SHREG_SCTDR (*(volatile unsigned char *) 0xFFFFFE86) 42 #define SHREG_SCSSR (*(volatile unsigned char *) 0xFFFFFE88) 43 #define SHREG_SCRDR (*(volatile unsigned char *) 0xFFFFFE8A) 44 #define SHREG_SCSPDR (*(volatile unsigned char *) 0xf4000136) 45 46 #else 47 48 /* SH4 definitions */ 49 50 #define SHREG_SCSMR (*(volatile unsigned char *) 0xffe00000) 51 #define SHREG_SCBRR (*(volatile unsigned char *) 0xffe00004) 52 #define SHREG_SCSCR (*(volatile unsigned char *) 0xffe00008) 53 #define SHREG_SCTDR (*(volatile unsigned char *) 0xffe0000c) 54 #define SHREG_SCSSR (*(volatile unsigned char *) 0xffe00010) 55 #define SHREG_SCRDR (*(volatile unsigned char *) 0xffe00014) 56 #define SHREG_SCSPTR (*(volatile unsigned char *) 0xffe0001c) 57 58 #endif 59 60 #define SCSCR_TIE 0x80 /* Transmit Interrupt Enable */ 61 #define SCSCR_RIE 0x40 /* Receive Interrupt Enable */ 62 #define SCSCR_TE 0x20 /* Transmit Enable */ 63 #define SCSCR_RE 0x10 /* Receive Enable */ 64 #define SCSCR_MPIE 0x08 /* Multi Processor Interrupt Enable */ 65 #define SCSCR_TEIE 0x04 /* Transmit End Interrupt Enable */ 66 #define SCSCR_CKE1 0x02 /* ClocK Enable 1 */ 67 #define SCSCR_CKE0 0x01 /* ClocK Enable 0 */ 68 69 #define SCSSR_TDRE 0x80 70 #define SCSSR_RDRF 0x40 71 #define SCSSR_ORER 0x20 72 #define SCSSR_FER 0x10 73 #define SCSSR_PER 0x08 74 75 #define SCSPTR_SPB1IO 0x08 76 #define SCSPTR_SPB1DT 0x04 77 #define SCSPTR_SPB0IO 0x02 78 #define SCSPTR_SPB0DT 0x01 79 80 #if defined(SH3) 81 #define SCSPDR_SCP0DT 0x01 82 #endif 83