1//Original:/testcases/core/c_dagmodim_lz_inc_dec/c_dagmodim_lz_inc_dec.dsp
2// Spec Reference: dagmodim L=0, I incremented & decremented (by M)
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8
9INIT_R_REGS 0;
10
11imm32 i0, 0x10001000;
12imm32 i1, 0x02001100;
13imm32 i2, 0x00301010;
14imm32 i3, 0x00041001;
15
16imm32 m0, 0x00000005;
17imm32 m1, 0x00000006;
18imm32 m2, 0x00000007;
19imm32 m3, 0x00000008;
20
21 I0 += M0;
22 I1 += M1;
23 I2 += M2;
24 I3 += M3;
25R0 = I0;
26R1 = I1;
27R2 = I2;
28R3 = I3;
29 I0 += M1;
30 I1 += M2;
31 I2 += M3;
32 I3 += M0;
33R4 = I0;
34R5 = I1;
35R6 = I2;
36R7 = I3;
37
38CHECKREG r0, 0x10001005;
39CHECKREG r1, 0x02001106;
40CHECKREG r2, 0x00301017;
41CHECKREG r3, 0x00041009;
42CHECKREG r4, 0x1000100B;
43CHECKREG r5, 0x0200110D;
44CHECKREG r6, 0x0030101F;
45CHECKREG r7, 0x0004100E;
46
47 I0 -= M2;
48 I1 -= M3;
49 I2 -= M0;
50 I3 -= M1;
51R0 = I0;
52R1 = I1;
53R2 = I2;
54R3 = I3;
55 I0 -= M3;
56 I1 -= M2;
57 I2 -= M1;
58 I3 -= M0;
59R4 = I0;
60R5 = I1;
61R6 = I2;
62R7 = I3;
63CHECKREG r0, 0x10001004;
64CHECKREG r1, 0x02001105;
65CHECKREG r2, 0x0030101A;
66CHECKREG r3, 0x00041008;
67CHECKREG r4, 0x10000FFC;
68CHECKREG r5, 0x020010FE;
69CHECKREG r6, 0x00301014;
70CHECKREG r7, 0x00041003;
71
72 I0 += M3 (BREV);
73 I1 += M0 (BREV);
74 I2 += M1 (BREV);
75 I3 += M2 (BREV);
76R0 = I0;
77R1 = I1;
78R2 = I2;
79R3 = I3;
80 I0 += M2 (BREV);
81 I1 += M3 (BREV);
82 I2 += M0 (BREV);
83 I3 += M1 (BREV);
84R4 = I0;
85R5 = I1;
86R6 = I2;
87R7 = I3;
88CHECKREG r0, 0x10000FF2;
89CHECKREG r1, 0x020010F8;
90CHECKREG r2, 0x00301011;
91CHECKREG r3, 0x00041005;
92CHECKREG r4, 0x10000FF4;
93CHECKREG r5, 0x020010F4;
94CHECKREG r6, 0x00301014;
95CHECKREG r7, 0x00041000;
96
97
98pass
99