1//Original:/testcases/core/c_dsp32alu_maxmax/c_dsp32alu_maxmax.dsp
2// Spec Reference: dsp32alu dregs = max / max ( dregs, dregs)
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8
9
10
11imm32 r0, 0x25678911;
12imm32 r1, 0x2389ab1d;
13imm32 r2, 0x34445515;
14imm32 r3, 0xe6657717;
15imm32 r4, 0x5a67891b;
16imm32 r5, 0x67b9ab1d;
17imm32 r6, 0x744d5515;
18imm32 r7, 0x8666c777;
19R0 = MAX ( R0 , R0 ) (V);
20R1 = MAX ( R0 , R1 ) (V);
21R2 = MAX ( R0 , R2 ) (V);
22R3 = MAX ( R0 , R3 ) (V);
23R4 = MAX ( R0 , R4 ) (V);
24R5 = MAX ( R0 , R5 ) (V);
25R6 = MAX ( R0 , R6 ) (V);
26R7 = MAX ( R0 , R7 ) (V);
27CHECKREG r0, 0x25678911;
28CHECKREG r1, 0x2567AB1D;
29CHECKREG r2, 0x34445515;
30CHECKREG r3, 0x25677717;
31CHECKREG r4, 0x5A67891B;
32CHECKREG r5, 0x67B9AB1D;
33CHECKREG r6, 0x744D5515;
34CHECKREG r7, 0x2567C777;
35
36imm32 r0, 0x9567892b;
37imm32 r1, 0xa789ab2d;
38imm32 r2, 0xb4445525;
39imm32 r3, 0xc6667727;
40imm32 r4, 0xd8889929;
41imm32 r5, 0xeaaabb2b;
42imm32 r6, 0xfcccdd2d;
43imm32 r7, 0x0eeeffff;
44R0 = MAX ( R1 , R0 ) (V);
45R1 = MAX ( R1 , R1 ) (V);
46R2 = MAX ( R1 , R2 ) (V);
47R3 = MAX ( R1 , R3 ) (V);
48R4 = MAX ( R1 , R4 ) (V);
49R5 = MAX ( R1 , R5 ) (V);
50R6 = MAX ( R1 , R6 ) (V);
51R7 = MAX ( R1 , R7 ) (V);
52CHECKREG r0, 0xA789AB2D;
53CHECKREG r1, 0xA789AB2D;
54CHECKREG r2, 0xB4445525;
55CHECKREG r3, 0xC6667727;
56CHECKREG r4, 0xD888AB2D;
57CHECKREG r5, 0xEAAABB2B;
58CHECKREG r6, 0xFCCCDD2D;
59CHECKREG r7, 0x0EEEFFFF;
60
61imm32 r0, 0x416789ab;
62imm32 r1, 0x5289abcd;
63imm32 r2, 0x63445555;
64imm32 r3, 0xa7669777;
65imm32 r4, 0x456789ab;
66imm32 r5, 0xb689abcd;
67imm32 r6, 0xd7445555;
68imm32 r7, 0x68667777;
69R0 = MAX ( R2 , R0 ) (V);
70R1 = MAX ( R2 , R1 ) (V);
71R2 = MAX ( R2 , R2 ) (V);
72R3 = MAX ( R2 , R3 ) (V);
73R4 = MAX ( R2 , R4 ) (V);
74R5 = MAX ( R2 , R5 ) (V);
75R6 = MAX ( R2 , R6 ) (V);
76R7 = MAX ( R2 , R7 ) (V);
77CHECKREG r0, 0x63445555;
78CHECKREG r1, 0x63445555;
79CHECKREG r2, 0x63445555;
80CHECKREG r3, 0x63445555;
81CHECKREG r4, 0x63445555;
82CHECKREG r5, 0x63445555;
83CHECKREG r6, 0x63445555;
84CHECKREG r7, 0x68667777;
85
86imm32 r0, 0x9567892b;
87imm32 r1, 0xa789ab2d;
88imm32 r2, 0xb4445525;
89imm32 r3, 0xc6667727;
90imm32 r0, 0x9567892b;
91imm32 r1, 0xa789ab2d;
92imm32 r2, 0xb4445525;
93imm32 r3, 0xc6667727;
94R0 = MAX ( R3 , R0 ) (V);
95R1 = MAX ( R3 , R1 ) (V);
96R2 = MAX ( R3 , R2 ) (V);
97R3 = MAX ( R3 , R3 ) (V);
98R4 = MAX ( R3 , R4 ) (V);
99R5 = MAX ( R3 , R5 ) (V);
100R6 = MAX ( R3 , R6 ) (V);
101R7 = MAX ( R3 , R7 ) (V);
102CHECKREG r0, 0xC6667727;
103CHECKREG r1, 0xC6667727;
104CHECKREG r2, 0xC6667727;
105CHECKREG r3, 0xC6667727;
106CHECKREG r4, 0x63447727;
107CHECKREG r5, 0x63447727;
108CHECKREG r6, 0x63447727;
109CHECKREG r7, 0x68667777;
110
111imm32 r0, 0x4537891b;
112imm32 r1, 0x6759ab2d;
113imm32 r2, 0x44555535;
114imm32 r3, 0x66665747;
115imm32 r4, 0x88789565;
116imm32 r5, 0xaa8abb5b;
117imm32 r6, 0xcc9cdd85;
118imm32 r7, 0xeeaeff9f;
119R0 = MAX ( R4 , R0 ) (V);
120R1 = MAX ( R4 , R1 ) (V);
121R2 = MAX ( R4 , R2 ) (V);
122R3 = MAX ( R4 , R3 ) (V);
123R4 = MAX ( R4 , R4 ) (V);
124R5 = MAX ( R4 , R5 ) (V);
125R6 = MAX ( R4 , R6 ) (V);
126R7 = MAX ( R4 , R7 ) (V);
127CHECKREG r0, 0x45379565;
128CHECKREG r1, 0x6759AB2D;
129CHECKREG r2, 0x44555535;
130CHECKREG r3, 0x66665747;
131CHECKREG r4, 0x88789565;
132CHECKREG r5, 0xAA8ABB5B;
133CHECKREG r6, 0xCC9CDD85;
134CHECKREG r7, 0xEEAEFF9F;
135
136imm32 r0, 0xa56b89ab;
137imm32 r1, 0x659b4bcd;
138imm32 r2, 0xd9736564;
139imm32 r3, 0x61278394;
140imm32 r4, 0xb8876439;
141imm32 r5, 0xaaaa0bbb;
142imm32 r6, 0xcccc1ddd;
143imm32 r7, 0x12346fff;
144R0 = MAX ( R5 , R0 ) (V);
145R1 = MAX ( R5 , R1 ) (V);
146R2 = MAX ( R5 , R2 ) (V);
147R3 = MAX ( R5 , R3 ) (V);
148R4 = MAX ( R5 , R4 ) (V);
149R5 = MAX ( R5 , R5 ) (V);
150R6 = MAX ( R5 , R6 ) (V);
151R7 = MAX ( R5 , R7 ) (V);
152CHECKREG r0, 0xAAAA0BBB;
153CHECKREG r1, 0x659B4BCD;
154CHECKREG r2, 0xD9736564;
155CHECKREG r3, 0x61270BBB;
156CHECKREG r4, 0xB8876439;
157CHECKREG r5, 0xAAAA0BBB;
158CHECKREG r6, 0xCCCC1DDD;
159CHECKREG r7, 0x12346FFF;
160
161imm32 r0, 0x956739ab;
162imm32 r1, 0x67694bcd;
163imm32 r2, 0xd3456755;
164imm32 r3, 0x66666777;
165imm32 r4, 0x12345699;
166imm32 r5, 0x45678b6b;
167imm32 r6, 0x043290d6;
168imm32 r7, 0x1234567f;
169R0 = MAX ( R6 , R0 ) (V);
170R1 = MAX ( R6 , R1 ) (V);
171R2 = MAX ( R6 , R2 ) (V);
172R3 = MAX ( R6 , R3 ) (V);
173R4 = MAX ( R6 , R4 ) (V);
174R5 = MAX ( R6 , R5 ) (V);
175R6 = MAX ( R6 , R6 ) (V);
176R7 = MAX ( R6 , R7 ) (V);
177CHECKREG r0, 0x043239AB;
178CHECKREG r1, 0x67694BCD;
179CHECKREG r2, 0x04326755;
180CHECKREG r3, 0x66666777;
181CHECKREG r4, 0x12345699;
182CHECKREG r5, 0x456790D6;
183CHECKREG r6, 0x043290D6;
184CHECKREG r7, 0x1234567F;
185
186imm32 r0, 0x876789ab;
187imm32 r1, 0x6779abcd;
188imm32 r2, 0xd3456755;
189imm32 r3, 0x56789007;
190imm32 r4, 0x789ab799;
191imm32 r5, 0xaaaa0bbb;
192imm32 r6, 0x89ab1d7d;
193imm32 r7, 0xabcd2ff7;
194R0 = MAX ( R7 , R0 ) (V);
195R1 = MAX ( R7 , R1 ) (V);
196R2 = MAX ( R7 , R2 ) (V);
197R3 = MAX ( R7 , R3 ) (V);
198R4 = MAX ( R7 , R4 ) (V);
199R5 = MAX ( R7 , R5 ) (V);
200R6 = MAX ( R7 , R6 ) (V);
201R7 = MAX ( R7 , R7 ) (V);
202CHECKREG r0, 0xABCD2FF7;
203CHECKREG r1, 0x67792FF7;
204CHECKREG r2, 0xD3456755;
205CHECKREG r3, 0x56782FF7;
206CHECKREG r4, 0x789A2FF7;
207CHECKREG r5, 0xABCD2FF7;
208CHECKREG r6, 0xABCD2FF7;
209CHECKREG r7, 0xABCD2FF7;
210imm32 r0, 0x456739ab;
211imm32 r1, 0x67694bcd;
212imm32 r2, 0x03456755;
213imm32 r3, 0x66666777;
214imm32 r4, 0x12345699;
215imm32 r5, 0x45678b6b;
216imm32 r6, 0x043290d6;
217imm32 r7, 0x1234567f;
218R4 = MAX ( R4 , R7 ) (V);
219R5 = MAX ( R5 , R5 ) (V);
220R2 = MAX ( R6 , R3 ) (V);
221R6 = MAX ( R0 , R4 ) (V);
222R0 = MAX ( R1 , R6 ) (V);
223R2 = MAX ( R2 , R1 ) (V);
224R1 = MAX ( R3 , R0 ) (V);
225R7 = MAX ( R7 , R4 ) (V);
226CHECKREG r0, 0x67695699;
227CHECKREG r1, 0x67696777;
228CHECKREG r2, 0x67696777;
229CHECKREG r3, 0x66666777;
230CHECKREG r4, 0x12345699;
231CHECKREG r5, 0x45678B6B;
232CHECKREG r6, 0x45675699;
233CHECKREG r7, 0x12345699;
234
235imm32 r0, 0x876789ab;
236imm32 r1, 0x6779abcd;
237imm32 r2, 0x2345d755;
238imm32 r3, 0x5678b007;
239imm32 r4, 0x789ab799;
240imm32 r5, 0xaaaa0bbb;
241imm32 r6, 0x89ab1d7d;
242imm32 r7, 0xabcd2ff7;
243R3 = MAX ( R4 , R0 ) (V);
244R5 = MAX ( R5 , R1 ) (V);
245R2 = MAX ( R2 , R2 ) (V);
246R7 = MAX ( R7 , R3 ) (V);
247R4 = MAX ( R3 , R4 ) (V);
248R0 = MAX ( R1 , R5 ) (V);
249R1 = MAX ( R0 , R6 ) (V);
250R6 = MAX ( R6 , R7 ) (V);
251CHECKREG r0, 0x67790BBB;
252CHECKREG r1, 0x67791D7D;
253CHECKREG r2, 0x2345D755;
254CHECKREG r3, 0x789AB799;
255CHECKREG r4, 0x789AB799;
256CHECKREG r5, 0x67790BBB;
257CHECKREG r6, 0x789A2FF7;
258CHECKREG r7, 0x789A2FF7;
259
260
261pass
262