1//Original:/testcases/core/c_dsp32alu_rlh_rnd/c_dsp32alu_rlh_rnd.dsp 2// Spec Reference: dsp32alu dreg_lo(hi) = rnd dregs 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 9 10 11imm32 r0, 0x4537891b; 12imm32 r1, 0x6759ab2d; 13imm32 r2, 0x44555535; 14imm32 r3, 0x66665747; 15imm32 r4, 0x88789565; 16imm32 r5, 0xaa8abb5b; 17imm32 r6, 0xcc9cdd85; 18imm32 r7, 0xeeaeff9f; 19R0.L = R1 (RND); 20R0.H = R2 (RND); 21R1.L = R3 (RND); 22R1.H = R4 (RND); 23R2.L = R5 (RND); 24R2.H = R6 (RND); 25CHECKREG r0, 0x4455675A; 26CHECKREG r1, 0x88796666; 27CHECKREG r2, 0xCC9DAA8B; 28 29 30imm32 r0, 0xe537891b; 31imm32 r1, 0xf759ab2d; 32imm32 r2, 0x4ef55535; 33imm32 r3, 0x666b5747; 34imm32 r4, 0xc8789565; 35imm32 r5, 0xaa8abb5b; 36imm32 r6, 0x8c9cdd85; 37imm32 r7, 0x9eaeff9f; 38R3.L = R0 (RND); 39R3.H = R1 (RND); 40R4.L = R2 (RND); 41R4.H = R5 (RND); 42R5.L = R6 (RND); 43R5.H = R7 (RND); 44CHECKREG r3, 0xF75AE538; 45CHECKREG r4, 0xAA8B4EF5; 46CHECKREG r5, 0x9EAF8C9D; 47 48imm32 r0, 0x5537891b; 49imm32 r1, 0x6759ab2d; 50imm32 r2, 0x8ef55535; 51imm32 r3, 0x666b5747; 52imm32 r4, 0xc8789565; 53imm32 r5, 0xea8abb5b; 54imm32 r6, 0xfc9cdd85; 55imm32 r7, 0x9eaeff9f; 56R6.L = R0 (RND); 57R6.H = R1 (RND); 58R7.L = R2 (RND); 59R7.H = R3 (RND); 60R5.L = R4 (RND); 61R5.H = R5 (RND); 62CHECKREG r5, 0xEA8BC879; 63CHECKREG r6, 0x675A5538; 64CHECKREG r7, 0x666B8EF5; 65 66pass 67