1//Original:/testcases/core/c_dsp32mac_dr_a1_ih/c_dsp32mac_dr_a1_ih.dsp 2// Spec Reference: dsp32mac dr_a1 ih (int multiplication with word extraction) 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 9 10 11A1 = A0 = 0; 12 13// The result accumulated in A1 , and stored to a reg half 14imm32 r0, 0x93545abd; 15imm32 r1, 0x1dbcfec7; 16imm32 r2, 0x52248679; 17imm32 r3, 0xd6069007; 18imm32 r4, 0xef7c4569; 19imm32 r5, 0xcd38500b; 20imm32 r6, 0xe00c900d; 21imm32 r7, 0xf78e990f; 22R0.H = ( A1 = R1.L * R0.L ), A0 -= R1.L * R0.L (IH); 23R1 = A1.w; 24R2.H = ( A1 += R2.L * R3.H ), A0 -= R2.H * R3.L (IH); 25R3 = A1.w; 26R4.H = ( A1 -= R4.H * R5.L ), A0 += R4.H * R5.H (IH); 27R5 = A1.w; 28R6.H = ( A1 = R6.H * R7.H ), A0 = R6.L * R7.H (IH); 29R7 = A1.w; 30CHECKREG r0, 0xFF915ABD; 31CHECKREG r1, 0xFF910EEB; 32CHECKREG r2, 0x137E8679; 33CHECKREG r3, 0x137E5BC1; 34CHECKREG r4, 0x18A84569; 35CHECKREG r5, 0x18A8516D; 36CHECKREG r6, 0x010E900D; 37CHECKREG r7, 0x010DDAA8; 38 39// The result accumulated in A1, and stored to a reg half (MNOP) 40imm32 r0, 0x83548abd; 41imm32 r1, 0x76bcfec7; 42imm32 r2, 0xa1745679; 43imm32 r3, 0xb0269007; 44imm32 r4, 0xcfb34569; 45imm32 r5, 0xd235600b; 46imm32 r6, 0xe00ca70d; 47imm32 r7, 0x678e708f; 48R0.H = ( A1 -= R1.L * R0.L ) (IH); 49R1 = A1.w; 50R2.H = ( A1 += R2.L * R3.H ) (IH); 51R3 = A1.w; 52R4.H = ( A1 = R4.H * R5.L ) (IH); 53R5 = A1.w; 54R6.H = ( A1 -= R6.H * R7.H ) (IH); 55R7 = A1.w; 56CHECKREG r0, 0x007E8ABD; 57CHECKREG r1, 0x007E7BBD; 58CHECKREG r2, 0xE5865679; 59CHECKREG r3, 0xE58581B3; 60CHECKREG r4, 0xEDE14569; 61CHECKREG r5, 0xEDE10CB1; 62CHECKREG r6, 0xFACEA70D; 63CHECKREG r7, 0xFACDF209; 64 65// The result accumulated in A1 , and stored to a reg half (MNOP) 66imm32 r0, 0x5354babd; 67imm32 r1, 0x9dbcdec7; 68imm32 r2, 0x7724e679; 69imm32 r3, 0x80567007; 70imm32 r4, 0x9fb34569; 71imm32 r5, 0xa235200b; 72imm32 r6, 0xb00c100d; 73imm32 r7, 0x9876a10f; 74 R0.H = A1 , A0 = R1.L * R0.L (IH); 75R1 = A1.w; 76 R2.H = A1 , A0 += R2.H * R3.L (IH); 77R3 = A1.w; 78 R4.H = A1 , A0 -= R4.H * R5.H (IH); 79R5 = A1.w; 80 R6.H = A1 , A0 += R6.L * R7.H (IH); 81R7 = A1.w; 82CHECKREG r0, 0xFACEBABD; 83CHECKREG r1, 0xFACDF209; 84CHECKREG r2, 0xFACEE679; 85CHECKREG r3, 0xFACDF209; 86CHECKREG r4, 0xFACE4569; 87CHECKREG r5, 0xFACDF209; 88CHECKREG r6, 0xFACE100D; 89CHECKREG r7, 0xFACDF209; 90 91// The result accumulated in A1 , and stored to a reg half 92imm32 r0, 0x33545abd; 93imm32 r1, 0x9dbcfec7; 94imm32 r2, 0x81245679; 95imm32 r3, 0x97060007; 96imm32 r4, 0xaf6c4569; 97imm32 r5, 0xd235900b; 98imm32 r6, 0xc00c400d; 99imm32 r7, 0x678ed30f; 100R0.H = ( A1 = R1.L * R0.L ) (M), A0 -= R1.L * R0.L (IH); 101R1 = A1.w; 102R2.H = ( A1 += R2.L * R3.H ) (M), A0 += R2.H * R3.L (IH); 103R3 = A1.w; 104R4.H = ( A1 = R4.H * R5.L ) (M), A0 += R4.H * R5.H (IH); 105R5 = A1.w; 106R6.H = ( A1 = R6.H * R7.H ) (M), A0 -= R6.L * R7.H (IH); 107R7 = A1.w; 108CHECKREG r0, 0xFF915ABD; 109CHECKREG r1, 0xFF910EEB; 110CHECKREG r2, 0x32945679; 111CHECKREG r3, 0x329474C1; 112CHECKREG r4, 0xD2A94569; 113CHECKREG r5, 0xD2A949A4; 114CHECKREG r6, 0xE621400D; 115CHECKREG r7, 0xE6215AA8; 116 117// The result accumulated in A1 MM=0, and stored to a reg half (MNOP) 118imm32 r0, 0x92005ABD; 119imm32 r1, 0x09300000; 120imm32 r2, 0x56749679; 121imm32 r3, 0x30A95000; 122imm32 r4, 0xa0009669; 123imm32 r5, 0x01000970; 124imm32 r6, 0xdf45609D; 125imm32 r7, 0x12345679; 126R0.H = ( A1 -= R1.L * R0.L ) (M,IH); 127R1 = A1.w; 128R2.H = ( A1 += R2.L * R3.H ) (M,IH); 129R3 = A1.w; 130R4.H = ( A1 = R4.H * R5.L ) (M,IH); 131R5 = A1.w; 132R6.H = ( A1 += R6.H * R7.H ) (M,IH); 133R7 = A1.w; 134CHECKREG r0, 0xE6215ABD; 135CHECKREG r1, 0xE6215AA8; 136CHECKREG r2, 0xD2129679; 137CHECKREG r3, 0xD2126089; 138CHECKREG r4, 0xFC769669; 139CHECKREG r5, 0xFC760000; 140CHECKREG r6, 0xFA22609D; 141CHECKREG r7, 0xFA223404; 142 143 144 145pass 146