1//Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a0/c_dsp32mac_pair_a0.dsp 2// Spec Reference: dsp32mac pair a0 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 A1 = A0 = 0; 9 10// The result accumulated in A , and stored to a reg half 11 imm32 r0, 0x63545abd; 12 imm32 r1, 0x86bcfec7; 13 imm32 r2, 0xa8645679; 14 imm32 r3, 0x00860007; 15 imm32 r4, 0xefb86569; 16 imm32 r5, 0x1235860b; 17 imm32 r6, 0x000c086d; 18 imm32 r7, 0x678e0086; 19 A1 += R1.L * R0.L, R6 = ( A0 = R1.L * R0.L ); 20 P1 = A1.w; 21 P5 = A0.w; 22 A1 = R2.L * R3.L, R0 = ( A0 = R2.H * R3.L ); 23 P2 = A1.w; 24 A1 -= R7.L * R4.L, R2 = ( A0 += R7.H * R4.H ); 25 P3 = A0.w; 26 A1 += R6.L * R5.L, R4 = ( A0 += R6.L * R5.H ); 27 P4 = A0.w; 28 CHECKREG r0, 0xFFFB3578; 29 CHECKREG r1, 0x86BCFEC7; 30 CHECKREG r2, 0xF2CF3598; 31 CHECKREG r3, 0x00860007; 32 CHECKREG r4, 0xF70DA834; 33 CHECKREG r5, 0x1235860B; 34 CHECKREG r6, 0xFF221DD6; 35 CHECKREG r7, 0x678E0086; 36 CHECKREG p1, 0xFF221DD6; 37 CHECKREG p2, 0x0004BA9E; 38 CHECKREG p3, 0xF2CF3598; 39 CHECKREG p4, 0xF70DA834; 40 CHECKREG p5, 0xFF221DD6; 41 42 imm32 r0, 0x98764abd; 43 imm32 r1, 0xa1bcf4c7; 44 imm32 r2, 0xa1145649; 45 imm32 r3, 0x00010005; 46 imm32 r4, 0xefbc1569; 47 imm32 r5, 0x1235010b; 48 imm32 r6, 0x000c001d; 49 imm32 r7, 0x678e0001; 50 A1 += R1.L * R0.H, R4 = ( A0 -= R1.L * R0.L ); 51 P1 = A0.w; 52 A1 = R2.L * R3.H, R0 = ( A0 = R2.H * R3.L ); 53 P2 = A0.w; 54 A1 -= R4.L * R5.H, R2 = ( A0 += R4.H * R5.H ); 55 P3 = A0.w; 56 A1 += R6.L * R7.H, R0 = ( A0 += R6.L * R7.H ); 57 P4 = A0.w; 58 CHECKREG r0, 0xFFBC8F22; 59 CHECKREG r1, 0xA1BCF4C7; 60 CHECKREG r2, 0xFFA518F6; 61 CHECKREG r3, 0x00010005; 62 CHECKREG r4, 0xFD9B2E5E; 63 CHECKREG r5, 0x1235010B; 64 CHECKREG r6, 0x000C001D; 65 CHECKREG r7, 0x678E0001; 66 CHECKREG p1, 0xFD9B2E5E; 67 CHECKREG p2, 0xFFFC4AC8; 68 CHECKREG p3, 0xFFA518F6; 69 CHECKREG p4, 0xFFBC8F22; 70 71 imm32 r0, 0x7136459d; 72 imm32 r1, 0xabd69ec7; 73 imm32 r2, 0x71145679; 74 imm32 r3, 0x08010007; 75 imm32 r4, 0xef9c1569; 76 imm32 r5, 0x1225010b; 77 imm32 r6, 0x0003401d; 78 imm32 r7, 0x678e0561; 79 A1 += R1.H * R0.L, R4 = ( A0 = R1.L * R0.L ); 80 P1 = A0.w; 81 A1 = R2.H * R3.L, R6 = ( A0 = R2.H * R3.L ); 82 P2 = A0.w; 83 A1 -= R4.H * R5.L, R0 = ( A0 += R4.H * R5.H ); 84 P3 = A0.w; 85 A1 += R6.H * R7.L, R4 = ( A0 += R6.L * R7.H ); 86 P4 = A0.w; 87 CHECKREG r0, 0xF8876658; 88 CHECKREG r1, 0xABD69EC7; 89 CHECKREG r2, 0x71145679; 90 CHECKREG r3, 0x08010007; 91 CHECKREG r4, 0x1EA0F4F8; 92 CHECKREG r5, 0x1225010B; 93 CHECKREG r6, 0x00062F18; 94 CHECKREG r7, 0x678E0561; 95 CHECKREG p1, 0xCB200616; 96 CHECKREG p2, 0x00062F18; 97 CHECKREG p3, 0xF8876658; 98 CHECKREG p4, 0x1EA0F4F8; 99 100 imm32 r0, 0x123489bd; 101 imm32 r1, 0x91bcfec7; 102 imm32 r2, 0xa9145679; 103 imm32 r3, 0xd0910007; 104 imm32 r4, 0xedb91569; 105 imm32 r5, 0xd235910b; 106 imm32 r6, 0x0d0c0999; 107 imm32 r7, 0x67de0009; 108 A1 += R5.H * R3.H, R0 = ( A0 = R5.L * R3.L ); 109 P1 = A0.w; 110 A1 -= R2.H * R1.H, R2 = ( A0 -= R2.H * R1.L ); 111 P2 = A0.w; 112 A1 = R7.H * R0.H, R4 = ( A0 += R7.H * R0.H ); 113 P3 = A0.w; 114 A1 += R4.H * R6.H, R6 = ( A0 += R4.L * R6.H ); 115 P4 = A0.w; 116 CHECKREG r0, 0xFFF9EE9A; 117 CHECKREG r1, 0x91BCFEC7; 118 CHECKREG r2, 0xFF256182; 119 CHECKREG r3, 0xD0910007; 120 CHECKREG r4, 0xFF1FB35E; 121 CHECKREG r5, 0xD235910B; 122 CHECKREG r6, 0xF750102E; 123 CHECKREG r7, 0x67DE0009; 124 CHECKREG p1, 0xFFF9EE9A; 125 CHECKREG p2, 0xFF256182; 126 CHECKREG p3, 0xFF1FB35E; 127 CHECKREG p4, 0xF750102E; 128 129 pass 130