1//Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1/c_dsp32mac_pair_a1.dsp 2// Spec Reference: dsp32mac pair a1 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 A1 = A0 = 0; 9 10// The result accumulated in A1 , and stored to a reg half 11 imm32 r0, 0x63545abd; 12 imm32 r1, 0x86bcfec7; 13 imm32 r2, 0xa8645679; 14 imm32 r3, 0x00860007; 15 imm32 r4, 0xefb86569; 16 imm32 r5, 0x1235860b; 17 imm32 r6, 0x000c086d; 18 imm32 r7, 0x678e0086; 19 R7 = ( A1 += R1.L * R0.L ), A0 = R1.L * R0.L; 20 P1 = A1.w; 21 R1 = ( A1 = R2.L * R3.L ), A0 += R2.H * R3.L; 22 P2 = A1.w; 23 R3 = ( A1 -= R7.L * R4.L ), A0 += R7.H * R4.H; 24 P3 = A1.w; 25 R5 = ( A1 -= R6.L * R5.L ), A0 -= R6.L * R5.H; 26 P4 = A1.w; 27 CHECKREG r0, 0x63545ABD; 28 CHECKREG r1, 0x0004BA9E; 29 CHECKREG r2, 0xA8645679; 30 CHECKREG r3, 0xE8616512; 31 CHECKREG r4, 0xEFB86569; 32 CHECKREG r5, 0xF0688FB4; 33 CHECKREG r6, 0x000C086D; 34 CHECKREG r7, 0xFF221DD6; 35 CHECKREG p1, 0xFF221DD6; 36 CHECKREG p2, 0x0004BA9E; 37 CHECKREG p3, 0xE8616512; 38 CHECKREG p4, 0xF0688FB4; 39 40 imm32 r0, 0x98764abd; 41 imm32 r1, 0xa1bcf4c7; 42 imm32 r2, 0xa1145649; 43 imm32 r3, 0x00010005; 44 imm32 r4, 0xefbc1569; 45 imm32 r5, 0x1235010b; 46 imm32 r6, 0x000c001d; 47 imm32 r7, 0x678e0001; 48 R5 = ( A1 += R1.L * R0.H ), A0 -= R1.L * R0.L; 49 P1 = A1.w; 50 R1 = ( A1 = R2.L * R3.H ), A0 -= R2.H * R3.L; 51 P2 = A1.w; 52 R3 = ( A1 -= R4.L * R5.H ), A0 += R4.H * R5.H; 53 P3 = A1.w; 54 R1 = ( A1 += R6.L * R7.H ), A0 += R6.L * R7.H; 55 P4 = A1.w; 56 CHECKREG r0, 0x98764ABD; 57 CHECKREG r1, 0x012F2306; 58 CHECKREG r2, 0xA1145649; 59 CHECKREG r3, 0x0117ACDA; 60 CHECKREG r4, 0xEFBC1569; 61 CHECKREG r5, 0xF97C8728; 62 CHECKREG r6, 0x000C001D; 63 CHECKREG r7, 0x678E0001; 64 CHECKREG p1, 0xF97C8728; 65 CHECKREG p2, 0x0000AC92; 66 CHECKREG p3, 0x0117ACDA; 67 CHECKREG p4, 0x012F2306; 68 69 imm32 r0, 0x7136459d; 70 imm32 r1, 0xabd69ec7; 71 imm32 r2, 0x71145679; 72 imm32 r3, 0x08010007; 73 imm32 r4, 0xef9c1569; 74 imm32 r5, 0x1225010b; 75 imm32 r6, 0x0003401d; 76 imm32 r7, 0x678e0561; 77 R5 = ( A1 += R1.H * R0.L ), A0 = R1.L * R0.L; 78 P1 = A1.w; 79 R7 = ( A1 -= R2.H * R3.L ), A0 -= R2.H * R3.L; 80 P2 = A1.w; 81 R1 = ( A1 += R4.H * R5.L ), A0 -= R4.H * R5.H; 82 P3 = A1.w; 83 R5 = ( A1 += R6.H * R7.L ), A0 += R6.L * R7.H; 84 P4 = A1.w; 85 CHECKREG r0, 0x7136459D; 86 CHECKREG r1, 0xCABE16DA; 87 CHECKREG r2, 0x71145679; 88 CHECKREG r3, 0x08010007; 89 CHECKREG r4, 0xEF9C1569; 90 CHECKREG r5, 0xCABE9156; 91 CHECKREG r6, 0x0003401D; 92 CHECKREG r7, 0xD363146A; 93 CHECKREG p1, 0xD3694382; 94 CHECKREG p2, 0xD363146A; 95 CHECKREG p3, 0xCABE16DA; 96 CHECKREG p4, 0xCABE9156; 97 98 imm32 r0, 0x123489bd; 99 imm32 r1, 0x91bcfec7; 100 imm32 r2, 0xa9145679; 101 imm32 r3, 0xd0910007; 102 imm32 r4, 0xedb91569; 103 imm32 r5, 0xd235910b; 104 imm32 r6, 0x0d0c0999; 105 imm32 r7, 0x67de0009; 106 R1 = ( A1 += R5.H * R3.H ), A0 = R5.L * R3.L; 107 P1 = A1.w; 108 R3 = ( A1 = R2.H * R1.H ), A0 -= R2.H * R1.L; 109 P2 = A1.w; 110 R5 = ( A1 -= R7.H * R0.H ), A0 += R7.H * R0.H; 111 P3 = A1.w; 112 R7 = ( A1 += R4.H * R6.H ), A0 += R4.L * R6.H; 113 P4 = A1.w; 114 CHECKREG r0, 0x123489BD; 115 CHECKREG r1, 0xDBB6D160; 116 CHECKREG r2, 0xA9145679; 117 CHECKREG r3, 0x18A4A070; 118 CHECKREG r4, 0xEDB91569; 119 CHECKREG r5, 0x09DF3640; 120 CHECKREG r6, 0x0D0C0999; 121 CHECKREG r7, 0x08024998; 122 CHECKREG p1, 0xDBB6D160; 123 CHECKREG p2, 0x18A4A070; 124 CHECKREG p3, 0x09DF3640; 125 CHECKREG p4, 0x08024998; 126 127 pass 128