1//Original:/proj/frio/dv/testcases/core/c_dsp32mac_pair_a1_i/c_dsp32mac_pair_a1_i.dsp 2// Spec Reference: dsp32mac pair a1 I 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8 A1 = A0 = 0; 9 10// The result accumulated in A1 , and stored to a reg half 11 imm32 r0, 0x93545abd; 12 imm32 r1, 0x89bcfec7; 13 imm32 r2, 0xa8945679; 14 imm32 r3, 0x00890007; 15 imm32 r4, 0xefb89569; 16 imm32 r5, 0x1235890b; 17 imm32 r6, 0x000c089d; 18 imm32 r7, 0x678e0089; 19 R7 = ( A1 += R1.L * R0.L ), A0 = R1.L * R0.L (IS); 20 P1 = A1.w; 21 R1 = ( A1 = R2.L * R3.L ), A0 -= R2.H * R3.L (IS); 22 P2 = A1.w; 23 R3 = ( A1 = R7.L * R4.L ), A0 += R7.H * R4.H (IS); 24 P3 = A1.w; 25 R5 = ( A1 += R6.L * R5.L ), A0 += R6.L * R5.H (IS); 26 P4 = A1.w; 27 CHECKREG r0, 0x93545ABD; 28 CHECKREG r1, 0x00025D4F; 29 CHECKREG r2, 0xA8945679; 30 CHECKREG r3, 0xF9C9E563; 31 CHECKREG r4, 0xEFB89569; 32 CHECKREG r5, 0xF5C94922; 33 CHECKREG r6, 0x000C089D; 34 CHECKREG r7, 0xFF910EEB; 35 CHECKREG p1, 0xFF910EEB; 36 CHECKREG p2, 0x00025D4F; 37 CHECKREG p3, 0xF9C9E563; 38 CHECKREG p4, 0xF5C94922; 39 40 imm32 r0, 0x98464abd; 41 imm32 r1, 0xa1b5f4c7; 42 imm32 r2, 0xa1146649; 43 imm32 r3, 0x00010805; 44 imm32 r4, 0xefbc1599; 45 imm32 r5, 0x12350100; 46 imm32 r6, 0x200c001d; 47 imm32 r7, 0x628e0001; 48 R5 = ( A1 += R1.L * R0.H ), A0 = R1.L * R0.L (IS); 49 P1 = A1.w; 50 R1 = ( A1 = R2.L * R3.H ), A0 = R2.H * R3.L (IS); 51 P2 = A1.w; 52 R3 = ( A1 = R4.L * R5.H ), A0 -= R4.H * R5.H (IS); 53 P3 = A1.w; 54 R1 = ( A1 += R6.L * R7.H ), A0 += R6.L * R7.H (IS); 55 P4 = A1.w; 56 CHECKREG r0, 0x98464ABD; 57 CHECKREG r1, 0xFF90BFE3; 58 CHECKREG r2, 0xA1146649; 59 CHECKREG r3, 0xFF8595CD; 60 CHECKREG r4, 0xEFBC1599; 61 CHECKREG r5, 0xFA555F8C; 62 CHECKREG r6, 0x200C001D; 63 CHECKREG r7, 0x628E0001; 64 CHECKREG p1, 0xFA555F8C; 65 CHECKREG p2, 0x00006649; 66 CHECKREG p3, 0xFF8595CD; 67 CHECKREG p4, 0xFF90BFE3; 68 69 imm32 r0, 0x713a459d; 70 imm32 r1, 0xabd6aec7; 71 imm32 r2, 0x7a145a79; 72 imm32 r3, 0x08a100a7; 73 imm32 r4, 0xef9a156a; 74 imm32 r5, 0x1225a10b; 75 imm32 r6, 0x0003401d; 76 imm32 r7, 0x678e0a61; 77 R5 = ( A1 += R1.H * R0.L ), A0 -= R1.L * R0.L (IS); 78 P1 = A1.w; 79 R7 = ( A1 -= R2.H * R3.L ), A0 = R2.H * R3.L (IS); 80 P2 = A1.w; 81 R1 = ( A1 -= R4.H * R5.L ), A0 += R4.H * R5.H (IS); 82 P3 = A1.w; 83 R5 = ( A1 += R6.H * R7.L ), A0 += R6.L * R7.H (IS); 84 P4 = A1.w; 85 CHECKREG r0, 0x713A459D; 86 CHECKREG r1, 0xE54D2A3B; 87 CHECKREG r2, 0x7A145A79; 88 CHECKREG r3, 0x08A100A7; 89 CHECKREG r4, 0xEF9A156A; 90 CHECKREG r5, 0xE54DB17A; 91 CHECKREG r6, 0x0003401D; 92 CHECKREG r7, 0xE85E2D15; 93 CHECKREG p1, 0xE8ADD021; 94 CHECKREG p2, 0xE85E2D15; 95 CHECKREG p3, 0xE54D2A3B; 96 CHECKREG p4, 0xE54DB17A; 97 98 imm32 r0, 0x773489bd; 99 imm32 r1, 0x917cfec7; 100 imm32 r2, 0xa9177679; 101 imm32 r3, 0xd0910777; 102 imm32 r4, 0xedb91579; 103 imm32 r5, 0xd235910b; 104 imm32 r6, 0x0d077999; 105 imm32 r7, 0x677e0709; 106 R1 = ( A1 += R5.H * R3.H ), A0 = R5.L * R3.L (IS); 107 P1 = A1.w; 108 R3 = ( A1 -= R2.H * R1.H ), A0 = R2.H * R1.L (IS); 109 P2 = A1.w; 110 R5 = ( A1 -= R7.H * R0.H ), A0 += R7.H * R0.H (IS); 111 P3 = A1.w; 112 R7 = ( A1 += R4.H * R6.H ), A0 -= R4.L * R6.H (IS); 113 P4 = A1.w; 114 CHECKREG r0, 0x773489BD; 115 CHECKREG r1, 0xEDC9D17F; 116 CHECKREG r2, 0xA9177679; 117 CHECKREG r3, 0xE79AC370; 118 CHECKREG r4, 0xEDB91579; 119 CHECKREG r5, 0xB76A2BD8; 120 CHECKREG r6, 0x0D077999; 121 CHECKREG r7, 0xB67C10E7; 122 CHECKREG p1, 0xEDC9D17F; 123 CHECKREG p2, 0xE79AC370; 124 CHECKREG p3, 0xB76A2BD8; 125 CHECKREG p4, 0xB67C10E7; 126 127 imm32 r0, 0x83547abd; 128 imm32 r1, 0x88bc8ec7; 129 imm32 r2, 0xa8895679; 130 imm32 r3, 0x00080007; 131 imm32 r4, 0xe6b86569; 132 imm32 r5, 0x1A35860b; 133 imm32 r6, 0x000c896d; 134 imm32 r7, 0x67Be0096; 135 R7 = ( A1 += R1.L * R0.L ) (IS); 136 P1 = A1.w; 137 R1 = ( A1 = R2.H * R3.L ) (IS); 138 P2 = A1.w; 139 R3 = ( A1 = R7.L * R4.H ) (IS); 140 P3 = A1.w; 141 R5 = ( A1 += R6.H * R5.H ) (IS); 142 P4 = A1.w; 143 CHECKREG r0, 0x83547ABD; 144 CHECKREG r1, 0xFFFD9BBF; 145 CHECKREG r2, 0xA8895679; 146 CHECKREG r3, 0xF81E0AF0; 147 CHECKREG r4, 0xE6B86569; 148 CHECKREG r5, 0xF81F456C; 149 CHECKREG r6, 0x000C896D; 150 CHECKREG r7, 0x80334FD2; 151 CHECKREG p1, 0x80334FD2; 152 CHECKREG p2, 0xFFFD9BBF; 153 CHECKREG p3, 0xF81E0AF0; 154 CHECKREG p4, 0xF81F456C; 155 156 imm32 r0, 0x9aa64abd; 157 imm32 r1, 0xa1baf4c7; 158 imm32 r2, 0xb114a649; 159 imm32 r3, 0x0b010005; 160 imm32 r4, 0xefbcdb69; 161 imm32 r5, 0x123501bb; 162 imm32 r6, 0x000c0d1b; 163 imm32 r7, 0x678e0d01; 164 R5 = ( A1 += R1.L * R0.H ) (M), A0 = R1.L * R0.L (IS); 165 P1 = A1.w; 166 R1 = ( A1 = R2.L * R3.H ) (M), A0 -= R2.H * R3.L (IS); 167 P2 = A1.w; 168 R3 = ( A1 -= R4.L * R5.H ) (M), A0 += R4.H * R5.H (IS); 169 P3 = A1.w; 170 R1 = ( A1 += R6.L * R7.H ) (M), A0 += R6.L * R7.H (IS); 171 P4 = A1.w; 172 CHECKREG r0, 0x9AA64ABD; 173 CHECKREG r1, 0x23F08194; 174 CHECKREG r2, 0xB114A649; 175 CHECKREG r3, 0x1EA35F9A; 176 CHECKREG r4, 0xEFBCDB69; 177 CHECKREG r5, 0xF157B476; 178 CHECKREG r6, 0x000C0D1B; 179 CHECKREG r7, 0x678E0D01; 180 CHECKREG p1, 0xF157B476; 181 CHECKREG p2, 0xFC24C949; 182 CHECKREG p3, 0x1EA35F9A; 183 CHECKREG p4, 0x23F08194; 184 185 imm32 r0, 0xd136459d; 186 imm32 r1, 0xabd69ec7; 187 imm32 r2, 0x71145679; 188 imm32 r3, 0xdd010007; 189 imm32 r4, 0xeddc1569; 190 imm32 r5, 0x122d010b; 191 imm32 r6, 0x00e3d01d; 192 imm32 r7, 0x678e0d61; 193 R5 = A1 , A0 -= R1.L * R0.L (IS); 194 P1 = A1.w; 195 R7 = A1 , A0 = R2.H * R3.L (IS); 196 P2 = A1.w; 197 R1 = A1 , A0 += R4.H * R5.H (IS); 198 P3 = A1.w; 199 R5 = A1 , A0 += R6.L * R7.H (IS); 200 P4 = A1.w; 201 CHECKREG r0, 0xD136459D; 202 CHECKREG r1, 0x23F08194; 203 CHECKREG r2, 0x71145679; 204 CHECKREG r3, 0xDD010007; 205 CHECKREG r4, 0xEDDC1569; 206 CHECKREG r5, 0x23F08194; 207 CHECKREG r6, 0x00E3D01D; 208 CHECKREG r7, 0x23F08194; 209 CHECKREG p1, 0x23F08194; 210 CHECKREG p2, 0x23F08194; 211 CHECKREG p3, 0x23F08194; 212 CHECKREG p4, 0x23F08194; 213 214 imm32 r0, 0x125489bd; 215 imm32 r1, 0x91b5fec7; 216 imm32 r2, 0xa9145679; 217 imm32 r3, 0xd0910507; 218 imm32 r4, 0x34567859; 219 imm32 r5, 0xd2359105; 220 imm32 r6, 0x0d0c0999; 221 imm32 r7, 0x67de0009; 222 R1 = ( A1 += R5.H * R3.H ) (M,IS); 223 P1 = A1.w; 224 R3 = ( A1 = R2.H * R1.H ) (M,IS); 225 P2 = A1.w; 226 R5 = ( A1 -= R7.H * R0.H ) (M,IS); 227 P3 = A1.w; 228 R7 = ( A1 += R4.H * R6.H ) (M,IS); 229 P4 = A1.w; 230 CHECKREG r0, 0x125489BD; 231 CHECKREG r1, 0xFEA1A199; 232 CHECKREG r2, 0xA9145679; 233 CHECKREG r3, 0xA98B2D94; 234 CHECKREG r4, 0x34567859; 235 CHECKREG r5, 0xA21B7CBC; 236 CHECKREG r6, 0x0D0C0999; 237 CHECKREG r7, 0xA4C64EC4; 238 CHECKREG p1, 0xFEA1A199; 239 CHECKREG p2, 0xA98B2D94; 240 CHECKREG p3, 0xA21B7CBC; 241 CHECKREG p4, 0xA4C64EC4; 242 243 pass 244