1//Original:/testcases/core/c_dsp32shiftim_lhalf_ln/c_dsp32shiftim_lhalf_ln.dsp
2// Spec Reference: dspshiftimm dreg_lo(hi) = lshift (dreg_lo(hi) by imm5)
3# mach: bfin
4
5.include "testutils.inc"
6	start
7
8
9
10// lshift : neg data, count (+)=left (half reg)
11// d_lo = lshift (d_lo BY d_lo)
12// RLx by RLx
13imm32 r0, 0x00000000;
14imm32 r1, 0x0000c001;
15imm32 r2, 0x0000c002;
16imm32 r3, 0x0000c003;
17imm32 r4, 0x0000c004;
18imm32 r5, 0x0000c005;
19imm32 r6, 0x0000c006;
20imm32 r7, 0x0000c007;
21R0.L = R0.L << 1;
22R1.L = R1.L << 0;
23R2.L = R2.L << 0;
24R3.L = R3.L << 0;
25R4.L = R4.L << 0;
26R5.L = R5.L << 0;
27R6.L = R6.L << 0;
28R7.L = R7.L << 0;
29CHECKREG r0, 0x00000000;
30CHECKREG r1, 0x0000C001;
31CHECKREG r2, 0x0000C002;
32CHECKREG r3, 0x0000C003;
33CHECKREG r4, 0x0000C004;
34CHECKREG r5, 0x0000C005;
35CHECKREG r6, 0x0000C006;
36CHECKREG r7, 0x0000C007;
37
38imm32 r0, 0x00008001;
39imm32 r1, 0x00000001;
40imm32 r2, 0x0000d002;
41imm32 r3, 0x0000e003;
42imm32 r4, 0x0000f004;
43imm32 r5, 0x0000c005;
44imm32 r6, 0x0000d006;
45imm32 r7, 0x0000e007;
46R1.L = R0.L << 1;
47R2.L = R1.L << 2;
48R3.L = R2.L << 3;
49R4.L = R3.L << 4;
50R5.L = R4.L << 5;
51R6.L = R5.L << 6;
52R7.L = R6.L << 7;
53R0.L = R7.L << 8;
54imm32 r1, 0x2000d001;
55imm32 r2, 0x2000000f;
56imm32 r3, 0x2000e003;
57imm32 r4, 0x2000f004;
58imm32 r5, 0x2200f005;
59imm32 r6, 0x2000f006;
60imm32 r7, 0x2000f007;
61imm32 r0, 0x2000c001;
62
63R2.L = R0.L << 10;
64R3.L = R1.L << 12;
65R4.L = R2.L << 13;
66R5.L = R3.L << 14;
67R6.L = R4.L << 15;
68R7.L = R5.L << 15;
69R0.L = R6.L << 2;
70R1.L = R7.L << 3;
71CHECKREG r0, 0x20000000;
72CHECKREG r1, 0x20000000;
73CHECKREG r2, 0x20000400;
74CHECKREG r3, 0x20001000;
75CHECKREG r4, 0x20000000;
76CHECKREG r5, 0x22000000;
77CHECKREG r6, 0x20000000;
78CHECKREG r7, 0x20000000;
79
80imm32 r0, 0x30009001;
81imm32 r1, 0x3000a001;
82imm32 r2, 0x3000b002;
83imm32 r3, 0x30000010;
84imm32 r4, 0x3000c004;
85imm32 r5, 0x3000d005;
86imm32 r6, 0x3000e006;
87imm32 r7, 0x3000f007;
88R3.L = R0.L << 12;
89R4.L = R1.L << 13;
90R5.L = R2.L << 14;
91R6.L = R3.L << 15;
92R7.L = R4.L << 11;
93R0.L = R5.L << 12;
94R1.L = R6.L << 13;
95R2.L = R7.L << 15;
96CHECKREG r0, 0x30000000;
97CHECKREG r1, 0x30000000;
98CHECKREG r2, 0x30000000;
99CHECKREG r3, 0x30001000;
100CHECKREG r4, 0x30002000;
101CHECKREG r5, 0x30008000;
102CHECKREG r6, 0x30000000;
103CHECKREG r7, 0x30000000;
104// RHx by RLx
105imm32 r0, 0x00000040;
106imm32 r1, 0x00010040;
107imm32 r2, 0x00020040;
108imm32 r3, 0x00030040;
109imm32 r4, 0x00040040;
110imm32 r5, 0x00050040;
111imm32 r6, 0x00060040;
112imm32 r7, 0x00070040;
113R0.L = R0.H << 0;
114R1.L = R1.H << 1;
115R2.L = R2.H << 2;
116R3.L = R3.H << 3;
117R4.L = R4.H << 4;
118R5.L = R5.H << 5;
119R6.L = R6.H << 6;
120R7.L = R7.H << 7;
121CHECKREG r0, 0x00000000;
122CHECKREG r1, 0x00010002;
123CHECKREG r2, 0x00020008;
124CHECKREG r3, 0x00030018;
125CHECKREG r4, 0x00040040;
126CHECKREG r5, 0x000500A0;
127CHECKREG r6, 0x00060180;
128CHECKREG r7, 0x00070380;
129
130imm32 r0, 0x90010000;
131imm32 r1, 0x00010001;
132imm32 r2, 0x90020000;
133imm32 r3, 0x90030000;
134imm32 r4, 0x90040000;
135imm32 r5, 0x90050000;
136imm32 r6, 0x90060000;
137imm32 r7, 0x90070000;
138R1.L = R0.H << 1;
139R2.L = R1.H << 2;
140R3.L = R2.H << 3;
141R4.L = R3.H << 4;
142R5.L = R4.H << 5;
143R6.L = R5.H << 6;
144R7.L = R6.H << 7;
145R0.L = R7.H << 8;
146CHECKREG r1, 0x00012002;
147CHECKREG r2, 0x90020004;
148CHECKREG r3, 0x90038010;
149CHECKREG r4, 0x90040030;
150CHECKREG r5, 0x90050080;
151CHECKREG r6, 0x90060140;
152CHECKREG r7, 0x90070300;
153CHECKREG r0, 0x90010700;
154
155
156imm32 r0, 0xa0010000;
157imm32 r1, 0xa0010000;
158imm32 r2, 0xa002000f;
159imm32 r3, 0xa0030000;
160imm32 r4, 0xa0040000;
161imm32 r5, 0xa0050000;
162imm32 r6, 0xa0060000;
163imm32 r7, 0xa0070000;
164R2.L = R0.H << 15;
165R3.L = R1.H << 15;
166R4.L = R2.H << 15;
167R5.L = R3.H << 15;
168R6.L = R4.H << 15;
169R7.L = R5.H << 15;
170R0.L = R6.H << 15;
171R1.L = R7.H << 15;
172CHECKREG r0, 0xA0010000;
173CHECKREG r1, 0xA0018000;
174CHECKREG r2, 0xA0028000;
175CHECKREG r3, 0xA0038000;
176CHECKREG r4, 0xA0040000;
177CHECKREG r5, 0xA0058000;
178CHECKREG r6, 0xA0060000;
179CHECKREG r7, 0xA0078000;
180
181imm32 r0, 0xc0010001;
182imm32 r1, 0xc0010001;
183imm32 r2, 0xc0020002;
184imm32 r3, 0xc0030010;
185imm32 r4, 0xc0040004;
186imm32 r5, 0xc0050005;
187imm32 r6, 0xc0060006;
188imm32 r7, 0xc0070007;
189R3.L = R0.H << 14;
190R4.L = R1.H << 14;
191R5.L = R2.H << 14;
192R6.L = R3.H << 14;
193R7.L = R4.H << 14;
194R0.L = R5.H << 14;
195R1.L = R6.H << 14;
196R2.L = R7.H << 14;
197CHECKREG r0, 0xC0014000;
198CHECKREG r1, 0xC0018000;
199CHECKREG r2, 0xC002C000;
200CHECKREG r3, 0xC0034000;
201CHECKREG r4, 0xC0044000;
202CHECKREG r5, 0xC0058000;
203CHECKREG r6, 0xC006C000;
204CHECKREG r7, 0xC0070000;
205
206// RLx by RLx
207imm32 r0, 0x00000000;
208imm32 r1, 0x00000001;
209imm32 r2, 0x00000002;
210imm32 r3, 0x00000003;
211imm32 r4, 0x00000004;
212imm32 r5, 0x00000005;
213imm32 r6, 0x00000006;
214imm32 r7, 0x00000007;
215R0.H = R0.L << 12;
216R1.H = R1.L << 12;
217R2.H = R2.L << 13;
218R3.H = R3.L << 14;
219R4.H = R4.L << 15;
220R5.H = R5.L << 14;
221R6.H = R6.L << 7;
222R7.H = R7.L << 8;
223CHECKREG r0, 0x00000000;
224CHECKREG r1, 0x10000001;
225CHECKREG r2, 0x40000002;
226CHECKREG r3, 0xC0000003;
227CHECKREG r4, 0x00000004;
228CHECKREG r5, 0x40000005;
229CHECKREG r6, 0x03000006;
230CHECKREG r7, 0x07000007;
231
232imm32 r0, 0x0000d001;
233imm32 r1, 0x00000001;
234imm32 r2, 0x0000d002;
235imm32 r3, 0x0000d003;
236imm32 r4, 0x0000d004;
237imm32 r5, 0x0000d005;
238imm32 r6, 0x0000d006;
239imm32 r7, 0x0000d007;
240R1.H = R0.L << 3;
241R2.H = R1.L << 4;
242R3.H = R2.L << 5;
243R4.H = R3.L << 6;
244R5.H = R4.L << 7;
245R6.H = R5.L << 8;
246R7.H = R6.L << 9;
247R0.H = R7.L << 8;
248CHECKREG r1, 0x80080001;
249CHECKREG r2, 0x0010D002;
250CHECKREG r3, 0x0040D003;
251CHECKREG r4, 0x00C0D004;
252CHECKREG r5, 0x0200D005;
253CHECKREG r6, 0x0500D006;
254CHECKREG r7, 0x0C00D007;
255CHECKREG r0, 0x0700D001;
256
257
258imm32 r0, 0x0000e001;
259imm32 r1, 0x0000e001;
260imm32 r2, 0x0000000f;
261imm32 r3, 0x0000e003;
262imm32 r4, 0x0000e004;
263imm32 r5, 0x0000e005;
264imm32 r6, 0x0000e006;
265imm32 r7, 0x0000e007;
266R2.H = R0.L << 15;
267R3.H = R1.L << 15;
268R4.H = R2.L << 15;
269R5.H = R3.L << 15;
270R6.H = R4.L << 15;
271R7.H = R5.L << 15;
272R0.H = R6.L << 15;
273R1.H = R7.L << 15;
274CHECKREG r0, 0x0000E001;
275CHECKREG r1, 0x8000E001;
276CHECKREG r2, 0x8000000F;
277CHECKREG r3, 0x8000E003;
278CHECKREG r4, 0x8000E004;
279CHECKREG r5, 0x8000E005;
280CHECKREG r6, 0x0000E006;
281CHECKREG r7, 0x8000E007;
282
283imm32 r0, 0x0000f001;
284imm32 r1, 0x0000f001;
285imm32 r2, 0x0000f002;
286imm32 r3, 0x00000010;
287imm32 r4, 0x0000f004;
288imm32 r5, 0x0000f005;
289imm32 r6, 0x0000f006;
290imm32 r7, 0x0000f007;
291R3.H = R0.L << 13;
292R4.H = R1.L << 13;
293R5.H = R2.L << 13;
294R6.H = R3.L << 13;
295R7.H = R4.L << 13;
296R0.H = R5.L << 13;
297R1.H = R6.L << 13;
298R2.H = R7.L << 13;
299// RHx by RLx
300imm32 r0, 0x00000000;
301imm32 r1, 0x00010000;
302imm32 r2, 0x00020000;
303imm32 r3, 0x00030000;
304imm32 r4, 0x00040000;
305imm32 r5, 0x00050000;
306imm32 r6, 0x00060000;
307imm32 r7, 0x00070000;
308R0.H = R0.H << 0;
309R1.H = R1.H << 0;
310R2.H = R2.H << 0;
311R3.H = R3.H << 0;
312R4.H = R4.H << 0;
313R5.H = R5.H << 0;
314R6.H = R6.H << 0;
315R7.H = R7.H << 0;
316CHECKREG r0, 0x00000000;
317CHECKREG r1, 0x00010000;
318CHECKREG r2, 0x00020000;
319CHECKREG r3, 0x00030000;
320CHECKREG r4, 0x00040000;
321CHECKREG r5, 0x00050000;
322CHECKREG r6, 0x00060000;
323CHECKREG r7, 0x00070000;
324
325imm32 r0, 0xa0010000;
326imm32 r1, 0x00010001;
327imm32 r2, 0xa0020000;
328imm32 r3, 0xa0030000;
329imm32 r4, 0xa0040000;
330imm32 r5, 0xa0050000;
331imm32 r6, 0xa0060000;
332imm32 r7, 0xa0070000;
333R1.H = R0.H << 1;
334R2.H = R1.H << 1;
335R3.H = R2.H << 1;
336R4.H = R3.H << 1;
337R5.H = R4.H << 1;
338R6.H = R5.H << 1;
339R7.H = R6.H << 1;
340R0.H = R7.H << 1;
341CHECKREG r1, 0x40020001;
342CHECKREG r2, 0x80040000;
343CHECKREG r3, 0x00080000;
344CHECKREG r4, 0x00100000;
345CHECKREG r5, 0x00200000;
346CHECKREG r6, 0x00400000;
347CHECKREG r7, 0x00800000;
348CHECKREG r0, 0x01000000;
349
350
351imm32 r0, 0xb0010000;
352imm32 r1, 0xb0010000;
353imm32 r2, 0xb002000f;
354imm32 r3, 0xb0030000;
355imm32 r4, 0xb0040000;
356imm32 r5, 0xb0050000;
357imm32 r6, 0xb0060000;
358imm32 r7, 0xb0070000;
359R2.H = R0.H << 15;
360R3.H = R1.H << 15;
361R4.H = R2.H << 15;
362R5.H = R3.H << 15;
363R6.H = R4.H << 15;
364R7.H = R5.H << 15;
365R0.H = R6.H << 15;
366R1.H = R7.H << 15;
367CHECKREG r0, 0x00000000;
368CHECKREG r1, 0x00000000;
369CHECKREG r2, 0x8000000F;
370CHECKREG r3, 0x80000000;
371CHECKREG r4, 0x00000000;
372CHECKREG r5, 0x00000000;
373CHECKREG r6, 0x00000000;
374CHECKREG r7, 0x00000000;
375
376imm32 r0, 0xd0010000;
377imm32 r1, 0xd0010000;
378imm32 r2, 0xd0020000;
379imm32 r3, 0xd0030010;
380imm32 r4, 0xd0040000;
381imm32 r5, 0xd0050000;
382imm32 r6, 0xd0060000;
383imm32 r7, 0xd0070000;
384R6.H = R0.H << 12;
385R7.H = R1.H << 12;
386R0.H = R2.H << 12;
387R1.H = R3.H << 12;
388R2.H = R4.H << 12;
389R3.H = R5.H << 12;
390R4.H = R6.H << 12;
391R5.H = R7.H << 12;
392CHECKREG r0, 0x20000000;
393CHECKREG r1, 0x30000000;
394CHECKREG r2, 0x40000000;
395CHECKREG r3, 0x50000010;
396CHECKREG r4, 0x00000000;
397CHECKREG r5, 0x00000000;
398CHECKREG r6, 0x10000000;
399CHECKREG r7, 0x10000000;
400
401pass
402