1//Original:/testcases/core/c_dspldst_ld_drhi_i/c_dspldst_ld_drhi_i.dsp 2// Spec Reference: c_dspldst ld_drhi_i 3# mach: bfin 4 5.include "testutils.inc" 6 start 7 8// set all regs 9 10 INIT_R_REGS 0; 11 12 loadsym i0, DATA_ADDR_3; 13 loadsym i1, DATA_ADDR_4; 14 loadsym i2, DATA_ADDR_5; 15 loadsym i3, DATA_ADDR_6; 16 17// Load upper half of Dregs 18 R0.H = W [ I0 ]; 19 R1.H = W [ I1 ]; 20 R2.H = W [ I2 ]; 21 R3.H = W [ I3 ]; 22 R4.H = W [ I0 ]; 23 R5.H = W [ I1 ]; 24 R6.H = W [ I2 ]; 25 R7.H = W [ I3 ]; 26 CHECKREG r0, 0x02030000; 27 CHECKREG r1, 0x22230000; 28 CHECKREG r2, 0x42430000; 29 CHECKREG r3, 0x62630000; 30 CHECKREG r4, 0x02030000; 31 CHECKREG r5, 0x22230000; 32 CHECKREG r6, 0x42430000; 33 CHECKREG r7, 0x62630000; 34 35 R1.H = W [ I0 ]; 36 R2.H = W [ I1 ]; 37 R3.H = W [ I2 ]; 38 R4.H = W [ I3 ]; 39 R5.H = W [ I0 ]; 40 R6.H = W [ I1 ]; 41 R7.H = W [ I2 ]; 42 R0.H = W [ I3 ]; 43 CHECKREG r0, 0x62630000; 44 CHECKREG r1, 0x02030000; 45 CHECKREG r2, 0x22230000; 46 CHECKREG r3, 0x42430000; 47 CHECKREG r4, 0x62630000; 48 CHECKREG r5, 0x02030000; 49 CHECKREG r6, 0x22230000; 50 CHECKREG r7, 0x42430000; 51 52 R2.H = W [ I0 ]; 53 R3.H = W [ I1 ]; 54 R4.H = W [ I2 ]; 55 R5.H = W [ I3 ]; 56 R6.H = W [ I0 ]; 57 R7.H = W [ I1 ]; 58 R0.H = W [ I2 ]; 59 R1.H = W [ I3 ]; 60 CHECKREG r0, 0x42430000; 61 CHECKREG r1, 0x62630000; 62 CHECKREG r2, 0x02030000; 63 CHECKREG r3, 0x22230000; 64 CHECKREG r4, 0x42430000; 65 CHECKREG r5, 0x62630000; 66 CHECKREG r6, 0x02030000; 67 CHECKREG r7, 0x22230000; 68 69 R3.H = W [ I0 ]; 70 R4.H = W [ I1 ]; 71 R5.H = W [ I2 ]; 72 R6.H = W [ I3 ]; 73 R7.H = W [ I0 ]; 74 R0.H = W [ I1 ]; 75 R1.H = W [ I2 ]; 76 R2.H = W [ I3 ]; 77 78 CHECKREG r0, 0x22230000; 79 CHECKREG r1, 0x42430000; 80 CHECKREG r2, 0x62630000; 81 CHECKREG r3, 0x02030000; 82 CHECKREG r4, 0x22230000; 83 CHECKREG r5, 0x42430000; 84 CHECKREG r6, 0x62630000; 85 CHECKREG r7, 0x02030000; 86 87 pass 88 89// Pre-load memory with known data 90// More data is defined than will actually be used 91 92 .data 93 94DATA_ADDR_3: 95 .dd 0x00010203 96 .dd 0x04050607 97 .dd 0x08090A0B 98 .dd 0x0C0D0E0F 99 .dd 0x10111213 100 .dd 0x14151617 101 .dd 0x18191A1B 102 .dd 0x1C1D1E1F 103 104DATA_ADDR_4: 105 .dd 0x20212223 106 .dd 0x24252627 107 .dd 0x28292A2B 108 .dd 0x2C2D2E2F 109 .dd 0x30313233 110 .dd 0x34353637 111 .dd 0x38393A3B 112 .dd 0x3C3D3E3F 113 114DATA_ADDR_5: 115 .dd 0x40414243 116 .dd 0x44454647 117 .dd 0x48494A4B 118 .dd 0x4C4D4E4F 119 .dd 0x50515253 120 .dd 0x54555657 121 .dd 0x58595A5B 122 .dd 0x5C5D5E5F 123 124DATA_ADDR_6: 125 .dd 0x60616263 126 .dd 0x64656667 127 .dd 0x68696A6B 128 .dd 0x6C6D6E6F 129 .dd 0x70717273 130 .dd 0x74757677 131 .dd 0x78797A7B 132 .dd 0x7C7D7E7F 133 134DATA_ADDR_7: 135 .dd 0x80818283 136 .dd 0x84858687 137 .dd 0x88898A8B 138 .dd 0x8C8D8E8F 139 .dd 0x90919293 140 .dd 0x94959697 141 .dd 0x98999A9B 142 .dd 0x9C9D9E9F 143 144DATA_ADDR_8: 145 .dd 0xA0A1A2A3 146 .dd 0xA4A5A6A7 147 .dd 0xA8A9AAAB 148 .dd 0xACADAEAF 149 .dd 0xB0B1B2B3 150 .dd 0xB4B5B6B7 151 .dd 0xB8B9BABB 152 .dd 0xBCBDBEBF 153 .dd 0xC0C1C2C3 154 .dd 0xC4C5C6C7 155 .dd 0xC8C9CACB 156 .dd 0xCCCDCECF 157 .dd 0xD0D1D2D3 158 .dd 0xD4D5D6D7 159 .dd 0xD8D9DADB 160 .dd 0xDCDDDEDF 161 .dd 0xE0E1E2E3 162 .dd 0xE4E5E6E7 163 .dd 0xE8E9EAEB 164 .dd 0xECEDEEEF 165 .dd 0xF0F1F2F3 166 .dd 0xF4F5F6F7 167 .dd 0xF8F9FAFB 168 .dd 0xFCFDFEFF 169