1//Original:/proj/frio/dv/testcases/core/c_mmr_loop_user_except/c_mmr_loop_user_except.dsp
2// Spec Reference: c_mmr_loop_user_except
3# mach: bfin
4# sim: --environment operating
5
6#include "test.h"
7.include "testutils.inc"
8start
9
10include(gen_int.inc)
11include(selfcheck.inc)
12include(std.inc)
13include(mmrs.inc)
14
15#ifndef STACKSIZE
16#define STACKSIZE 0x10
17#endif
18#ifndef ITABLE
19#define ITABLE 0xF0000000
20#endif
21
22GEN_INT_INIT(ITABLE) // set location for interrupt table
23
24//
25// Reset/Bootstrap Code
26//   (Here we set the processor operating modes, initialize registers
27//    etc.)
28//
29
30BOOT:
31
32INIT_R_REGS(0);
33INIT_P_REGS(0);
34INIT_I_REGS(0);     // initialize the dsp address regs
35INIT_M_REGS(0);
36INIT_L_REGS(0);
37INIT_B_REGS(0);
38    //CHECK_INIT(p5, 0xe0000000);
39include(symtable.inc)
40CHECK_INIT_DEF(p5);
41
42
43
44CLI R1;           // inhibit events during MMR writes
45
46LD32_LABEL(sp, USTACK);   // setup the user stack pointer
47USP = SP;                  // and frame pointer
48
49LD32_LABEL(sp, KSTACK);   // setup the stack pointer
50FP = SP;                  // and frame pointer
51
52LD32(p0, EVT0);      // Setup Event Vectors and Handlers
53LD32_LABEL(r0, EHANDLE);  // Emulation Handler (Int0)
54    [ P0 ++ ] = R0;
55
56LD32_LABEL(r0, RHANDLE);  // Reset Handler (Int1)
57    [ P0 ++ ] = R0;
58
59LD32_LABEL(r0, NHANDLE);  // NMI Handler (Int2)
60    [ P0 ++ ] = R0;
61
62LD32_LABEL(r0, XHANDLE);  // Exception Handler (Int3)
63    [ P0 ++ ] = R0;
64
65    [ P0 ++ ] = R0;          // EVT4 not used global Interr Enable (INT4)
66
67
68LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
69    [ P0 ++ ] = R0;
70
71LD32_LABEL(r0, THANDLE);  // Timer Handler (Int6)
72    [ P0 ++ ] = R0;
73
74LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
75    [ P0 ++ ] = R0;
76
77LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
78    [ P0 ++ ] = R0;
79
80LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
81    [ P0 ++ ] = R0;
82
83LD32_LABEL(r0, I10HANDLE);// IVG10 Handler
84    [ P0 ++ ] = R0;
85
86LD32_LABEL(r0, I11HANDLE);// IVG11 Handler
87    [ P0 ++ ] = R0;
88
89LD32_LABEL(r0, I12HANDLE);// IVG12 Handler
90    [ P0 ++ ] = R0;
91
92//  LD32_LABEL(r0, I13HANDLE);// IVG13 Handler
93//  [p0++] = r0;
94
95//  LD32_LABEL(r0, I14HANDLE);// IVG14 Handler
96//  [p0++] = r0;
97
98//*****************
99    // wrt-rd     EVT13             = 0xFFE02034
100LD32(p0, 0xFFE02034);
101LD32(r0, 0xDDDDABC6);
102    [ P0 ] = R0;
103
104    // wrt-rd     EVT14             = 0xFFE02038
105LD32(p0, 0xFFE02038);
106LD32(r0, 0xEEEEABC6);
107    [ P0 ] = R0;
108//*****************
109LD32_LABEL(r0, I15HANDLE);// IVG15 Handler
110    [ P0 ++ ] = R0;
111
112LD32(p0, EVT_OVERRIDE);
113    R0 = 0;
114    [ P0 ++ ] = R0;
115
116    R1 = -1;     // Change this to mask interrupts (*)
117CSYNC;       // wait for MMR writes to finish
118STI R1;      // sync and reenable events (implicit write to IMASK)
119
120DUMMY:
121
122    R0 = 0 (Z);
123
124LT0 = r0;       // set loop counters to something deterministic
125LB0 = r0;
126LC0 = r0;
127LT1 = r0;
128LB1 = r0;
129LC1 = r0;
130
131ASTAT = r0;     // reset other internal regs
132SYSCFG = r0;
133RETS = r0;      // prevent X's breaking LINK instruction
134
135
136// The following code sets up the test for running in USER mode
137
138LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a
139                        // ReturnFromInterrupt (RTI)
140RETI = r0;      // We need to load the return address
141
142// Comment the following line for a USER Mode test
143
144//  JUMP    STARTSUP;   // jump to code start for SUPERVISOR mode
145
146RTI;            // execute this instr put us in USER mode
147
148STARTSUP:
149LD32_LABEL(p1, BEGIN);
150
151LD32(p0, EVT15);
152
153CLI R1;    // inhibit events during write to MMR
154    [ P0 ] = P1;   // IVG15 (General) handler (Int 15) load with start
155CSYNC;       // wait for it
156STI R1;      // reenable events with proper imask
157
158RAISE 15;   // after we RTI, INT 15 should be taken,& return to BEGIN in
159                // USER MODE & go to different RAISE in USER mode
160                // until the end of the test.
161
162RTI;
163
164//
165// The Main Program
166//
167STARTUSER:
168LD32_LABEL(sp, USTACK);   // setup the stack pointer
169FP = SP;            // set frame pointer
170//  LINK 0;     // change for how much stack frame space you need.
171
172JUMP BEGIN;
173
174//*********************************************************************
175
176BEGIN:
177
178                // COMMENT the following line for USER MODE tests
179    [ -- SP ] = RETI;  // enable interrupts in supervisor mode
180
181                // **** YOUR CODE GOES HERE ****
182
183
184
185    // PUT YOUR TEST HERE!
186                // Can't Raise 0, 3, or 4
187                // Raise 1 requires some intelligence so the test
188                //  doesn't loop forever - use SFTRESET bit in SEQSTAT (TBD)
189//  RAISE 2;    // RTN   // exception because we execute this in USER mode
190    R0 = 0;
191LD32(p0, 0xFFE02034);
192    P2 = 2;
193LSETUP ( start1 , end1 ) LC0 = P2;
194start1:
195      R0 = [ P0 ++ ];   // 16 bit instr
196end1: R1 = R0;
197
198CHECKREG(r0, 0x00000000);
199CHECKREG(r1, 0x00000000);
200CHECKREG(r2, 0x00000000);
201//CHECKREG(r3, 0x00000030);
202CHECKREG(r4, 0x0000000F);
203CHECKREG(r5, 0x00000012);
204CHECKREG(r6, 0x00000015);
205CHECKREG(r7, 0x00000018);
206
207
208END:
209dbg_pass;            // End the test
210
211//*********************************************************************
212
213//
214// Handlers for Events
215//
216
217EHANDLE:            // Emulation Handler 0
218RTE;
219
220RHANDLE:            // Reset Handler 1
221RTI;
222
223NHANDLE:            // NMI Handler 2
224    R0 = RETN;
225    R0 += 2;
226RETN = r0;
227RTN;
228
229XHANDLE:            // Exception Handler 3
230    R3 = RETX;
231    R4 += 5;
232    R5 += 6;
233    R6 += 7;
234    R7 += 8;
235    R3 += 2;    // for resturn address
236RETX = r3;
237RTX;
238
239HWHANDLE:           // HW Error Handler 5
240    R2 = RETI;
241    R2 += 2;
242RETI = r2;
243RTI;
244
245THANDLE:            // Timer Handler 6
246    R3 = RETI;
247    R3 += 2;
248RETI = r3;
249RTI;
250
251I7HANDLE:           // IVG 7 Handler
252    R4 = RETI;
253    R4 += 2;
254RETI = r4;
255RTI;
256
257I8HANDLE:           // IVG 8 Handler
258    R5 = RETI;
259    R5 += 2;
260RETI = r5;
261RTI;
262
263I9HANDLE:           // IVG 9 Handler
264    R6 = RETI;
265    R6 += 2;
266RETI = r6;
267RTI;
268
269I10HANDLE:          // IVG 10 Handler
270    R7 = RETI;
271    R7 += 2;
272RETI = r7;
273RTI;
274
275I11HANDLE:          // IVG 11 Handler
276    I0 = R0;
277    I1 = R1;
278    I2 = R2;
279    I3 = R3;
280    M0 = R4;
281    R0 = RETI;
282    R0 += 2;
283RETI = r0;
284RTI;
285
286I12HANDLE:          // IVG 12 Handler
287    R1 = RETI;
288    R1 += 2;
289RETI = r1;
290RTI;
291
292I13HANDLE:          // IVG 13 Handler
293    R2 = RETI;
294    R2 += 2;
295RETI = r2;
296RTI;
297
298I14HANDLE:          // IVG 14 Handler
299    R3 = RETI;
300    R3 += 2;
301RETI = r3;
302RTI;
303
304I15HANDLE:          // IVG 15 Handler
305    R4 = 15;
306RTI;
307
308NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug
309
310//
311// Data Segment
312//
313
314.data
315DATA:
316    .space (0x10);
317
318// Stack Segments (Both Kernel and User)
319
320    .space (STACKSIZE);
321KSTACK:
322
323    .space (STACKSIZE);
324USTACK:
325//  .space (STACKSIZE);  // adding this may solve the problem
326