1//Original:/proj/frio/dv/testcases/core/c_progctrl_csync_mmr/c_progctrl_csync_mmr.dsp
2// Spec Reference: csync mmr timer
3# mach: bfin
4# sim: --environment operating
5
6#include "test.h"
7.include "testutils.inc"
8start
9
10include(std.inc)
11include(selfcheck.inc)
12include(gen_int.inc)
13INIT_R_REGS(0);
14INIT_P_REGS(0);
15INIT_I_REGS(0);     // initialize the dsp address regs
16INIT_M_REGS(0);
17INIT_L_REGS(0);
18INIT_B_REGS(0);
19INIT_R_REGS(-1);
20//CHECK_INIT(p5, 0xe0000000);
21include(symtable.inc)
22CHECK_INIT_DEF(p5);
23
24#ifndef STACKSIZE
25#define STACKSIZE 0x10
26#endif
27#ifndef EVT
28#define EVT  0xFFE02000
29#endif
30#ifndef EVT15
31#define EVT15  0xFFE0203C
32#endif
33#ifndef EVT_OVERRIDE
34#define EVT_OVERRIDE 0xFFE02100
35#endif
36#ifndef ITABLE
37#define ITABLE 0xF0000000
38#endif
39
40GEN_INT_INIT(ITABLE) // set location for interrupt table
41
42//
43// Reset/Bootstrap Code
44//   (Here we should set the processor operating modes, initialize registers,
45//    etc.)
46//
47
48BOOT:
49
50
51LD32_LABEL(sp, KSTACK);   // setup the stack pointer
52FP = SP;        // and frame pointer
53
54LD32(p0, EVT);      // Setup Event Vectors and Handlers
55LD32_LABEL(r0, EHANDLE);  // Emulation Handler (Int0)
56    [ P0 ++ ] = R0;
57
58LD32_LABEL(r0, RHANDLE);  // Reset Handler (Int1)
59    [ P0 ++ ] = R0;
60
61LD32_LABEL(r0, NHANDLE);  // NMI Handler (Int2)
62    [ P0 ++ ] = R0;
63
64LD32_LABEL(r0, XHANDLE);  // Exception Handler (Int3)
65    [ P0 ++ ] = R0;
66
67    [ P0 ++ ] = R0;        // IVT4 not used
68
69LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
70    [ P0 ++ ] = R0;
71
72LD32_LABEL(r0, THANDLE);  // Timer Handler (Int6)
73    [ P0 ++ ] = R0;
74
75LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
76    [ P0 ++ ] = R0;
77
78LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
79    [ P0 ++ ] = R0;
80
81LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
82    [ P0 ++ ] = R0;
83
84LD32_LABEL(r0, I10HANDLE);// IVG10 Handler
85    [ P0 ++ ] = R0;
86
87LD32_LABEL(r0, I11HANDLE);// IVG11 Handler
88    [ P0 ++ ] = R0;
89
90LD32_LABEL(r0, I12HANDLE);// IVG12 Handler
91    [ P0 ++ ] = R0;
92
93LD32_LABEL(r0, I13HANDLE);// IVG13 Handler
94    [ P0 ++ ] = R0;
95
96LD32_LABEL(r0, I14HANDLE);// IVG14 Handler
97    [ P0 ++ ] = R0;
98
99LD32_LABEL(r0, I15HANDLE);// IVG15 Handler
100    [ P0 ++ ] = R0;
101
102LD32(p0, EVT_OVERRIDE);
103    R0 = 0;
104    [ P0 ++ ] = R0;
105    R0 = -1;     // Change this to mask interrupts (*)
106    [ P0 ] = R0;   // IMASK
107
108DUMMY:
109
110    R0 = 0 (Z);
111
112LT0 = r0;       // set loop counters to something deterministic
113LB0 = r0;
114LC0 = r0;
115LT1 = r0;
116LB1 = r0;
117LC1 = r0;
118
119ASTAT = r0;     // reset other internal regs
120
121// The following code sets up the test for running in USER mode
122
123LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a
124                        // ReturnFromInterrupt (RTI)
125RETI = r0;      // We need to load the return address
126
127// Comment the following line for a USER Mode test
128
129JUMP    STARTSUP;   // jump to code start for SUPERVISOR mode
130
131RTI;
132
133STARTSUP:
134LD32_LABEL(p1, BEGIN);
135
136LD32(p0, EVT15);
137    [ P0 ] = P1;   // IVG15 (General) handler (Int 15) load with start
138
139RAISE 15;       // after we RTI, INT 15 should be taken
140
141NOP;    // Workaround for Bug 217
142RTI;
143
144//
145// The Main Program
146//
147STARTUSER:
148LD32_LABEL(sp, USTACK);   // setup the stack pointer
149FP = SP;            // set frame pointer
150JUMP BEGIN;
151
152//*********************************************************************
153
154BEGIN:
155
156                // COMMENT the following line for USER MODE tests
157    [ -- SP ] = RETI;  // enable interrupts in supervisor mode
158
159                // **** YOUR CODE GOES HERE ****
160
161    // TCNTL: 4 bits, rw=1          = 0xFFE03000
162LD32(p0, 0xFFE03000);
163LD32(r0, 0x00000001);
164    [ P0 ] = R0;
165LD32(r0, 0x0000000D);
166    [ P0 ] = R0;
167CSYNC;                  // without this it read out zero
168    R1 = [ P0 ];
169
170    // TPERIOD: 32 bits, rw=1       = 0xFFE03004
171LD32(p0, 0xFFE03004);
172LD32(r0, 0x11112222);
173    [ P0 ] = R0;
174CSYNC;                  // without this it read out zero
175    R2 = [ P0 ];
176
177    // TSCALE: 8 bits, rw=1         = 0xFFE03008
178LD32(p0, 0xFFE03008);
179LD32(r0, 0x00000050);
180    [ P0 ] = R0;
181CSYNC;                  // without this it read out zero
182    R3 = [ P0 ];
183
184
185    //  TCOUNT: 32 bits, rw=1       = 0xFFE0300C
186LD32(p0, 0xFFE0300C);
187LD32(r0, 0x00000100);
188    [ P0 ] = R0;
189CSYNC;                  // without this it read out zero
190    R4 = [ P0 ];
191
192
193CHECKREG(r1, 0x0000000D);
194CHECKREG(r2, 0x11112222);
195CHECKREG(r3, 0x00000050);
196CHECKREG(r4, 0x00000100);
197
198dbg_pass;            // End the test
199
200//*********************************************************************
201
202//
203// Handlers for Events
204//
205
206EHANDLE:            // Emulation Handler 0
207RTE;
208
209RHANDLE:            // Reset Handler 1
210RTI;
211
212NHANDLE:            // NMI Handler 2
213    R0 = 2;
214RTN;
215
216XHANDLE:            // Exception Handler 3
217
218RTX;
219
220HWHANDLE:           // HW Error Handler 5
221    R2 = 5;
222RTI;
223
224THANDLE:            // Timer Handler 6
225    R3 = 6;
226RTI;
227
228I7HANDLE:           // IVG 7 Handler
229    R4 = 7;
230RTI;
231
232I8HANDLE:           // IVG 8 Handler
233    R5 = 8;
234RTI;
235
236I9HANDLE:           // IVG 9 Handler
237    R6 = 9;
238RTI;
239
240I10HANDLE:          // IVG 10 Handler
241    R7 = 10;
242RTI;
243
244I11HANDLE:          // IVG 11 Handler
245    R0 = 11;
246RTI;
247
248I12HANDLE:          // IVG 12 Handler
249    R1 = 12;
250RTI;
251
252I13HANDLE:          // IVG 13 Handler
253    R2 = 13;
254RTI;
255
256I14HANDLE:          // IVG 14 Handler
257    R3 = 14;
258RTI;
259
260I15HANDLE:          // IVG 15 Handler
261    R4 = 15;
262RTI;
263
264NOP;NOP;NOP;NOP;NOP;NOP;NOP; // needed for icache bug
265
266//
267// Data Segment
268//
269
270.data
271DATA:
272    .space (0x10);
273
274// Stack Segments (Both Kernel and User)
275
276    .space (STACKSIZE);
277KSTACK:
278
279    .space (STACKSIZE);
280USTACK:
281